1 /* 2 * $Id: pmcc4_cpld.h,v 1.0 2005/09/28 00:10:08 rickd PMCC4_3_1B $ 3 */ 4 5 #ifndef _INC_PMCC4_CPLD_H_ 6 #define _INC_PMCC4_CPLD_H_ 7 8 /*----------------------------------------------------------------------------- 9 * pmcc4_cpld.h - 10 * 11 * Copyright (C) 2005 SBE, Inc. 12 * 13 * This program is free software; you can redistribute it and/or modify 14 * it under the terms of the GNU General Public License as published by 15 * the Free Software Foundation; either version 2 of the License, or 16 * (at your option) any later version. 17 * 18 * This program is distributed in the hope that it will be useful, 19 * but WITHOUT ANY WARRANTY; without even the implied warranty of 20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 21 * GNU General Public License for more details. 22 * 23 * For further information, contact via email: support@sbei.com 24 * SBE, Inc. San Ramon, California U.S.A. 25 *----------------------------------------------------------------------------- 26 * RCS info: 27 * RCS revision: $Revision: 1.0 $ 28 * Last changed on $Date: 2005/09/28 00:10:08 $ 29 * Changed by $Author: rickd $ 30 *----------------------------------------------------------------------------- 31 * $Log: pmcc4_cpld.h,v $ 32 * Revision 1.0 2005/09/28 00:10:08 rickd 33 * Initial revision 34 * 35 *----------------------------------------------------------------------------- 36 */ 37 38 39 #if defined(__FreeBSD__) || defined(__NetBSD__) 40 #include <sys/types.h> 41 #else 42 #ifndef __KERNEL__ 43 #include <sys/types.h> 44 #else 45 #include <linux/types.h> 46 #endif 47 #endif 48 49 #ifdef __cplusplus 50 extern "C" 51 { 52 #endif 53 54 55 /********************************/ 56 /* iSPLD control chip registers */ 57 /********************************/ 58 59 #if 0 60 #define CPLD_MCSR 0x0 61 #define CPLD_MCLK 0x1 62 #define CPLD_LEDS 0x2 63 #define CPLD_INTR 0x3 64 #endif 65 66 struct c4_cpld 67 { 68 volatile u_int32_t mcsr;/* r/w: Master Clock Source Register */ 69 volatile u_int32_t mclk;/* r/w: Master Clock Register */ 70 volatile u_int32_t leds;/* r/w: LED Register */ 71 volatile u_int32_t intr;/* r: Interrupt Register */ 72 }; 73 74 typedef struct c4_cpld c4cpld_t; 75 76 /* mcsr note: sourcing COMET must be initialized to Master Mode */ 77 #define PMCC4_CPLD_MCSR_IND 0 /* ports used individual BP Clk as 78 * source, no slaves */ 79 #define PMCC4_CPLD_MCSR_CMT_1 1 /* COMET 1 BP Clk is source, 2,3,4 80 * are Clk slaves */ 81 #define PMCC4_CPLD_MCSR_CMT_2 2 /* COMET 2 BP Clk is source, 1,3,4 82 * are Clk slaves */ 83 #define PMCC4_CPLD_MCSR_CMT_3 3 /* COMET 3 BP Clk is source, 1,2,4 84 * are Clk slaves */ 85 #define PMCC4_CPLD_MCSR_CMT_4 4 /* COMET 4 BP Clk is source, 1,2,3 86 * are Clk slaves */ 87 88 #define PMCC4_CPLD_MCLK_MASK 0x0f 89 #define PMCC4_CPLD_MCLK_P1 0x1 90 #define PMCC4_CPLD_MCLK_P2 0x2 91 #define PMCC4_CPLD_MCLK_P3 0x4 92 #define PMCC4_CPLD_MCLK_P4 0x8 93 #define PMCC4_CPLD_MCLK_T1 0x00 94 #define PMCC4_CPLD_MCLK_P1_E1 0x01 95 #define PMCC4_CPLD_MCLK_P2_E1 0x02 96 #define PMCC4_CPLD_MCLK_P3_E1 0x04 97 #define PMCC4_CPLD_MCLK_P4_E1 0x08 98 99 #define PMCC4_CPLD_LED_OFF 0 100 #define PMCC4_CPLD_LED_ON 1 101 #define PMCC4_CPLD_LED_GP0 0x01 /* port 0, green */ 102 #define PMCC4_CPLD_LED_YP0 0x02 /* port 0, yellow */ 103 #define PMCC4_CPLD_LED_GP1 0x04 /* port 1, green */ 104 #define PMCC4_CPLD_LED_YP1 0x08 /* port 1, yellow */ 105 #define PMCC4_CPLD_LED_GP2 0x10 /* port 2, green */ 106 #define PMCC4_CPLD_LED_YP2 0x20 /* port 2, yellow */ 107 #define PMCC4_CPLD_LED_GP3 0x40 /* port 3, green */ 108 #define PMCC4_CPLD_LED_YP3 0x80 /* port 3, yellow */ 109 #define PMCC4_CPLD_LED_GREEN (PMCC4_CPLD_LED_GP0 | PMCC4_CPLD_LED_GP1 | \ 110 PMCC4_CPLD_LED_GP2 | PMCC4_CPLD_LED_GP3 ) 111 #define PMCC4_CPLD_LED_YELLOW (PMCC4_CPLD_LED_YP0 | PMCC4_CPLD_LED_YP1 | \ 112 PMCC4_CPLD_LED_YP2 | PMCC4_CPLD_LED_YP3) 113 114 #define PMCC4_CPLD_INTR_MASK 0x0f 115 #define PMCC4_CPLD_INTR_CMT_1 0x01 116 #define PMCC4_CPLD_INTR_CMT_2 0x02 117 #define PMCC4_CPLD_INTR_CMT_3 0x04 118 #define PMCC4_CPLD_INTR_CMT_4 0x08 119 120 #ifdef __cplusplus 121 } 122 #endif 123 124 #endif /* _INC_PMCC4_CPLD_H_ */ 125