1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3  * pmbus.h - Common defines and structures for PMBus devices
4  *
5  * Copyright (c) 2010, 2011 Ericsson AB.
6  * Copyright (c) 2012 Guenter Roeck
7  */
8 
9 #ifndef PMBUS_H
10 #define PMBUS_H
11 
12 #include <linux/bitops.h>
13 #include <linux/regulator/driver.h>
14 
15 /*
16  * Registers
17  */
18 enum pmbus_regs {
19 	PMBUS_PAGE			= 0x00,
20 	PMBUS_OPERATION			= 0x01,
21 	PMBUS_ON_OFF_CONFIG		= 0x02,
22 	PMBUS_CLEAR_FAULTS		= 0x03,
23 	PMBUS_PHASE			= 0x04,
24 
25 	PMBUS_WRITE_PROTECT		= 0x10,
26 
27 	PMBUS_CAPABILITY		= 0x19,
28 	PMBUS_QUERY			= 0x1A,
29 
30 	PMBUS_VOUT_MODE			= 0x20,
31 	PMBUS_VOUT_COMMAND		= 0x21,
32 	PMBUS_VOUT_TRIM			= 0x22,
33 	PMBUS_VOUT_CAL_OFFSET		= 0x23,
34 	PMBUS_VOUT_MAX			= 0x24,
35 	PMBUS_VOUT_MARGIN_HIGH		= 0x25,
36 	PMBUS_VOUT_MARGIN_LOW		= 0x26,
37 	PMBUS_VOUT_TRANSITION_RATE	= 0x27,
38 	PMBUS_VOUT_DROOP		= 0x28,
39 	PMBUS_VOUT_SCALE_LOOP		= 0x29,
40 	PMBUS_VOUT_SCALE_MONITOR	= 0x2A,
41 
42 	PMBUS_COEFFICIENTS		= 0x30,
43 	PMBUS_POUT_MAX			= 0x31,
44 
45 	PMBUS_FAN_CONFIG_12		= 0x3A,
46 	PMBUS_FAN_COMMAND_1		= 0x3B,
47 	PMBUS_FAN_COMMAND_2		= 0x3C,
48 	PMBUS_FAN_CONFIG_34		= 0x3D,
49 	PMBUS_FAN_COMMAND_3		= 0x3E,
50 	PMBUS_FAN_COMMAND_4		= 0x3F,
51 
52 	PMBUS_VOUT_OV_FAULT_LIMIT	= 0x40,
53 	PMBUS_VOUT_OV_FAULT_RESPONSE	= 0x41,
54 	PMBUS_VOUT_OV_WARN_LIMIT	= 0x42,
55 	PMBUS_VOUT_UV_WARN_LIMIT	= 0x43,
56 	PMBUS_VOUT_UV_FAULT_LIMIT	= 0x44,
57 	PMBUS_VOUT_UV_FAULT_RESPONSE	= 0x45,
58 	PMBUS_IOUT_OC_FAULT_LIMIT	= 0x46,
59 	PMBUS_IOUT_OC_FAULT_RESPONSE	= 0x47,
60 	PMBUS_IOUT_OC_LV_FAULT_LIMIT	= 0x48,
61 	PMBUS_IOUT_OC_LV_FAULT_RESPONSE	= 0x49,
62 	PMBUS_IOUT_OC_WARN_LIMIT	= 0x4A,
63 	PMBUS_IOUT_UC_FAULT_LIMIT	= 0x4B,
64 	PMBUS_IOUT_UC_FAULT_RESPONSE	= 0x4C,
65 
66 	PMBUS_OT_FAULT_LIMIT		= 0x4F,
67 	PMBUS_OT_FAULT_RESPONSE		= 0x50,
68 	PMBUS_OT_WARN_LIMIT		= 0x51,
69 	PMBUS_UT_WARN_LIMIT		= 0x52,
70 	PMBUS_UT_FAULT_LIMIT		= 0x53,
71 	PMBUS_UT_FAULT_RESPONSE		= 0x54,
72 	PMBUS_VIN_OV_FAULT_LIMIT	= 0x55,
73 	PMBUS_VIN_OV_FAULT_RESPONSE	= 0x56,
74 	PMBUS_VIN_OV_WARN_LIMIT		= 0x57,
75 	PMBUS_VIN_UV_WARN_LIMIT		= 0x58,
76 	PMBUS_VIN_UV_FAULT_LIMIT	= 0x59,
77 
78 	PMBUS_IIN_OC_FAULT_LIMIT	= 0x5B,
79 	PMBUS_IIN_OC_WARN_LIMIT		= 0x5D,
80 
81 	PMBUS_POUT_OP_FAULT_LIMIT	= 0x68,
82 	PMBUS_POUT_OP_WARN_LIMIT	= 0x6A,
83 	PMBUS_PIN_OP_WARN_LIMIT		= 0x6B,
84 
85 	PMBUS_STATUS_BYTE		= 0x78,
86 	PMBUS_STATUS_WORD		= 0x79,
87 	PMBUS_STATUS_VOUT		= 0x7A,
88 	PMBUS_STATUS_IOUT		= 0x7B,
89 	PMBUS_STATUS_INPUT		= 0x7C,
90 	PMBUS_STATUS_TEMPERATURE	= 0x7D,
91 	PMBUS_STATUS_CML		= 0x7E,
92 	PMBUS_STATUS_OTHER		= 0x7F,
93 	PMBUS_STATUS_MFR_SPECIFIC	= 0x80,
94 	PMBUS_STATUS_FAN_12		= 0x81,
95 	PMBUS_STATUS_FAN_34		= 0x82,
96 
97 	PMBUS_READ_VIN			= 0x88,
98 	PMBUS_READ_IIN			= 0x89,
99 	PMBUS_READ_VCAP			= 0x8A,
100 	PMBUS_READ_VOUT			= 0x8B,
101 	PMBUS_READ_IOUT			= 0x8C,
102 	PMBUS_READ_TEMPERATURE_1	= 0x8D,
103 	PMBUS_READ_TEMPERATURE_2	= 0x8E,
104 	PMBUS_READ_TEMPERATURE_3	= 0x8F,
105 	PMBUS_READ_FAN_SPEED_1		= 0x90,
106 	PMBUS_READ_FAN_SPEED_2		= 0x91,
107 	PMBUS_READ_FAN_SPEED_3		= 0x92,
108 	PMBUS_READ_FAN_SPEED_4		= 0x93,
109 	PMBUS_READ_DUTY_CYCLE		= 0x94,
110 	PMBUS_READ_FREQUENCY		= 0x95,
111 	PMBUS_READ_POUT			= 0x96,
112 	PMBUS_READ_PIN			= 0x97,
113 
114 	PMBUS_REVISION			= 0x98,
115 	PMBUS_MFR_ID			= 0x99,
116 	PMBUS_MFR_MODEL			= 0x9A,
117 	PMBUS_MFR_REVISION		= 0x9B,
118 	PMBUS_MFR_LOCATION		= 0x9C,
119 	PMBUS_MFR_DATE			= 0x9D,
120 	PMBUS_MFR_SERIAL		= 0x9E,
121 
122 	PMBUS_MFR_VIN_MIN		= 0xA0,
123 	PMBUS_MFR_VIN_MAX		= 0xA1,
124 	PMBUS_MFR_IIN_MAX		= 0xA2,
125 	PMBUS_MFR_PIN_MAX		= 0xA3,
126 	PMBUS_MFR_VOUT_MIN		= 0xA4,
127 	PMBUS_MFR_VOUT_MAX		= 0xA5,
128 	PMBUS_MFR_IOUT_MAX		= 0xA6,
129 	PMBUS_MFR_POUT_MAX		= 0xA7,
130 
131 	PMBUS_IC_DEVICE_ID		= 0xAD,
132 	PMBUS_IC_DEVICE_REV		= 0xAE,
133 
134 	PMBUS_MFR_MAX_TEMP_1		= 0xC0,
135 	PMBUS_MFR_MAX_TEMP_2		= 0xC1,
136 	PMBUS_MFR_MAX_TEMP_3		= 0xC2,
137 
138 /*
139  * Virtual registers.
140  * Useful to support attributes which are not supported by standard PMBus
141  * registers but exist as manufacturer specific registers on individual chips.
142  * Must be mapped to real registers in device specific code.
143  *
144  * Semantics:
145  * Virtual registers are all word size.
146  * READ registers are read-only; writes are either ignored or return an error.
147  * RESET registers are read/write. Reading reset registers returns zero
148  * (used for detection), writing any value causes the associated history to be
149  * reset.
150  * Virtual registers have to be handled in device specific driver code. Chip
151  * driver code returns non-negative register values if a virtual register is
152  * supported, or a negative error code if not. The chip driver may return
153  * -ENODATA or any other error code in this case, though an error code other
154  * than -ENODATA is handled more efficiently and thus preferred. Either case,
155  * the calling PMBus core code will abort if the chip driver returns an error
156  * code when reading or writing virtual registers.
157  */
158 	PMBUS_VIRT_BASE			= 0x100,
159 	PMBUS_VIRT_READ_TEMP_AVG,
160 	PMBUS_VIRT_READ_TEMP_MIN,
161 	PMBUS_VIRT_READ_TEMP_MAX,
162 	PMBUS_VIRT_RESET_TEMP_HISTORY,
163 	PMBUS_VIRT_READ_VIN_AVG,
164 	PMBUS_VIRT_READ_VIN_MIN,
165 	PMBUS_VIRT_READ_VIN_MAX,
166 	PMBUS_VIRT_RESET_VIN_HISTORY,
167 	PMBUS_VIRT_READ_IIN_AVG,
168 	PMBUS_VIRT_READ_IIN_MIN,
169 	PMBUS_VIRT_READ_IIN_MAX,
170 	PMBUS_VIRT_RESET_IIN_HISTORY,
171 	PMBUS_VIRT_READ_PIN_AVG,
172 	PMBUS_VIRT_READ_PIN_MIN,
173 	PMBUS_VIRT_READ_PIN_MAX,
174 	PMBUS_VIRT_RESET_PIN_HISTORY,
175 	PMBUS_VIRT_READ_POUT_AVG,
176 	PMBUS_VIRT_READ_POUT_MIN,
177 	PMBUS_VIRT_READ_POUT_MAX,
178 	PMBUS_VIRT_RESET_POUT_HISTORY,
179 	PMBUS_VIRT_READ_VOUT_AVG,
180 	PMBUS_VIRT_READ_VOUT_MIN,
181 	PMBUS_VIRT_READ_VOUT_MAX,
182 	PMBUS_VIRT_RESET_VOUT_HISTORY,
183 	PMBUS_VIRT_READ_IOUT_AVG,
184 	PMBUS_VIRT_READ_IOUT_MIN,
185 	PMBUS_VIRT_READ_IOUT_MAX,
186 	PMBUS_VIRT_RESET_IOUT_HISTORY,
187 	PMBUS_VIRT_READ_TEMP2_AVG,
188 	PMBUS_VIRT_READ_TEMP2_MIN,
189 	PMBUS_VIRT_READ_TEMP2_MAX,
190 	PMBUS_VIRT_RESET_TEMP2_HISTORY,
191 
192 	PMBUS_VIRT_READ_VMON,
193 	PMBUS_VIRT_VMON_UV_WARN_LIMIT,
194 	PMBUS_VIRT_VMON_OV_WARN_LIMIT,
195 	PMBUS_VIRT_VMON_UV_FAULT_LIMIT,
196 	PMBUS_VIRT_VMON_OV_FAULT_LIMIT,
197 	PMBUS_VIRT_STATUS_VMON,
198 
199 	/*
200 	 * RPM and PWM Fan control
201 	 *
202 	 * Drivers wanting to expose PWM control must define the behaviour of
203 	 * PMBUS_VIRT_PWM_[1-4] and PMBUS_VIRT_PWM_ENABLE_[1-4] in the
204 	 * {read,write}_word_data callback.
205 	 *
206 	 * pmbus core provides a default implementation for
207 	 * PMBUS_VIRT_FAN_TARGET_[1-4].
208 	 *
209 	 * TARGET, PWM and PWM_ENABLE members must be defined sequentially;
210 	 * pmbus core uses the difference between the provided register and
211 	 * it's _1 counterpart to calculate the FAN/PWM ID.
212 	 */
213 	PMBUS_VIRT_FAN_TARGET_1,
214 	PMBUS_VIRT_FAN_TARGET_2,
215 	PMBUS_VIRT_FAN_TARGET_3,
216 	PMBUS_VIRT_FAN_TARGET_4,
217 	PMBUS_VIRT_PWM_1,
218 	PMBUS_VIRT_PWM_2,
219 	PMBUS_VIRT_PWM_3,
220 	PMBUS_VIRT_PWM_4,
221 	PMBUS_VIRT_PWM_ENABLE_1,
222 	PMBUS_VIRT_PWM_ENABLE_2,
223 	PMBUS_VIRT_PWM_ENABLE_3,
224 	PMBUS_VIRT_PWM_ENABLE_4,
225 
226 	/* Samples for average
227 	 *
228 	 * Drivers wanting to expose functionality for changing the number of
229 	 * samples used for average values should implement support in
230 	 * {read,write}_word_data callback for either PMBUS_VIRT_SAMPLES if it
231 	 * applies to all types of measurements, or any number of specific
232 	 * PMBUS_VIRT_*_SAMPLES registers to allow for individual control.
233 	 */
234 	PMBUS_VIRT_SAMPLES,
235 	PMBUS_VIRT_IN_SAMPLES,
236 	PMBUS_VIRT_CURR_SAMPLES,
237 	PMBUS_VIRT_POWER_SAMPLES,
238 	PMBUS_VIRT_TEMP_SAMPLES,
239 };
240 
241 /*
242  * OPERATION
243  */
244 #define PB_OPERATION_CONTROL_ON		BIT(7)
245 
246 /*
247  * WRITE_PROTECT
248  */
249 #define PB_WP_ALL	BIT(7)	/* all but WRITE_PROTECT */
250 #define PB_WP_OP	BIT(6)	/* all but WP, OPERATION, PAGE */
251 #define PB_WP_VOUT	BIT(5)	/* all but WP, OPERATION, PAGE, VOUT, ON_OFF */
252 
253 #define PB_WP_ANY	(PB_WP_ALL | PB_WP_OP | PB_WP_VOUT)
254 
255 /*
256  * CAPABILITY
257  */
258 #define PB_CAPABILITY_SMBALERT		BIT(4)
259 #define PB_CAPABILITY_ERROR_CHECK	BIT(7)
260 
261 /*
262  * VOUT_MODE
263  */
264 #define PB_VOUT_MODE_MODE_MASK		0xe0
265 #define PB_VOUT_MODE_PARAM_MASK		0x1f
266 
267 #define PB_VOUT_MODE_LINEAR		0x00
268 #define PB_VOUT_MODE_VID		0x20
269 #define PB_VOUT_MODE_DIRECT		0x40
270 
271 /*
272  * Fan configuration
273  */
274 #define PB_FAN_2_PULSE_MASK		(BIT(0) | BIT(1))
275 #define PB_FAN_2_RPM			BIT(2)
276 #define PB_FAN_2_INSTALLED		BIT(3)
277 #define PB_FAN_1_PULSE_MASK		(BIT(4) | BIT(5))
278 #define PB_FAN_1_RPM			BIT(6)
279 #define PB_FAN_1_INSTALLED		BIT(7)
280 
281 enum pmbus_fan_mode { percent = 0, rpm };
282 
283 /*
284  * STATUS_BYTE, STATUS_WORD (lower)
285  */
286 #define PB_STATUS_NONE_ABOVE		BIT(0)
287 #define PB_STATUS_CML			BIT(1)
288 #define PB_STATUS_TEMPERATURE		BIT(2)
289 #define PB_STATUS_VIN_UV		BIT(3)
290 #define PB_STATUS_IOUT_OC		BIT(4)
291 #define PB_STATUS_VOUT_OV		BIT(5)
292 #define PB_STATUS_OFF			BIT(6)
293 #define PB_STATUS_BUSY			BIT(7)
294 
295 /*
296  * STATUS_WORD (upper)
297  */
298 #define PB_STATUS_UNKNOWN		BIT(8)
299 #define PB_STATUS_OTHER			BIT(9)
300 #define PB_STATUS_FANS			BIT(10)
301 #define PB_STATUS_POWER_GOOD_N		BIT(11)
302 #define PB_STATUS_WORD_MFR		BIT(12)
303 #define PB_STATUS_INPUT			BIT(13)
304 #define PB_STATUS_IOUT_POUT		BIT(14)
305 #define PB_STATUS_VOUT			BIT(15)
306 
307 /*
308  * STATUS_IOUT
309  */
310 #define PB_POUT_OP_WARNING		BIT(0)
311 #define PB_POUT_OP_FAULT		BIT(1)
312 #define PB_POWER_LIMITING		BIT(2)
313 #define PB_CURRENT_SHARE_FAULT		BIT(3)
314 #define PB_IOUT_UC_FAULT		BIT(4)
315 #define PB_IOUT_OC_WARNING		BIT(5)
316 #define PB_IOUT_OC_LV_FAULT		BIT(6)
317 #define PB_IOUT_OC_FAULT		BIT(7)
318 
319 /*
320  * STATUS_VOUT, STATUS_INPUT
321  */
322 #define PB_VOLTAGE_VIN_OFF		BIT(3)
323 #define PB_VOLTAGE_UV_FAULT		BIT(4)
324 #define PB_VOLTAGE_UV_WARNING		BIT(5)
325 #define PB_VOLTAGE_OV_WARNING		BIT(6)
326 #define PB_VOLTAGE_OV_FAULT		BIT(7)
327 
328 /*
329  * STATUS_INPUT
330  */
331 #define PB_PIN_OP_WARNING		BIT(0)
332 #define PB_IIN_OC_WARNING		BIT(1)
333 #define PB_IIN_OC_FAULT			BIT(2)
334 
335 /*
336  * STATUS_TEMPERATURE
337  */
338 #define PB_TEMP_UT_FAULT		BIT(4)
339 #define PB_TEMP_UT_WARNING		BIT(5)
340 #define PB_TEMP_OT_WARNING		BIT(6)
341 #define PB_TEMP_OT_FAULT		BIT(7)
342 
343 /*
344  * STATUS_FAN
345  */
346 #define PB_FAN_AIRFLOW_WARNING		BIT(0)
347 #define PB_FAN_AIRFLOW_FAULT		BIT(1)
348 #define PB_FAN_FAN2_SPEED_OVERRIDE	BIT(2)
349 #define PB_FAN_FAN1_SPEED_OVERRIDE	BIT(3)
350 #define PB_FAN_FAN2_WARNING		BIT(4)
351 #define PB_FAN_FAN1_WARNING		BIT(5)
352 #define PB_FAN_FAN2_FAULT		BIT(6)
353 #define PB_FAN_FAN1_FAULT		BIT(7)
354 
355 /*
356  * CML_FAULT_STATUS
357  */
358 #define PB_CML_FAULT_OTHER_MEM_LOGIC	BIT(0)
359 #define PB_CML_FAULT_OTHER_COMM		BIT(1)
360 #define PB_CML_FAULT_PROCESSOR		BIT(3)
361 #define PB_CML_FAULT_MEMORY		BIT(4)
362 #define PB_CML_FAULT_PACKET_ERROR	BIT(5)
363 #define PB_CML_FAULT_INVALID_DATA	BIT(6)
364 #define PB_CML_FAULT_INVALID_COMMAND	BIT(7)
365 
366 enum pmbus_sensor_classes {
367 	PSC_VOLTAGE_IN = 0,
368 	PSC_VOLTAGE_OUT,
369 	PSC_CURRENT_IN,
370 	PSC_CURRENT_OUT,
371 	PSC_POWER,
372 	PSC_TEMPERATURE,
373 	PSC_FAN,
374 	PSC_PWM,
375 	PSC_NUM_CLASSES		/* Number of power sensor classes */
376 };
377 
378 #define PMBUS_PAGES	32	/* Per PMBus specification */
379 #define PMBUS_PHASES	10	/* Maximum number of phases per page */
380 
381 /* Functionality bit mask */
382 #define PMBUS_HAVE_VIN		BIT(0)
383 #define PMBUS_HAVE_VCAP		BIT(1)
384 #define PMBUS_HAVE_VOUT		BIT(2)
385 #define PMBUS_HAVE_IIN		BIT(3)
386 #define PMBUS_HAVE_IOUT		BIT(4)
387 #define PMBUS_HAVE_PIN		BIT(5)
388 #define PMBUS_HAVE_POUT		BIT(6)
389 #define PMBUS_HAVE_FAN12	BIT(7)
390 #define PMBUS_HAVE_FAN34	BIT(8)
391 #define PMBUS_HAVE_TEMP		BIT(9)
392 #define PMBUS_HAVE_TEMP2	BIT(10)
393 #define PMBUS_HAVE_TEMP3	BIT(11)
394 #define PMBUS_HAVE_STATUS_VOUT	BIT(12)
395 #define PMBUS_HAVE_STATUS_IOUT	BIT(13)
396 #define PMBUS_HAVE_STATUS_INPUT	BIT(14)
397 #define PMBUS_HAVE_STATUS_TEMP	BIT(15)
398 #define PMBUS_HAVE_STATUS_FAN12	BIT(16)
399 #define PMBUS_HAVE_STATUS_FAN34	BIT(17)
400 #define PMBUS_HAVE_VMON		BIT(18)
401 #define PMBUS_HAVE_STATUS_VMON	BIT(19)
402 #define PMBUS_HAVE_PWM12	BIT(20)
403 #define PMBUS_HAVE_PWM34	BIT(21)
404 #define PMBUS_HAVE_SAMPLES	BIT(22)
405 
406 #define PMBUS_PHASE_VIRTUAL	BIT(30)	/* Phases on this page are virtual */
407 #define PMBUS_PAGE_VIRTUAL	BIT(31)	/* Page is virtual */
408 
409 enum pmbus_data_format { linear = 0, direct, vid };
410 enum vrm_version { vr11 = 0, vr12, vr13, imvp9, amd625mv };
411 
412 struct pmbus_driver_info {
413 	int pages;		/* Total number of pages */
414 	u8 phases[PMBUS_PAGES];	/* Number of phases per page */
415 	enum pmbus_data_format format[PSC_NUM_CLASSES];
416 	enum vrm_version vrm_version[PMBUS_PAGES]; /* vrm version per page */
417 	/*
418 	 * Support one set of coefficients for each sensor type
419 	 * Used for chips providing data in direct mode.
420 	 */
421 	int m[PSC_NUM_CLASSES];	/* mantissa for direct data format */
422 	int b[PSC_NUM_CLASSES];	/* offset */
423 	int R[PSC_NUM_CLASSES];	/* exponent */
424 
425 	u32 func[PMBUS_PAGES];	/* Functionality, per page */
426 	u32 pfunc[PMBUS_PHASES];/* Functionality, per phase */
427 	/*
428 	 * The following functions map manufacturing specific register values
429 	 * to PMBus standard register values. Specify only if mapping is
430 	 * necessary.
431 	 * Functions return the register value (read) or zero (write) if
432 	 * successful. A return value of -ENODATA indicates that there is no
433 	 * manufacturer specific register, but that a standard PMBus register
434 	 * may exist. Any other negative return value indicates that the
435 	 * register does not exist, and that no attempt should be made to read
436 	 * the standard register.
437 	 */
438 	int (*read_byte_data)(struct i2c_client *client, int page, int reg);
439 	int (*read_word_data)(struct i2c_client *client, int page, int phase,
440 			      int reg);
441 	int (*write_byte_data)(struct i2c_client *client, int page, int reg,
442 			      u8 byte);
443 	int (*write_word_data)(struct i2c_client *client, int page, int reg,
444 			       u16 word);
445 	int (*write_byte)(struct i2c_client *client, int page, u8 value);
446 	/*
447 	 * The identify function determines supported PMBus functionality.
448 	 * This function is only necessary if a chip driver supports multiple
449 	 * chips, and the chip functionality is not pre-determined.
450 	 */
451 	int (*identify)(struct i2c_client *client,
452 			struct pmbus_driver_info *info);
453 
454 	/* Regulator functionality, if supported by this chip driver. */
455 	int num_regulators;
456 	const struct regulator_desc *reg_desc;
457 
458 	/* custom attributes */
459 	const struct attribute_group **groups;
460 };
461 
462 /* Regulator ops */
463 
464 extern const struct regulator_ops pmbus_regulator_ops;
465 
466 /* Macro for filling in array of struct regulator_desc */
467 #define PMBUS_REGULATOR(_name, _id)				\
468 	[_id] = {						\
469 		.name = (_name # _id),				\
470 		.supply_name = "vin",				\
471 		.id = (_id),					\
472 		.of_match = of_match_ptr(_name # _id),		\
473 		.regulators_node = of_match_ptr("regulators"),	\
474 		.ops = &pmbus_regulator_ops,			\
475 		.type = REGULATOR_VOLTAGE,			\
476 		.owner = THIS_MODULE,				\
477 	}
478 
479 /* Function declarations */
480 
481 void pmbus_clear_cache(struct i2c_client *client);
482 void pmbus_set_update(struct i2c_client *client, u8 reg, bool update);
483 int pmbus_set_page(struct i2c_client *client, int page, int phase);
484 int pmbus_read_word_data(struct i2c_client *client, int page, int phase,
485 			 u8 reg);
486 int pmbus_write_word_data(struct i2c_client *client, int page, u8 reg,
487 			  u16 word);
488 int pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg);
489 int pmbus_write_byte(struct i2c_client *client, int page, u8 value);
490 int pmbus_write_byte_data(struct i2c_client *client, int page, u8 reg,
491 			  u8 value);
492 int pmbus_update_byte_data(struct i2c_client *client, int page, u8 reg,
493 			   u8 mask, u8 value);
494 void pmbus_clear_faults(struct i2c_client *client);
495 bool pmbus_check_byte_register(struct i2c_client *client, int page, int reg);
496 bool pmbus_check_word_register(struct i2c_client *client, int page, int reg);
497 int pmbus_do_probe(struct i2c_client *client, struct pmbus_driver_info *info);
498 const struct pmbus_driver_info *pmbus_get_driver_info(struct i2c_client
499 						      *client);
500 int pmbus_get_fan_rate_device(struct i2c_client *client, int page, int id,
501 			      enum pmbus_fan_mode mode);
502 int pmbus_get_fan_rate_cached(struct i2c_client *client, int page, int id,
503 			      enum pmbus_fan_mode mode);
504 int pmbus_update_fan(struct i2c_client *client, int page, int id,
505 		     u8 config, u8 mask, u16 command);
506 struct dentry *pmbus_get_debugfs_dir(struct i2c_client *client);
507 
508 #endif /* PMBUS_H */
509