1 /* 2 * Copyright (c) 2010 Broadcom Corporation 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION 13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN 14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef _wlc_phy_h_ 18 #define _wlc_phy_h_ 19 20 #include <wlioctl.h> 21 #include <siutils.h> 22 #include <d11.h> 23 #include <wlc_phy_shim.h> 24 25 #define IDCODE_VER_MASK 0x0000000f 26 #define IDCODE_VER_SHIFT 0 27 #define IDCODE_MFG_MASK 0x00000fff 28 #define IDCODE_MFG_SHIFT 0 29 #define IDCODE_ID_MASK 0x0ffff000 30 #define IDCODE_ID_SHIFT 12 31 #define IDCODE_REV_MASK 0xf0000000 32 #define IDCODE_REV_SHIFT 28 33 34 #define NORADIO_ID 0xe4f5 35 #define NORADIO_IDCODE 0x4e4f5246 36 37 #define BCM2055_ID 0x2055 38 #define BCM2055_IDCODE 0x02055000 39 #define BCM2055A0_IDCODE 0x1205517f 40 41 #define BCM2056_ID 0x2056 42 #define BCM2056_IDCODE 0x02056000 43 #define BCM2056A0_IDCODE 0x1205617f 44 45 #define BCM2057_ID 0x2057 46 #define BCM2057_IDCODE 0x02057000 47 #define BCM2057A0_IDCODE 0x1205717f 48 49 #define BCM2064_ID 0x2064 50 #define BCM2064_IDCODE 0x02064000 51 #define BCM2064A0_IDCODE 0x0206417f 52 53 #define PHY_TPC_HW_OFF false 54 #define PHY_TPC_HW_ON true 55 56 #define PHY_PERICAL_DRIVERUP 1 57 #define PHY_PERICAL_WATCHDOG 2 58 #define PHY_PERICAL_PHYINIT 3 59 #define PHY_PERICAL_JOIN_BSS 4 60 #define PHY_PERICAL_START_IBSS 5 61 #define PHY_PERICAL_UP_BSS 6 62 #define PHY_PERICAL_CHAN 7 63 #define PHY_FULLCAL 8 64 65 #define PHY_PERICAL_DISABLE 0 66 #define PHY_PERICAL_SPHASE 1 67 #define PHY_PERICAL_MPHASE 2 68 #define PHY_PERICAL_MANUAL 3 69 70 #define PHY_HOLD_FOR_ASSOC 1 71 #define PHY_HOLD_FOR_SCAN 2 72 #define PHY_HOLD_FOR_RM 4 73 #define PHY_HOLD_FOR_PLT 8 74 #define PHY_HOLD_FOR_MUTE 16 75 #define PHY_HOLD_FOR_NOT_ASSOC 0x20 76 77 #define PHY_MUTE_FOR_PREISM 1 78 #define PHY_MUTE_ALL 0xffffffff 79 80 #define PHY_NOISE_FIXED_VAL (-95) 81 #define PHY_NOISE_FIXED_VAL_NPHY (-92) 82 #define PHY_NOISE_FIXED_VAL_LCNPHY (-92) 83 84 #define PHY_MODE_CAL 0x0002 85 #define PHY_MODE_NOISEM 0x0004 86 87 #define WLC_TXPWR_DB_FACTOR 4 88 89 #define WLC_NUM_RATES_CCK 4 90 #define WLC_NUM_RATES_OFDM 8 91 #define WLC_NUM_RATES_MCS_1_STREAM 8 92 #define WLC_NUM_RATES_MCS_2_STREAM 8 93 #define WLC_NUM_RATES_MCS_3_STREAM 8 94 #define WLC_NUM_RATES_MCS_4_STREAM 8 95 typedef struct txpwr_limits { 96 u8 cck[WLC_NUM_RATES_CCK]; 97 u8 ofdm[WLC_NUM_RATES_OFDM]; 98 99 u8 ofdm_cdd[WLC_NUM_RATES_OFDM]; 100 101 u8 ofdm_40_siso[WLC_NUM_RATES_OFDM]; 102 u8 ofdm_40_cdd[WLC_NUM_RATES_OFDM]; 103 104 u8 mcs_20_siso[WLC_NUM_RATES_MCS_1_STREAM]; 105 u8 mcs_20_cdd[WLC_NUM_RATES_MCS_1_STREAM]; 106 u8 mcs_20_stbc[WLC_NUM_RATES_MCS_1_STREAM]; 107 u8 mcs_20_mimo[WLC_NUM_RATES_MCS_2_STREAM]; 108 109 u8 mcs_40_siso[WLC_NUM_RATES_MCS_1_STREAM]; 110 u8 mcs_40_cdd[WLC_NUM_RATES_MCS_1_STREAM]; 111 u8 mcs_40_stbc[WLC_NUM_RATES_MCS_1_STREAM]; 112 u8 mcs_40_mimo[WLC_NUM_RATES_MCS_2_STREAM]; 113 u8 mcs32; 114 } txpwr_limits_t; 115 116 typedef struct { 117 u8 vec[MAXCHANNEL / NBBY]; 118 } chanvec_t; 119 120 struct rpc_info; 121 typedef struct shared_phy shared_phy_t; 122 123 struct phy_pub; 124 125 typedef struct phy_pub wlc_phy_t; 126 127 typedef struct shared_phy_params { 128 si_t *sih; 129 void *physhim; 130 uint unit; 131 uint corerev; 132 uint bustype; 133 uint buscorerev; 134 char *vars; 135 u16 vid; 136 u16 did; 137 uint chip; 138 uint chiprev; 139 uint chippkg; 140 uint sromrev; 141 uint boardtype; 142 uint boardrev; 143 uint boardvendor; 144 u32 boardflags; 145 u32 boardflags2; 146 } shared_phy_params_t; 147 148 149 extern shared_phy_t *wlc_phy_shared_attach(shared_phy_params_t *shp); 150 extern void wlc_phy_shared_detach(shared_phy_t *phy_sh); 151 extern wlc_phy_t *wlc_phy_attach(shared_phy_t *sh, void *regs, int bandtype, 152 char *vars); 153 extern void wlc_phy_detach(wlc_phy_t *ppi); 154 155 extern bool wlc_phy_get_phyversion(wlc_phy_t *pih, u16 *phytype, 156 u16 *phyrev, u16 *radioid, 157 u16 *radiover); 158 extern bool wlc_phy_get_encore(wlc_phy_t *pih); 159 extern u32 wlc_phy_get_coreflags(wlc_phy_t *pih); 160 161 extern void wlc_phy_hw_clk_state_upd(wlc_phy_t *ppi, bool newstate); 162 extern void wlc_phy_hw_state_upd(wlc_phy_t *ppi, bool newstate); 163 extern void wlc_phy_init(wlc_phy_t *ppi, chanspec_t chanspec); 164 extern void wlc_phy_watchdog(wlc_phy_t *ppi); 165 extern int wlc_phy_down(wlc_phy_t *ppi); 166 extern u32 wlc_phy_clk_bwbits(wlc_phy_t *pih); 167 extern void wlc_phy_cal_init(wlc_phy_t *ppi); 168 extern void wlc_phy_antsel_init(wlc_phy_t *ppi, bool lut_init); 169 170 extern void wlc_phy_chanspec_set(wlc_phy_t *ppi, chanspec_t chanspec); 171 extern chanspec_t wlc_phy_chanspec_get(wlc_phy_t *ppi); 172 extern void wlc_phy_chanspec_radio_set(wlc_phy_t *ppi, chanspec_t newch); 173 extern u16 wlc_phy_bw_state_get(wlc_phy_t *ppi); 174 extern void wlc_phy_bw_state_set(wlc_phy_t *ppi, u16 bw); 175 176 extern void wlc_phy_rssi_compute(wlc_phy_t *pih, void *ctx); 177 extern void wlc_phy_por_inform(wlc_phy_t *ppi); 178 extern void wlc_phy_noise_sample_intr(wlc_phy_t *ppi); 179 extern bool wlc_phy_bist_check_phy(wlc_phy_t *ppi); 180 181 extern void wlc_phy_set_deaf(wlc_phy_t *ppi, bool user_flag); 182 183 extern void wlc_phy_switch_radio(wlc_phy_t *ppi, bool on); 184 extern void wlc_phy_anacore(wlc_phy_t *ppi, bool on); 185 186 187 extern void wlc_phy_BSSinit(wlc_phy_t *ppi, bool bonlyap, int rssi); 188 189 extern void wlc_phy_chanspec_ch14_widefilter_set(wlc_phy_t *ppi, 190 bool wide_filter); 191 extern void wlc_phy_chanspec_band_validch(wlc_phy_t *ppi, uint band, 192 chanvec_t *channels); 193 extern chanspec_t wlc_phy_chanspec_band_firstch(wlc_phy_t *ppi, uint band); 194 195 extern void wlc_phy_txpower_sromlimit(wlc_phy_t *ppi, uint chan, 196 u8 *_min_, u8 *_max_, int rate); 197 extern void wlc_phy_txpower_sromlimit_max_get(wlc_phy_t *ppi, uint chan, 198 u8 *_max_, u8 *_min_); 199 extern void wlc_phy_txpower_boardlimit_band(wlc_phy_t *ppi, uint band, s32 *, 200 s32 *, u32 *); 201 extern void wlc_phy_txpower_limit_set(wlc_phy_t *ppi, struct txpwr_limits *, 202 chanspec_t chanspec); 203 extern int wlc_phy_txpower_get(wlc_phy_t *ppi, uint *qdbm, bool *override); 204 extern int wlc_phy_txpower_set(wlc_phy_t *ppi, uint qdbm, bool override); 205 extern void wlc_phy_txpower_target_set(wlc_phy_t *ppi, struct txpwr_limits *); 206 extern bool wlc_phy_txpower_hw_ctrl_get(wlc_phy_t *ppi); 207 extern void wlc_phy_txpower_hw_ctrl_set(wlc_phy_t *ppi, bool hwpwrctrl); 208 extern u8 wlc_phy_txpower_get_target_min(wlc_phy_t *ppi); 209 extern u8 wlc_phy_txpower_get_target_max(wlc_phy_t *ppi); 210 extern bool wlc_phy_txpower_ipa_ison(wlc_phy_t *pih); 211 212 extern void wlc_phy_stf_chain_init(wlc_phy_t *pih, u8 txchain, 213 u8 rxchain); 214 extern void wlc_phy_stf_chain_set(wlc_phy_t *pih, u8 txchain, 215 u8 rxchain); 216 extern void wlc_phy_stf_chain_get(wlc_phy_t *pih, u8 *txchain, 217 u8 *rxchain); 218 extern u8 wlc_phy_stf_chain_active_get(wlc_phy_t *pih); 219 extern s8 wlc_phy_stf_ssmode_get(wlc_phy_t *pih, chanspec_t chanspec); 220 extern void wlc_phy_ldpc_override_set(wlc_phy_t *ppi, bool val); 221 222 extern void wlc_phy_cal_perical(wlc_phy_t *ppi, u8 reason); 223 extern void wlc_phy_noise_sample_request_external(wlc_phy_t *ppi); 224 extern void wlc_phy_edcrs_lock(wlc_phy_t *pih, bool lock); 225 extern void wlc_phy_cal_papd_recal(wlc_phy_t *ppi); 226 227 extern void wlc_phy_ant_rxdiv_set(wlc_phy_t *ppi, u8 val); 228 extern bool wlc_phy_ant_rxdiv_get(wlc_phy_t *ppi, u8 *pval); 229 extern void wlc_phy_clear_tssi(wlc_phy_t *ppi); 230 extern void wlc_phy_hold_upd(wlc_phy_t *ppi, mbool id, bool val); 231 extern void wlc_phy_mute_upd(wlc_phy_t *ppi, bool val, mbool flags); 232 233 extern void wlc_phy_antsel_type_set(wlc_phy_t *ppi, u8 antsel_type); 234 235 extern void wlc_phy_txpower_get_current(wlc_phy_t *ppi, tx_power_t *power, 236 uint channel); 237 238 extern void wlc_phy_initcal_enable(wlc_phy_t *pih, bool initcal); 239 extern bool wlc_phy_test_ison(wlc_phy_t *ppi); 240 extern void wlc_phy_txpwr_percent_set(wlc_phy_t *ppi, u8 txpwr_percent); 241 extern void wlc_phy_ofdm_rateset_war(wlc_phy_t *pih, bool war); 242 extern void wlc_phy_bf_preempt_enable(wlc_phy_t *pih, bool bf_preempt); 243 extern void wlc_phy_machwcap_set(wlc_phy_t *ppi, u32 machwcap); 244 245 extern void wlc_phy_runbist_config(wlc_phy_t *ppi, bool start_end); 246 247 extern void wlc_phy_freqtrack_start(wlc_phy_t *ppi); 248 extern void wlc_phy_freqtrack_end(wlc_phy_t *ppi); 249 250 extern const u8 *wlc_phy_get_ofdm_rate_lookup(void); 251 252 extern s8 wlc_phy_get_tx_power_offset_by_mcs(wlc_phy_t *ppi, 253 u8 mcs_offset); 254 extern s8 wlc_phy_get_tx_power_offset(wlc_phy_t *ppi, u8 tbl_offset); 255 #endif /* _wlc_phy_h_ */ 256