1 /*
2  * linux/include/asm-arm/arch-sa1100/pfs168.h
3  *
4  * Created 2000/06/05 by Nicolas Pitre <nico@cam.org>
5  *
6  * This file contains the hardware specific definitions for PFS-168
7  *
8  */
9 
10 #ifndef __ASM_ARCH_HARDWARE_H
11 #error "include <asm/hardware.h> instead"
12 #endif
13 
14 
15 /* GPIOs for which the generic definition doesn't say much */
16 #define GPIO_RADIO_IRQ		GPIO_GPIO (14)	/* Radio interrupt request  */
17 #define GPIO_L3_I2C_SDA		GPIO_GPIO (15)	/* L3 and SMB control ports */
18 #define GPIO_PS_MODE_SYNC	GPIO_GPIO (16)	/* Power supply mode/sync   */
19 #define GPIO_L3_MODE		GPIO_GPIO (17)	/* L3 mode signal with LED  */
20 #define GPIO_L3_I2C_SCL		GPIO_GPIO (18)	/* L3 and I2C control ports */
21 #define GPIO_STEREO_64FS_CLK	GPIO_GPIO (19)	/* SSP UDA1341 clock input  */
22 #define GPIO_CF_IRQ		GPIO_GPIO (21)	/* CF IRQ   */
23 #define GPIO_MBGNT		GPIO_GPIO (21)	/* 1111 MBGNT */
24 #define GPIO_CF_CD		GPIO_GPIO (22)	/* CF CD */
25 #define GPIO_MBREQ		GPIO_GPIO (22)	/* 1111 MBREQ */
26 #define GPIO_UCB1300_IRQ	GPIO_GPIO (23)	/* UCB GPIO and touchscreen */
27 #define GPIO_CF_BVD2		GPIO_GPIO (24)	/* CF BVD */
28 #define GPIO_GFX_IRQ		GPIO_GPIO (24)	/* Graphics IRQ */
29 #define GPIO_CF_BVD1		GPIO_GPIO (25)	/* CF BVD */
30 #define GPIO_NEP_IRQ		GPIO_GPIO (25)	/* Neponset IRQ */
31 #define GPIO_BATT_LOW		GPIO_GPIO (26)	/* Low battery */
32 #define GPIO_RCLK		GPIO_GPIO (26)	/* CCLK/2  */
33 
34 #define IRQ_GPIO_CF_IRQ		IRQ_GPIO21
35 #define IRQ_GPIO_CF_CD		IRQ_GPIO22
36 #define IRQ_GPIO_MBREQ		IRQ_GPIO22
37 #define IRQ_GPIO_UCB1300_IRQ	IRQ_GPIO23
38 #define IRQ_GPIO_CF_BVD2	IRQ_GPIO24
39 #define IRQ_GPIO_CF_BVD1	IRQ_GPIO25
40 #define IRQ_GPIO_NEP_IRQ	IRQ_GPIO25
41 
42 
43 /*
44  * PFS-168 definitions:
45  */
46 
47 #define PFS168_SA1111_BASE	(0x40000000)
48 
49 #ifndef __ASSEMBLY__
50 #define machine_has_neponset() (0)
51 
52 #define PFS168_COM5_VBASE		(*((volatile unsigned char *)(0xf0000000UL)))
53 #define PFS168_COM6_VBASE		(*((volatile unsigned char *)(0xf0001000UL)))
54 #define PFS168_SYSC1RTS			(*((volatile unsigned char *)(0xf0002000UL)))
55 #define PFS168_SYSLED			(*((volatile unsigned char *)(0xf0003000UL)))
56 #define PFS168_SYSDTMF			(*((volatile unsigned char *)(0xf0004000UL)))
57 #define PFS168_SYSLCDDE			(*((volatile unsigned char *)(0xf0005000UL)))
58 #define PFS168_SYSC1DSR			(*((volatile unsigned char *)(0xf0006000UL)))
59 #define PFS168_SYSC3TEN			(*((volatile unsigned char *)(0xf0007000UL)))
60 #define PFS168_SYSCTLA			(*((volatile unsigned char *)(0xf0008000UL)))
61 #define PFS168_SYSCTLB			(*((volatile unsigned char *)(0xf0009000UL)))
62 #define PFS168_ETH_VBASE		(*((volatile unsigned char *)(0xf000a000UL)))
63 #endif
64 
65 #define PFS168_SYSLCDDE_STNDE		(1<<0)	/* CSTN display enable/disable (1/0) */
66 #define PFS168_SYSLCDDE_DESEL		(1<<0)	/* Active/Passive (1/0) display enable mode */
67 
68 #define PFS168_SYSCTLA_BKLT		(1<<0)	/* LCD backlight invert on/off (1/0) */
69 #define PFS168_SYSCTLA_RLY		(1<<1)	/* Relay on/off (1/0) */
70 #define PFS168_SYSCTLA_PXON		(1<<2)	/* Opto relay connect/disconnect 1/0) */
71 #define PFS168_SYSCTLA_IRDA_FSEL	(1<<3)	/* IRDA Frequency select (0 = SIR, 1 = MIR/ FIR) */
72 
73 #define PFS168_SYSCTLB_MG1		(1<<0)	/* Motion detector gain select */
74 #define PFS168_SYSCTLB_MG0		(1<<1)	/* Motion detector gain select */
75 #define PFS168_SYSCTLB_IRDA_MD1		(1<<2)	/* Range/Power select */
76 #define PFS168_SYSCTLB_IRDA_MD0		(1<<3)	/* Range/Power select */
77 #define PFS168_SYSCTLB_IRDA_MD_MASK	(PFS168_SYSCTLB_IRDA_MD1|PFS168_SYSCTLB_IRDA_MD0)
78