1 /*
2 * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
3 */
4 #ifndef _ASM_POWERPC_HW_IRQ_H
5 #define _ASM_POWERPC_HW_IRQ_H
6
7 #ifdef __KERNEL__
8
9 #include <linux/errno.h>
10 #include <linux/compiler.h>
11 #include <asm/ptrace.h>
12 #include <asm/processor.h>
13
14 #ifdef CONFIG_PPC64
15
16 /*
17 * PACA flags in paca->irq_happened.
18 *
19 * This bits are set when interrupts occur while soft-disabled
20 * and allow a proper replay. Additionally, PACA_IRQ_HARD_DIS
21 * is set whenever we manually hard disable.
22 */
23 #define PACA_IRQ_HARD_DIS 0x01
24 #define PACA_IRQ_DBELL 0x02
25 #define PACA_IRQ_EE 0x04
26 #define PACA_IRQ_DEC 0x08 /* Or FIT */
27 #define PACA_IRQ_EE_EDGE 0x10 /* BookE only */
28
29 #endif /* CONFIG_PPC64 */
30
31 #ifndef __ASSEMBLY__
32
33 extern void __replay_interrupt(unsigned int vector);
34
35 extern void timer_interrupt(struct pt_regs *);
36
37 #ifdef CONFIG_PPC64
38 #include <asm/paca.h>
39
arch_local_save_flags(void)40 static inline unsigned long arch_local_save_flags(void)
41 {
42 unsigned long flags;
43
44 asm volatile(
45 "lbz %0,%1(13)"
46 : "=r" (flags)
47 : "i" (offsetof(struct paca_struct, soft_enabled)));
48
49 return flags;
50 }
51
arch_local_irq_disable(void)52 static inline unsigned long arch_local_irq_disable(void)
53 {
54 unsigned long flags, zero;
55
56 asm volatile(
57 "li %1,0; lbz %0,%2(13); stb %1,%2(13)"
58 : "=r" (flags), "=&r" (zero)
59 : "i" (offsetof(struct paca_struct, soft_enabled))
60 : "memory");
61
62 return flags;
63 }
64
65 extern void arch_local_irq_restore(unsigned long);
66
arch_local_irq_enable(void)67 static inline void arch_local_irq_enable(void)
68 {
69 arch_local_irq_restore(1);
70 }
71
arch_local_irq_save(void)72 static inline unsigned long arch_local_irq_save(void)
73 {
74 return arch_local_irq_disable();
75 }
76
arch_irqs_disabled_flags(unsigned long flags)77 static inline bool arch_irqs_disabled_flags(unsigned long flags)
78 {
79 return flags == 0;
80 }
81
arch_irqs_disabled(void)82 static inline bool arch_irqs_disabled(void)
83 {
84 return arch_irqs_disabled_flags(arch_local_save_flags());
85 }
86
87 #ifdef CONFIG_PPC_BOOK3E
88 #define __hard_irq_enable() asm volatile("wrteei 1" : : : "memory")
89 #define __hard_irq_disable() asm volatile("wrteei 0" : : : "memory")
90 #else
91 #define __hard_irq_enable() __mtmsrd(local_paca->kernel_msr | MSR_EE, 1)
92 #define __hard_irq_disable() __mtmsrd(local_paca->kernel_msr, 1)
93 #endif
94
hard_irq_disable(void)95 static inline void hard_irq_disable(void)
96 {
97 __hard_irq_disable();
98 get_paca()->soft_enabled = 0;
99 get_paca()->irq_happened |= PACA_IRQ_HARD_DIS;
100 }
101
102 /* include/linux/interrupt.h needs hard_irq_disable to be a macro */
103 #define hard_irq_disable hard_irq_disable
104
lazy_irq_pending(void)105 static inline bool lazy_irq_pending(void)
106 {
107 return !!(get_paca()->irq_happened & ~PACA_IRQ_HARD_DIS);
108 }
109
110 /*
111 * This is called by asynchronous interrupts to conditionally
112 * re-enable hard interrupts when soft-disabled after having
113 * cleared the source of the interrupt
114 */
may_hard_irq_enable(void)115 static inline void may_hard_irq_enable(void)
116 {
117 get_paca()->irq_happened &= ~PACA_IRQ_HARD_DIS;
118 if (!(get_paca()->irq_happened & PACA_IRQ_EE))
119 __hard_irq_enable();
120 }
121
arch_irq_disabled_regs(struct pt_regs * regs)122 static inline bool arch_irq_disabled_regs(struct pt_regs *regs)
123 {
124 return !regs->softe;
125 }
126
127 extern bool prep_irq_for_idle(void);
128
129 #else /* CONFIG_PPC64 */
130
131 #define SET_MSR_EE(x) mtmsr(x)
132
arch_local_save_flags(void)133 static inline unsigned long arch_local_save_flags(void)
134 {
135 return mfmsr();
136 }
137
arch_local_irq_restore(unsigned long flags)138 static inline void arch_local_irq_restore(unsigned long flags)
139 {
140 #if defined(CONFIG_BOOKE)
141 asm volatile("wrtee %0" : : "r" (flags) : "memory");
142 #else
143 mtmsr(flags);
144 #endif
145 }
146
arch_local_irq_save(void)147 static inline unsigned long arch_local_irq_save(void)
148 {
149 unsigned long flags = arch_local_save_flags();
150 #ifdef CONFIG_BOOKE
151 asm volatile("wrteei 0" : : : "memory");
152 #else
153 SET_MSR_EE(flags & ~MSR_EE);
154 #endif
155 return flags;
156 }
157
arch_local_irq_disable(void)158 static inline void arch_local_irq_disable(void)
159 {
160 #ifdef CONFIG_BOOKE
161 asm volatile("wrteei 0" : : : "memory");
162 #else
163 arch_local_irq_save();
164 #endif
165 }
166
arch_local_irq_enable(void)167 static inline void arch_local_irq_enable(void)
168 {
169 #ifdef CONFIG_BOOKE
170 asm volatile("wrteei 1" : : : "memory");
171 #else
172 unsigned long msr = mfmsr();
173 SET_MSR_EE(msr | MSR_EE);
174 #endif
175 }
176
arch_irqs_disabled_flags(unsigned long flags)177 static inline bool arch_irqs_disabled_flags(unsigned long flags)
178 {
179 return (flags & MSR_EE) == 0;
180 }
181
arch_irqs_disabled(void)182 static inline bool arch_irqs_disabled(void)
183 {
184 return arch_irqs_disabled_flags(arch_local_save_flags());
185 }
186
187 #define hard_irq_disable() arch_local_irq_disable()
188
arch_irq_disabled_regs(struct pt_regs * regs)189 static inline bool arch_irq_disabled_regs(struct pt_regs *regs)
190 {
191 return !(regs->msr & MSR_EE);
192 }
193
may_hard_irq_enable(void)194 static inline void may_hard_irq_enable(void) { }
195
196 #endif /* CONFIG_PPC64 */
197
198 #define ARCH_IRQ_INIT_FLAGS IRQ_NOREQUEST
199
200 /*
201 * interrupt-retrigger: should we handle this via lost interrupts and IPIs
202 * or should we not care like we do now ? --BenH.
203 */
204 struct irq_chip;
205
206 #endif /* __ASSEMBLY__ */
207 #endif /* __KERNEL__ */
208 #endif /* _ASM_POWERPC_HW_IRQ_H */
209