1 /*
2  * arch/arm/plat-omap/include/mach/omap34xx.h
3  *
4  * This file contains the processor specific definitions of the TI OMAP34XX.
5  *
6  * Copyright (C) 2007 Texas Instruments.
7  * Copyright (C) 2007 Nokia Corporation.
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License as published by
11  * the Free Software Foundation; either version 2 of the License, or
12  * (at your option) any later version.
13  *
14  * This program is distributed in the hope that it will be useful,
15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  * GNU General Public License for more details.
18  *
19  * You should have received a copy of the GNU General Public License
20  * along with this program; if not, write to the Free Software
21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
22  */
23 
24 #ifndef __ASM_ARCH_OMAP3_H
25 #define __ASM_ARCH_OMAP3_H
26 
27 /*
28  * Please place only base defines here and put the rest in device
29  * specific headers.
30  */
31 
32 #define L4_34XX_BASE		0x48000000
33 #define L4_WK_34XX_BASE		0x48300000
34 #define L4_PER_34XX_BASE	0x49000000
35 #define L4_EMU_34XX_BASE	0x54000000
36 #define L3_34XX_BASE		0x68000000
37 
38 #define L4_WK_AM33XX_BASE	0x44C00000
39 
40 #define OMAP3430_32KSYNCT_BASE	0x48320000
41 #define OMAP3430_CM_BASE	0x48004800
42 #define OMAP3430_PRM_BASE	0x48306800
43 #define OMAP343X_SMS_BASE	0x6C000000
44 #define OMAP343X_SDRC_BASE	0x6D000000
45 #define OMAP34XX_GPMC_BASE	0x6E000000
46 #define OMAP343X_SCM_BASE	0x48002000
47 #define OMAP343X_CTRL_BASE	OMAP343X_SCM_BASE
48 
49 #define OMAP34XX_IC_BASE	0x48200000
50 
51 #define OMAP3430_ISP_BASE		(L4_34XX_BASE + 0xBC000)
52 #define OMAP3430_ISP_CBUFF_BASE		(OMAP3430_ISP_BASE + 0x0100)
53 #define OMAP3430_ISP_CCP2_BASE		(OMAP3430_ISP_BASE + 0x0400)
54 #define OMAP3430_ISP_CCDC_BASE		(OMAP3430_ISP_BASE + 0x0600)
55 #define OMAP3430_ISP_HIST_BASE		(OMAP3430_ISP_BASE + 0x0A00)
56 #define OMAP3430_ISP_H3A_BASE		(OMAP3430_ISP_BASE + 0x0C00)
57 #define OMAP3430_ISP_PREV_BASE		(OMAP3430_ISP_BASE + 0x0E00)
58 #define OMAP3430_ISP_RESZ_BASE		(OMAP3430_ISP_BASE + 0x1000)
59 #define OMAP3430_ISP_SBL_BASE		(OMAP3430_ISP_BASE + 0x1200)
60 #define OMAP3430_ISP_MMU_BASE		(OMAP3430_ISP_BASE + 0x1400)
61 #define OMAP3430_ISP_CSI2A_REGS1_BASE	(OMAP3430_ISP_BASE + 0x1800)
62 #define OMAP3430_ISP_CSIPHY2_BASE	(OMAP3430_ISP_BASE + 0x1970)
63 #define OMAP3630_ISP_CSI2A_REGS2_BASE	(OMAP3430_ISP_BASE + 0x19C0)
64 #define OMAP3630_ISP_CSI2C_REGS1_BASE	(OMAP3430_ISP_BASE + 0x1C00)
65 #define OMAP3630_ISP_CSIPHY1_BASE	(OMAP3430_ISP_BASE + 0x1D70)
66 #define OMAP3630_ISP_CSI2C_REGS2_BASE	(OMAP3430_ISP_BASE + 0x1DC0)
67 
68 #define OMAP3430_ISP_END		(OMAP3430_ISP_BASE         + 0x06F)
69 #define OMAP3430_ISP_CBUFF_END		(OMAP3430_ISP_CBUFF_BASE   + 0x077)
70 #define OMAP3430_ISP_CCP2_END		(OMAP3430_ISP_CCP2_BASE    + 0x1EF)
71 #define OMAP3430_ISP_CCDC_END		(OMAP3430_ISP_CCDC_BASE    + 0x0A7)
72 #define OMAP3430_ISP_HIST_END		(OMAP3430_ISP_HIST_BASE    + 0x047)
73 #define OMAP3430_ISP_H3A_END		(OMAP3430_ISP_H3A_BASE     + 0x05F)
74 #define OMAP3430_ISP_PREV_END		(OMAP3430_ISP_PREV_BASE    + 0x09F)
75 #define OMAP3430_ISP_RESZ_END		(OMAP3430_ISP_RESZ_BASE    + 0x0AB)
76 #define OMAP3430_ISP_SBL_END		(OMAP3430_ISP_SBL_BASE     + 0x0FB)
77 #define OMAP3430_ISP_MMU_END		(OMAP3430_ISP_MMU_BASE     + 0x06F)
78 #define OMAP3430_ISP_CSI2A_REGS1_END	(OMAP3430_ISP_CSI2A_REGS1_BASE + 0x16F)
79 #define OMAP3430_ISP_CSIPHY2_END	(OMAP3430_ISP_CSIPHY2_BASE + 0x00B)
80 #define OMAP3630_ISP_CSI2A_REGS2_END	(OMAP3630_ISP_CSI2A_REGS2_BASE + 0x3F)
81 #define OMAP3630_ISP_CSI2C_REGS1_END	(OMAP3630_ISP_CSI2C_REGS1_BASE + 0x16F)
82 #define OMAP3630_ISP_CSIPHY1_END	(OMAP3630_ISP_CSIPHY1_BASE + 0x00B)
83 #define OMAP3630_ISP_CSI2C_REGS2_END	(OMAP3630_ISP_CSI2C_REGS2_BASE + 0x3F)
84 
85 #define OMAP34XX_HSUSB_OTG_BASE	(L4_34XX_BASE + 0xAB000)
86 #define OMAP34XX_USBTLL_BASE	(L4_34XX_BASE + 0x62000)
87 #define OMAP34XX_UHH_CONFIG_BASE	(L4_34XX_BASE + 0x64000)
88 #define OMAP34XX_OHCI_BASE	(L4_34XX_BASE + 0x64400)
89 #define OMAP34XX_EHCI_BASE	(L4_34XX_BASE + 0x64800)
90 #define OMAP34XX_SR1_BASE	0x480C9000
91 #define OMAP34XX_SR2_BASE	0x480CB000
92 
93 #define OMAP34XX_MAILBOX_BASE		(L4_34XX_BASE + 0x94000)
94 
95 /* Security */
96 #define OMAP34XX_SEC_BASE	(L4_34XX_BASE + 0xA0000)
97 #define OMAP34XX_SEC_SHA1MD5_BASE	(OMAP34XX_SEC_BASE + 0x23000)
98 #define OMAP34XX_SEC_AES_BASE	(OMAP34XX_SEC_BASE + 0x25000)
99 
100 #endif /* __ASM_ARCH_OMAP3_H */
101 
102