1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * libnvdimm - Non-volatile-memory Devices Subsystem
4 *
5 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
6 */
7 #ifndef __LIBNVDIMM_H__
8 #define __LIBNVDIMM_H__
9 #include <linux/kernel.h>
10 #include <linux/sizes.h>
11 #include <linux/types.h>
12 #include <linux/uuid.h>
13 #include <linux/spinlock.h>
14 #include <linux/bio.h>
15
16 struct badrange_entry {
17 u64 start;
18 u64 length;
19 struct list_head list;
20 };
21
22 struct badrange {
23 struct list_head list;
24 spinlock_t lock;
25 };
26
27 enum {
28 /* unarmed memory devices may not persist writes */
29 NDD_UNARMED = 1,
30 /* locked memory devices should not be accessed */
31 NDD_LOCKED = 2,
32 /* memory under security wipes should not be accessed */
33 NDD_SECURITY_OVERWRITE = 3,
34 /* tracking whether or not there is a pending device reference */
35 NDD_WORK_PENDING = 4,
36 /* dimm supports namespace labels */
37 NDD_LABELING = 6,
38
39 /* need to set a limit somewhere, but yes, this is likely overkill */
40 ND_IOCTL_MAX_BUFLEN = SZ_4M,
41 ND_CMD_MAX_ELEM = 5,
42 ND_CMD_MAX_ENVELOPE = 256,
43 ND_MAX_MAPPINGS = 32,
44
45 /* region flag indicating to direct-map persistent memory by default */
46 ND_REGION_PAGEMAP = 0,
47 /*
48 * Platform ensures entire CPU store data path is flushed to pmem on
49 * system power loss.
50 */
51 ND_REGION_PERSIST_CACHE = 1,
52 /*
53 * Platform provides mechanisms to automatically flush outstanding
54 * write data from memory controler to pmem on system power loss.
55 * (ADR)
56 */
57 ND_REGION_PERSIST_MEMCTRL = 2,
58
59 /* Platform provides asynchronous flush mechanism */
60 ND_REGION_ASYNC = 3,
61
62 /* mark newly adjusted resources as requiring a label update */
63 DPA_RESOURCE_ADJUSTED = 1 << 0,
64 };
65
66 struct nvdimm;
67 struct nvdimm_bus_descriptor;
68 typedef int (*ndctl_fn)(struct nvdimm_bus_descriptor *nd_desc,
69 struct nvdimm *nvdimm, unsigned int cmd, void *buf,
70 unsigned int buf_len, int *cmd_rc);
71
72 struct device_node;
73 struct nvdimm_bus_descriptor {
74 const struct attribute_group **attr_groups;
75 unsigned long cmd_mask;
76 unsigned long dimm_family_mask;
77 unsigned long bus_family_mask;
78 struct module *module;
79 char *provider_name;
80 struct device_node *of_node;
81 ndctl_fn ndctl;
82 int (*flush_probe)(struct nvdimm_bus_descriptor *nd_desc);
83 int (*clear_to_send)(struct nvdimm_bus_descriptor *nd_desc,
84 struct nvdimm *nvdimm, unsigned int cmd, void *data);
85 const struct nvdimm_bus_fw_ops *fw_ops;
86 };
87
88 struct nd_cmd_desc {
89 int in_num;
90 int out_num;
91 u32 in_sizes[ND_CMD_MAX_ELEM];
92 int out_sizes[ND_CMD_MAX_ELEM];
93 };
94
95 struct nd_interleave_set {
96 /* v1.1 definition of the interleave-set-cookie algorithm */
97 u64 cookie1;
98 /* v1.2 definition of the interleave-set-cookie algorithm */
99 u64 cookie2;
100 /* compatibility with initial buggy Linux implementation */
101 u64 altcookie;
102
103 guid_t type_guid;
104 };
105
106 struct nd_mapping_desc {
107 struct nvdimm *nvdimm;
108 u64 start;
109 u64 size;
110 int position;
111 };
112
113 struct nd_region;
114 struct nd_region_desc {
115 struct resource *res;
116 struct nd_mapping_desc *mapping;
117 u16 num_mappings;
118 const struct attribute_group **attr_groups;
119 struct nd_interleave_set *nd_set;
120 void *provider_data;
121 int num_lanes;
122 int numa_node;
123 int target_node;
124 unsigned long flags;
125 struct device_node *of_node;
126 int (*flush)(struct nd_region *nd_region, struct bio *bio);
127 };
128
129 struct device;
130 void *devm_nvdimm_memremap(struct device *dev, resource_size_t offset,
131 size_t size, unsigned long flags);
devm_nvdimm_ioremap(struct device * dev,resource_size_t offset,size_t size)132 static inline void __iomem *devm_nvdimm_ioremap(struct device *dev,
133 resource_size_t offset, size_t size)
134 {
135 return (void __iomem *) devm_nvdimm_memremap(dev, offset, size, 0);
136 }
137
138 struct nvdimm_bus;
139
140 /*
141 * Note that separate bits for locked + unlocked are defined so that
142 * 'flags == 0' corresponds to an error / not-supported state.
143 */
144 enum nvdimm_security_bits {
145 NVDIMM_SECURITY_DISABLED,
146 NVDIMM_SECURITY_UNLOCKED,
147 NVDIMM_SECURITY_LOCKED,
148 NVDIMM_SECURITY_FROZEN,
149 NVDIMM_SECURITY_OVERWRITE,
150 };
151
152 #define NVDIMM_PASSPHRASE_LEN 32
153 #define NVDIMM_KEY_DESC_LEN 22
154
155 struct nvdimm_key_data {
156 u8 data[NVDIMM_PASSPHRASE_LEN];
157 };
158
159 enum nvdimm_passphrase_type {
160 NVDIMM_USER,
161 NVDIMM_MASTER,
162 };
163
164 struct nvdimm_security_ops {
165 unsigned long (*get_flags)(struct nvdimm *nvdimm,
166 enum nvdimm_passphrase_type pass_type);
167 int (*freeze)(struct nvdimm *nvdimm);
168 int (*change_key)(struct nvdimm *nvdimm,
169 const struct nvdimm_key_data *old_data,
170 const struct nvdimm_key_data *new_data,
171 enum nvdimm_passphrase_type pass_type);
172 int (*unlock)(struct nvdimm *nvdimm,
173 const struct nvdimm_key_data *key_data);
174 int (*disable)(struct nvdimm *nvdimm,
175 const struct nvdimm_key_data *key_data);
176 int (*erase)(struct nvdimm *nvdimm,
177 const struct nvdimm_key_data *key_data,
178 enum nvdimm_passphrase_type pass_type);
179 int (*overwrite)(struct nvdimm *nvdimm,
180 const struct nvdimm_key_data *key_data);
181 int (*query_overwrite)(struct nvdimm *nvdimm);
182 };
183
184 enum nvdimm_fwa_state {
185 NVDIMM_FWA_INVALID,
186 NVDIMM_FWA_IDLE,
187 NVDIMM_FWA_ARMED,
188 NVDIMM_FWA_BUSY,
189 NVDIMM_FWA_ARM_OVERFLOW,
190 };
191
192 enum nvdimm_fwa_trigger {
193 NVDIMM_FWA_ARM,
194 NVDIMM_FWA_DISARM,
195 };
196
197 enum nvdimm_fwa_capability {
198 NVDIMM_FWA_CAP_INVALID,
199 NVDIMM_FWA_CAP_NONE,
200 NVDIMM_FWA_CAP_QUIESCE,
201 NVDIMM_FWA_CAP_LIVE,
202 };
203
204 enum nvdimm_fwa_result {
205 NVDIMM_FWA_RESULT_INVALID,
206 NVDIMM_FWA_RESULT_NONE,
207 NVDIMM_FWA_RESULT_SUCCESS,
208 NVDIMM_FWA_RESULT_NOTSTAGED,
209 NVDIMM_FWA_RESULT_NEEDRESET,
210 NVDIMM_FWA_RESULT_FAIL,
211 };
212
213 struct nvdimm_bus_fw_ops {
214 enum nvdimm_fwa_state (*activate_state)
215 (struct nvdimm_bus_descriptor *nd_desc);
216 enum nvdimm_fwa_capability (*capability)
217 (struct nvdimm_bus_descriptor *nd_desc);
218 int (*activate)(struct nvdimm_bus_descriptor *nd_desc);
219 };
220
221 struct nvdimm_fw_ops {
222 enum nvdimm_fwa_state (*activate_state)(struct nvdimm *nvdimm);
223 enum nvdimm_fwa_result (*activate_result)(struct nvdimm *nvdimm);
224 int (*arm)(struct nvdimm *nvdimm, enum nvdimm_fwa_trigger arg);
225 };
226
227 void badrange_init(struct badrange *badrange);
228 int badrange_add(struct badrange *badrange, u64 addr, u64 length);
229 void badrange_forget(struct badrange *badrange, phys_addr_t start,
230 unsigned int len);
231 int nvdimm_bus_add_badrange(struct nvdimm_bus *nvdimm_bus, u64 addr,
232 u64 length);
233 struct nvdimm_bus *nvdimm_bus_register(struct device *parent,
234 struct nvdimm_bus_descriptor *nfit_desc);
235 void nvdimm_bus_unregister(struct nvdimm_bus *nvdimm_bus);
236 struct nvdimm_bus *to_nvdimm_bus(struct device *dev);
237 struct nvdimm_bus *nvdimm_to_bus(struct nvdimm *nvdimm);
238 struct nvdimm *to_nvdimm(struct device *dev);
239 struct nd_region *to_nd_region(struct device *dev);
240 struct device *nd_region_dev(struct nd_region *nd_region);
241 struct nvdimm_bus_descriptor *to_nd_desc(struct nvdimm_bus *nvdimm_bus);
242 struct device *to_nvdimm_bus_dev(struct nvdimm_bus *nvdimm_bus);
243 const char *nvdimm_name(struct nvdimm *nvdimm);
244 struct kobject *nvdimm_kobj(struct nvdimm *nvdimm);
245 unsigned long nvdimm_cmd_mask(struct nvdimm *nvdimm);
246 void *nvdimm_provider_data(struct nvdimm *nvdimm);
247 struct nvdimm *__nvdimm_create(struct nvdimm_bus *nvdimm_bus,
248 void *provider_data, const struct attribute_group **groups,
249 unsigned long flags, unsigned long cmd_mask, int num_flush,
250 struct resource *flush_wpq, const char *dimm_id,
251 const struct nvdimm_security_ops *sec_ops,
252 const struct nvdimm_fw_ops *fw_ops);
nvdimm_create(struct nvdimm_bus * nvdimm_bus,void * provider_data,const struct attribute_group ** groups,unsigned long flags,unsigned long cmd_mask,int num_flush,struct resource * flush_wpq)253 static inline struct nvdimm *nvdimm_create(struct nvdimm_bus *nvdimm_bus,
254 void *provider_data, const struct attribute_group **groups,
255 unsigned long flags, unsigned long cmd_mask, int num_flush,
256 struct resource *flush_wpq)
257 {
258 return __nvdimm_create(nvdimm_bus, provider_data, groups, flags,
259 cmd_mask, num_flush, flush_wpq, NULL, NULL, NULL);
260 }
261 void nvdimm_delete(struct nvdimm *nvdimm);
262
263 const struct nd_cmd_desc *nd_cmd_dimm_desc(int cmd);
264 const struct nd_cmd_desc *nd_cmd_bus_desc(int cmd);
265 u32 nd_cmd_in_size(struct nvdimm *nvdimm, int cmd,
266 const struct nd_cmd_desc *desc, int idx, void *buf);
267 u32 nd_cmd_out_size(struct nvdimm *nvdimm, int cmd,
268 const struct nd_cmd_desc *desc, int idx, const u32 *in_field,
269 const u32 *out_field, unsigned long remainder);
270 int nvdimm_bus_check_dimm_count(struct nvdimm_bus *nvdimm_bus, int dimm_count);
271 struct nd_region *nvdimm_pmem_region_create(struct nvdimm_bus *nvdimm_bus,
272 struct nd_region_desc *ndr_desc);
273 struct nd_region *nvdimm_blk_region_create(struct nvdimm_bus *nvdimm_bus,
274 struct nd_region_desc *ndr_desc);
275 struct nd_region *nvdimm_volatile_region_create(struct nvdimm_bus *nvdimm_bus,
276 struct nd_region_desc *ndr_desc);
277 void *nd_region_provider_data(struct nd_region *nd_region);
278 unsigned int nd_region_acquire_lane(struct nd_region *nd_region);
279 void nd_region_release_lane(struct nd_region *nd_region, unsigned int lane);
280 u64 nd_fletcher64(void *addr, size_t len, bool le);
281 int nvdimm_flush(struct nd_region *nd_region, struct bio *bio);
282 int generic_nvdimm_flush(struct nd_region *nd_region);
283 int nvdimm_has_flush(struct nd_region *nd_region);
284 int nvdimm_has_cache(struct nd_region *nd_region);
285 int nvdimm_in_overwrite(struct nvdimm *nvdimm);
286 bool is_nvdimm_sync(struct nd_region *nd_region);
287
nvdimm_ctl(struct nvdimm * nvdimm,unsigned int cmd,void * buf,unsigned int buf_len,int * cmd_rc)288 static inline int nvdimm_ctl(struct nvdimm *nvdimm, unsigned int cmd, void *buf,
289 unsigned int buf_len, int *cmd_rc)
290 {
291 struct nvdimm_bus *nvdimm_bus = nvdimm_to_bus(nvdimm);
292 struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
293
294 return nd_desc->ndctl(nd_desc, nvdimm, cmd, buf, buf_len, cmd_rc);
295 }
296
297 #ifdef CONFIG_ARCH_HAS_PMEM_API
298 #define ARCH_MEMREMAP_PMEM MEMREMAP_WB
299 void arch_wb_cache_pmem(void *addr, size_t size);
300 void arch_invalidate_pmem(void *addr, size_t size);
301 #else
302 #define ARCH_MEMREMAP_PMEM MEMREMAP_WT
arch_wb_cache_pmem(void * addr,size_t size)303 static inline void arch_wb_cache_pmem(void *addr, size_t size)
304 {
305 }
arch_invalidate_pmem(void * addr,size_t size)306 static inline void arch_invalidate_pmem(void *addr, size_t size)
307 {
308 }
309 #endif
310
311 #endif /* __LIBNVDIMM_H__ */
312