1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Kernel-based Virtual Machine driver for Linux
4 *
5 * AMD SVM support
6 *
7 * Copyright (C) 2006 Qumranet, Inc.
8 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
9 *
10 * Authors:
11 * Yaniv Kamay <yaniv@qumranet.com>
12 * Avi Kivity <avi@qumranet.com>
13 */
14
15 #ifndef __SVM_SVM_H
16 #define __SVM_SVM_H
17
18 #include <linux/kvm_types.h>
19 #include <linux/kvm_host.h>
20 #include <linux/bits.h>
21
22 #include <asm/svm.h>
23 #include <asm/sev-common.h>
24
25 #include "kvm_cache_regs.h"
26
27 #define __sme_page_pa(x) __sme_set(page_to_pfn(x) << PAGE_SHIFT)
28
29 #define IOPM_SIZE PAGE_SIZE * 3
30 #define MSRPM_SIZE PAGE_SIZE * 2
31
32 #define MAX_DIRECT_ACCESS_MSRS 21
33 #define MSRPM_OFFSETS 16
34 extern u32 msrpm_offsets[MSRPM_OFFSETS] __read_mostly;
35 extern bool npt_enabled;
36 extern int vgif;
37 extern bool intercept_smi;
38
39 /*
40 * Clean bits in VMCB.
41 * VMCB_ALL_CLEAN_MASK might also need to
42 * be updated if this enum is modified.
43 */
44 enum {
45 VMCB_INTERCEPTS, /* Intercept vectors, TSC offset,
46 pause filter count */
47 VMCB_PERM_MAP, /* IOPM Base and MSRPM Base */
48 VMCB_ASID, /* ASID */
49 VMCB_INTR, /* int_ctl, int_vector */
50 VMCB_NPT, /* npt_en, nCR3, gPAT */
51 VMCB_CR, /* CR0, CR3, CR4, EFER */
52 VMCB_DR, /* DR6, DR7 */
53 VMCB_DT, /* GDT, IDT */
54 VMCB_SEG, /* CS, DS, SS, ES, CPL */
55 VMCB_CR2, /* CR2 only */
56 VMCB_LBR, /* DBGCTL, BR_FROM, BR_TO, LAST_EX_FROM, LAST_EX_TO */
57 VMCB_AVIC, /* AVIC APIC_BAR, AVIC APIC_BACKING_PAGE,
58 * AVIC PHYSICAL_TABLE pointer,
59 * AVIC LOGICAL_TABLE pointer
60 */
61 VMCB_SW = 31, /* Reserved for hypervisor/software use */
62 };
63
64 #define VMCB_ALL_CLEAN_MASK ( \
65 (1U << VMCB_INTERCEPTS) | (1U << VMCB_PERM_MAP) | \
66 (1U << VMCB_ASID) | (1U << VMCB_INTR) | \
67 (1U << VMCB_NPT) | (1U << VMCB_CR) | (1U << VMCB_DR) | \
68 (1U << VMCB_DT) | (1U << VMCB_SEG) | (1U << VMCB_CR2) | \
69 (1U << VMCB_LBR) | (1U << VMCB_AVIC) | \
70 (1U << VMCB_SW))
71
72 /* TPR and CR2 are always written before VMRUN */
73 #define VMCB_ALWAYS_DIRTY_MASK ((1U << VMCB_INTR) | (1U << VMCB_CR2))
74
75 struct kvm_sev_info {
76 bool active; /* SEV enabled guest */
77 bool es_active; /* SEV-ES enabled guest */
78 unsigned int asid; /* ASID used for this guest */
79 unsigned int handle; /* SEV firmware handle */
80 int fd; /* SEV device fd */
81 unsigned long pages_locked; /* Number of pages locked */
82 struct list_head regions_list; /* List of registered regions */
83 u64 ap_jump_table; /* SEV-ES AP Jump Table address */
84 struct kvm *enc_context_owner; /* Owner of copied encryption context */
85 struct list_head mirror_vms; /* List of VMs mirroring */
86 struct list_head mirror_entry; /* Use as a list entry of mirrors */
87 struct misc_cg *misc_cg; /* For misc cgroup accounting */
88 atomic_t migration_in_progress;
89 };
90
91 struct kvm_svm {
92 struct kvm kvm;
93
94 /* Struct members for AVIC */
95 u32 avic_vm_id;
96 struct page *avic_logical_id_table_page;
97 struct page *avic_physical_id_table_page;
98 struct hlist_node hnode;
99
100 struct kvm_sev_info sev_info;
101 };
102
103 struct kvm_vcpu;
104
105 struct kvm_vmcb_info {
106 struct vmcb *ptr;
107 unsigned long pa;
108 int cpu;
109 uint64_t asid_generation;
110 };
111
112 struct vmcb_save_area_cached {
113 u64 efer;
114 u64 cr4;
115 u64 cr3;
116 u64 cr0;
117 u64 dr7;
118 u64 dr6;
119 };
120
121 struct vmcb_ctrl_area_cached {
122 u32 intercepts[MAX_INTERCEPT];
123 u16 pause_filter_thresh;
124 u16 pause_filter_count;
125 u64 iopm_base_pa;
126 u64 msrpm_base_pa;
127 u64 tsc_offset;
128 u32 asid;
129 u8 tlb_ctl;
130 u32 int_ctl;
131 u32 int_vector;
132 u32 int_state;
133 u32 exit_code;
134 u32 exit_code_hi;
135 u64 exit_info_1;
136 u64 exit_info_2;
137 u32 exit_int_info;
138 u32 exit_int_info_err;
139 u64 nested_ctl;
140 u32 event_inj;
141 u32 event_inj_err;
142 u64 nested_cr3;
143 u64 virt_ext;
144 u32 clean;
145 u8 reserved_sw[32];
146 };
147
148 struct svm_nested_state {
149 struct kvm_vmcb_info vmcb02;
150 u64 hsave_msr;
151 u64 vm_cr_msr;
152 u64 vmcb12_gpa;
153 u64 last_vmcb12_gpa;
154
155 /* These are the merged vectors */
156 u32 *msrpm;
157
158 /* A VMRUN has started but has not yet been performed, so
159 * we cannot inject a nested vmexit yet. */
160 bool nested_run_pending;
161
162 /* cache for control fields of the guest */
163 struct vmcb_ctrl_area_cached ctl;
164
165 /*
166 * Note: this struct is not kept up-to-date while L2 runs; it is only
167 * valid within nested_svm_vmrun.
168 */
169 struct vmcb_save_area_cached save;
170
171 bool initialized;
172
173 /*
174 * Indicates whether MSR bitmap for L2 needs to be rebuilt due to
175 * changes in MSR bitmap for L1 or switching to a different L2. Note,
176 * this flag can only be used reliably in conjunction with a paravirt L1
177 * which informs L0 whether any changes to MSR bitmap for L2 were done
178 * on its side.
179 */
180 bool force_msr_bitmap_recalc;
181 };
182
183 struct vcpu_sev_es_state {
184 /* SEV-ES support */
185 struct sev_es_save_area *vmsa;
186 struct ghcb *ghcb;
187 struct kvm_host_map ghcb_map;
188 bool received_first_sipi;
189
190 /* SEV-ES scratch area support */
191 void *ghcb_sa;
192 u32 ghcb_sa_len;
193 bool ghcb_sa_sync;
194 bool ghcb_sa_free;
195 };
196
197 struct vcpu_svm {
198 struct kvm_vcpu vcpu;
199 /* vmcb always points at current_vmcb->ptr, it's purely a shorthand. */
200 struct vmcb *vmcb;
201 struct kvm_vmcb_info vmcb01;
202 struct kvm_vmcb_info *current_vmcb;
203 struct svm_cpu_data *svm_data;
204 u32 asid;
205 u32 sysenter_esp_hi;
206 u32 sysenter_eip_hi;
207 uint64_t tsc_aux;
208
209 u64 msr_decfg;
210
211 u64 next_rip;
212
213 u64 spec_ctrl;
214
215 u64 tsc_ratio_msr;
216 /*
217 * Contains guest-controlled bits of VIRT_SPEC_CTRL, which will be
218 * translated into the appropriate L2_CFG bits on the host to
219 * perform speculative control.
220 */
221 u64 virt_spec_ctrl;
222
223 u32 *msrpm;
224
225 ulong nmi_iret_rip;
226
227 struct svm_nested_state nested;
228
229 bool nmi_singlestep;
230 u64 nmi_singlestep_guest_rflags;
231
232 unsigned int3_injected;
233 unsigned long int3_rip;
234
235 /* optional nested SVM features that are enabled for this guest */
236 bool nrips_enabled : 1;
237 bool tsc_scaling_enabled : 1;
238 bool v_vmload_vmsave_enabled : 1;
239 bool lbrv_enabled : 1;
240 bool pause_filter_enabled : 1;
241 bool pause_threshold_enabled : 1;
242 bool vgif_enabled : 1;
243
244 u32 ldr_reg;
245 u32 dfr_reg;
246 struct page *avic_backing_page;
247 u64 *avic_physical_id_cache;
248
249 /*
250 * Per-vcpu list of struct amd_svm_iommu_ir:
251 * This is used mainly to store interrupt remapping information used
252 * when update the vcpu affinity. This avoids the need to scan for
253 * IRTE and try to match ga_tag in the IOMMU driver.
254 */
255 struct list_head ir_list;
256 spinlock_t ir_list_lock;
257
258 /* Save desired MSR intercept (read: pass-through) state */
259 struct {
260 DECLARE_BITMAP(read, MAX_DIRECT_ACCESS_MSRS);
261 DECLARE_BITMAP(write, MAX_DIRECT_ACCESS_MSRS);
262 } shadow_msr_intercept;
263
264 struct vcpu_sev_es_state sev_es;
265
266 bool guest_state_loaded;
267 };
268
269 struct svm_cpu_data {
270 int cpu;
271
272 u64 asid_generation;
273 u32 max_asid;
274 u32 next_asid;
275 u32 min_asid;
276 struct kvm_ldttss_desc *tss_desc;
277
278 struct page *save_area;
279 struct vmcb *current_vmcb;
280
281 /* index = sev_asid, value = vmcb pointer */
282 struct vmcb **sev_vmcbs;
283 };
284
285 DECLARE_PER_CPU(struct svm_cpu_data *, svm_data);
286
287 void recalc_intercepts(struct vcpu_svm *svm);
288
to_kvm_svm(struct kvm * kvm)289 static __always_inline struct kvm_svm *to_kvm_svm(struct kvm *kvm)
290 {
291 return container_of(kvm, struct kvm_svm, kvm);
292 }
293
sev_guest(struct kvm * kvm)294 static __always_inline bool sev_guest(struct kvm *kvm)
295 {
296 #ifdef CONFIG_KVM_AMD_SEV
297 struct kvm_sev_info *sev = &to_kvm_svm(kvm)->sev_info;
298
299 return sev->active;
300 #else
301 return false;
302 #endif
303 }
304
sev_es_guest(struct kvm * kvm)305 static __always_inline bool sev_es_guest(struct kvm *kvm)
306 {
307 #ifdef CONFIG_KVM_AMD_SEV
308 struct kvm_sev_info *sev = &to_kvm_svm(kvm)->sev_info;
309
310 return sev->es_active && !WARN_ON_ONCE(!sev->active);
311 #else
312 return false;
313 #endif
314 }
315
vmcb_mark_all_dirty(struct vmcb * vmcb)316 static inline void vmcb_mark_all_dirty(struct vmcb *vmcb)
317 {
318 vmcb->control.clean = 0;
319 }
320
vmcb_mark_all_clean(struct vmcb * vmcb)321 static inline void vmcb_mark_all_clean(struct vmcb *vmcb)
322 {
323 vmcb->control.clean = VMCB_ALL_CLEAN_MASK
324 & ~VMCB_ALWAYS_DIRTY_MASK;
325 }
326
vmcb_mark_dirty(struct vmcb * vmcb,int bit)327 static inline void vmcb_mark_dirty(struct vmcb *vmcb, int bit)
328 {
329 vmcb->control.clean &= ~(1 << bit);
330 }
331
vmcb_is_dirty(struct vmcb * vmcb,int bit)332 static inline bool vmcb_is_dirty(struct vmcb *vmcb, int bit)
333 {
334 return !test_bit(bit, (unsigned long *)&vmcb->control.clean);
335 }
336
to_svm(struct kvm_vcpu * vcpu)337 static __always_inline struct vcpu_svm *to_svm(struct kvm_vcpu *vcpu)
338 {
339 return container_of(vcpu, struct vcpu_svm, vcpu);
340 }
341
342 /*
343 * Only the PDPTRs are loaded on demand into the shadow MMU. All other
344 * fields are synchronized on VM-Exit, because accessing the VMCB is cheap.
345 *
346 * CR3 might be out of date in the VMCB but it is not marked dirty; instead,
347 * KVM_REQ_LOAD_MMU_PGD is always requested when the cached vcpu->arch.cr3
348 * is changed. svm_load_mmu_pgd() then syncs the new CR3 value into the VMCB.
349 */
350 #define SVM_REGS_LAZY_LOAD_SET (1 << VCPU_EXREG_PDPTR)
351
vmcb_set_intercept(struct vmcb_control_area * control,u32 bit)352 static inline void vmcb_set_intercept(struct vmcb_control_area *control, u32 bit)
353 {
354 WARN_ON_ONCE(bit >= 32 * MAX_INTERCEPT);
355 __set_bit(bit, (unsigned long *)&control->intercepts);
356 }
357
vmcb_clr_intercept(struct vmcb_control_area * control,u32 bit)358 static inline void vmcb_clr_intercept(struct vmcb_control_area *control, u32 bit)
359 {
360 WARN_ON_ONCE(bit >= 32 * MAX_INTERCEPT);
361 __clear_bit(bit, (unsigned long *)&control->intercepts);
362 }
363
vmcb_is_intercept(struct vmcb_control_area * control,u32 bit)364 static inline bool vmcb_is_intercept(struct vmcb_control_area *control, u32 bit)
365 {
366 WARN_ON_ONCE(bit >= 32 * MAX_INTERCEPT);
367 return test_bit(bit, (unsigned long *)&control->intercepts);
368 }
369
vmcb12_is_intercept(struct vmcb_ctrl_area_cached * control,u32 bit)370 static inline bool vmcb12_is_intercept(struct vmcb_ctrl_area_cached *control, u32 bit)
371 {
372 WARN_ON_ONCE(bit >= 32 * MAX_INTERCEPT);
373 return test_bit(bit, (unsigned long *)&control->intercepts);
374 }
375
set_dr_intercepts(struct vcpu_svm * svm)376 static inline void set_dr_intercepts(struct vcpu_svm *svm)
377 {
378 struct vmcb *vmcb = svm->vmcb01.ptr;
379
380 if (!sev_es_guest(svm->vcpu.kvm)) {
381 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR0_READ);
382 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR1_READ);
383 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR2_READ);
384 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR3_READ);
385 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR4_READ);
386 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR5_READ);
387 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR6_READ);
388 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR0_WRITE);
389 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR1_WRITE);
390 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR2_WRITE);
391 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR3_WRITE);
392 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR4_WRITE);
393 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR5_WRITE);
394 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR6_WRITE);
395 }
396
397 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR7_READ);
398 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR7_WRITE);
399
400 recalc_intercepts(svm);
401 }
402
clr_dr_intercepts(struct vcpu_svm * svm)403 static inline void clr_dr_intercepts(struct vcpu_svm *svm)
404 {
405 struct vmcb *vmcb = svm->vmcb01.ptr;
406
407 vmcb->control.intercepts[INTERCEPT_DR] = 0;
408
409 /* DR7 access must remain intercepted for an SEV-ES guest */
410 if (sev_es_guest(svm->vcpu.kvm)) {
411 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR7_READ);
412 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR7_WRITE);
413 }
414
415 recalc_intercepts(svm);
416 }
417
set_exception_intercept(struct vcpu_svm * svm,u32 bit)418 static inline void set_exception_intercept(struct vcpu_svm *svm, u32 bit)
419 {
420 struct vmcb *vmcb = svm->vmcb01.ptr;
421
422 WARN_ON_ONCE(bit >= 32);
423 vmcb_set_intercept(&vmcb->control, INTERCEPT_EXCEPTION_OFFSET + bit);
424
425 recalc_intercepts(svm);
426 }
427
clr_exception_intercept(struct vcpu_svm * svm,u32 bit)428 static inline void clr_exception_intercept(struct vcpu_svm *svm, u32 bit)
429 {
430 struct vmcb *vmcb = svm->vmcb01.ptr;
431
432 WARN_ON_ONCE(bit >= 32);
433 vmcb_clr_intercept(&vmcb->control, INTERCEPT_EXCEPTION_OFFSET + bit);
434
435 recalc_intercepts(svm);
436 }
437
svm_set_intercept(struct vcpu_svm * svm,int bit)438 static inline void svm_set_intercept(struct vcpu_svm *svm, int bit)
439 {
440 struct vmcb *vmcb = svm->vmcb01.ptr;
441
442 vmcb_set_intercept(&vmcb->control, bit);
443
444 recalc_intercepts(svm);
445 }
446
svm_clr_intercept(struct vcpu_svm * svm,int bit)447 static inline void svm_clr_intercept(struct vcpu_svm *svm, int bit)
448 {
449 struct vmcb *vmcb = svm->vmcb01.ptr;
450
451 vmcb_clr_intercept(&vmcb->control, bit);
452
453 recalc_intercepts(svm);
454 }
455
svm_is_intercept(struct vcpu_svm * svm,int bit)456 static inline bool svm_is_intercept(struct vcpu_svm *svm, int bit)
457 {
458 return vmcb_is_intercept(&svm->vmcb->control, bit);
459 }
460
nested_vgif_enabled(struct vcpu_svm * svm)461 static inline bool nested_vgif_enabled(struct vcpu_svm *svm)
462 {
463 return svm->vgif_enabled && (svm->nested.ctl.int_ctl & V_GIF_ENABLE_MASK);
464 }
465
get_vgif_vmcb(struct vcpu_svm * svm)466 static inline struct vmcb *get_vgif_vmcb(struct vcpu_svm *svm)
467 {
468 if (!vgif)
469 return NULL;
470
471 if (is_guest_mode(&svm->vcpu) && !nested_vgif_enabled(svm))
472 return svm->nested.vmcb02.ptr;
473 else
474 return svm->vmcb01.ptr;
475 }
476
enable_gif(struct vcpu_svm * svm)477 static inline void enable_gif(struct vcpu_svm *svm)
478 {
479 struct vmcb *vmcb = get_vgif_vmcb(svm);
480
481 if (vmcb)
482 vmcb->control.int_ctl |= V_GIF_MASK;
483 else
484 svm->vcpu.arch.hflags |= HF_GIF_MASK;
485 }
486
disable_gif(struct vcpu_svm * svm)487 static inline void disable_gif(struct vcpu_svm *svm)
488 {
489 struct vmcb *vmcb = get_vgif_vmcb(svm);
490
491 if (vmcb)
492 vmcb->control.int_ctl &= ~V_GIF_MASK;
493 else
494 svm->vcpu.arch.hflags &= ~HF_GIF_MASK;
495 }
496
gif_set(struct vcpu_svm * svm)497 static inline bool gif_set(struct vcpu_svm *svm)
498 {
499 struct vmcb *vmcb = get_vgif_vmcb(svm);
500
501 if (vmcb)
502 return !!(vmcb->control.int_ctl & V_GIF_MASK);
503 else
504 return !!(svm->vcpu.arch.hflags & HF_GIF_MASK);
505 }
506
nested_npt_enabled(struct vcpu_svm * svm)507 static inline bool nested_npt_enabled(struct vcpu_svm *svm)
508 {
509 return svm->nested.ctl.nested_ctl & SVM_NESTED_CTL_NP_ENABLE;
510 }
511
512 /* svm.c */
513 #define MSR_INVALID 0xffffffffU
514
515 #define DEBUGCTL_RESERVED_BITS (~(0x3fULL))
516
517 extern bool dump_invalid_vmcb;
518
519 u32 svm_msrpm_offset(u32 msr);
520 u32 *svm_vcpu_alloc_msrpm(void);
521 void svm_vcpu_init_msrpm(struct kvm_vcpu *vcpu, u32 *msrpm);
522 void svm_vcpu_free_msrpm(u32 *msrpm);
523 void svm_copy_lbrs(struct vmcb *to_vmcb, struct vmcb *from_vmcb);
524 void svm_update_lbrv(struct kvm_vcpu *vcpu);
525
526 int svm_set_efer(struct kvm_vcpu *vcpu, u64 efer);
527 void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
528 void svm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
529 void disable_nmi_singlestep(struct vcpu_svm *svm);
530 bool svm_smi_blocked(struct kvm_vcpu *vcpu);
531 bool svm_nmi_blocked(struct kvm_vcpu *vcpu);
532 bool svm_interrupt_blocked(struct kvm_vcpu *vcpu);
533 void svm_set_gif(struct vcpu_svm *svm, bool value);
534 int svm_invoke_exit_handler(struct kvm_vcpu *vcpu, u64 exit_code);
535 void set_msr_interception(struct kvm_vcpu *vcpu, u32 *msrpm, u32 msr,
536 int read, int write);
537 void svm_complete_interrupt_delivery(struct kvm_vcpu *vcpu, int delivery_mode,
538 int trig_mode, int vec);
539
540 /* nested.c */
541
542 #define NESTED_EXIT_HOST 0 /* Exit handled on host level */
543 #define NESTED_EXIT_DONE 1 /* Exit caused nested vmexit */
544 #define NESTED_EXIT_CONTINUE 2 /* Further checks needed */
545
nested_svm_virtualize_tpr(struct kvm_vcpu * vcpu)546 static inline bool nested_svm_virtualize_tpr(struct kvm_vcpu *vcpu)
547 {
548 struct vcpu_svm *svm = to_svm(vcpu);
549
550 return is_guest_mode(vcpu) && (svm->nested.ctl.int_ctl & V_INTR_MASKING_MASK);
551 }
552
nested_exit_on_smi(struct vcpu_svm * svm)553 static inline bool nested_exit_on_smi(struct vcpu_svm *svm)
554 {
555 return vmcb12_is_intercept(&svm->nested.ctl, INTERCEPT_SMI);
556 }
557
nested_exit_on_intr(struct vcpu_svm * svm)558 static inline bool nested_exit_on_intr(struct vcpu_svm *svm)
559 {
560 return vmcb12_is_intercept(&svm->nested.ctl, INTERCEPT_INTR);
561 }
562
nested_exit_on_nmi(struct vcpu_svm * svm)563 static inline bool nested_exit_on_nmi(struct vcpu_svm *svm)
564 {
565 return vmcb12_is_intercept(&svm->nested.ctl, INTERCEPT_NMI);
566 }
567
568 int enter_svm_guest_mode(struct kvm_vcpu *vcpu,
569 u64 vmcb_gpa, struct vmcb *vmcb12, bool from_vmrun);
570 void svm_leave_nested(struct kvm_vcpu *vcpu);
571 void svm_free_nested(struct vcpu_svm *svm);
572 int svm_allocate_nested(struct vcpu_svm *svm);
573 int nested_svm_vmrun(struct kvm_vcpu *vcpu);
574 void svm_copy_vmrun_state(struct vmcb_save_area *to_save,
575 struct vmcb_save_area *from_save);
576 void svm_copy_vmloadsave_state(struct vmcb *to_vmcb, struct vmcb *from_vmcb);
577 int nested_svm_vmexit(struct vcpu_svm *svm);
578
nested_svm_simple_vmexit(struct vcpu_svm * svm,u32 exit_code)579 static inline int nested_svm_simple_vmexit(struct vcpu_svm *svm, u32 exit_code)
580 {
581 svm->vmcb->control.exit_code = exit_code;
582 svm->vmcb->control.exit_info_1 = 0;
583 svm->vmcb->control.exit_info_2 = 0;
584 return nested_svm_vmexit(svm);
585 }
586
587 int nested_svm_exit_handled(struct vcpu_svm *svm);
588 int nested_svm_check_permissions(struct kvm_vcpu *vcpu);
589 int nested_svm_check_exception(struct vcpu_svm *svm, unsigned nr,
590 bool has_error_code, u32 error_code);
591 int nested_svm_exit_special(struct vcpu_svm *svm);
592 void nested_svm_update_tsc_ratio_msr(struct kvm_vcpu *vcpu);
593 void __svm_write_tsc_multiplier(u64 multiplier);
594 void nested_copy_vmcb_control_to_cache(struct vcpu_svm *svm,
595 struct vmcb_control_area *control);
596 void nested_copy_vmcb_save_to_cache(struct vcpu_svm *svm,
597 struct vmcb_save_area *save);
598 void nested_sync_control_from_vmcb02(struct vcpu_svm *svm);
599 void nested_vmcb02_compute_g_pat(struct vcpu_svm *svm);
600 void svm_switch_vmcb(struct vcpu_svm *svm, struct kvm_vmcb_info *target_vmcb);
601
602 extern struct kvm_x86_nested_ops svm_nested_ops;
603
604 /* avic.c */
605
606 int avic_ga_log_notifier(u32 ga_tag);
607 void avic_vm_destroy(struct kvm *kvm);
608 int avic_vm_init(struct kvm *kvm);
609 void avic_init_vmcb(struct vcpu_svm *svm, struct vmcb *vmcb);
610 int avic_incomplete_ipi_interception(struct kvm_vcpu *vcpu);
611 int avic_unaccelerated_access_interception(struct kvm_vcpu *vcpu);
612 int avic_init_vcpu(struct vcpu_svm *svm);
613 void avic_vcpu_load(struct kvm_vcpu *vcpu, int cpu);
614 void avic_vcpu_put(struct kvm_vcpu *vcpu);
615 void avic_apicv_post_state_restore(struct kvm_vcpu *vcpu);
616 void avic_set_virtual_apic_mode(struct kvm_vcpu *vcpu);
617 void avic_refresh_apicv_exec_ctrl(struct kvm_vcpu *vcpu);
618 bool avic_check_apicv_inhibit_reasons(enum kvm_apicv_inhibit reason);
619 void avic_hwapic_irr_update(struct kvm_vcpu *vcpu, int max_irr);
620 void avic_hwapic_isr_update(struct kvm_vcpu *vcpu, int max_isr);
621 bool avic_dy_apicv_has_pending_interrupt(struct kvm_vcpu *vcpu);
622 int avic_pi_update_irte(struct kvm *kvm, unsigned int host_irq,
623 uint32_t guest_irq, bool set);
624 void avic_vcpu_blocking(struct kvm_vcpu *vcpu);
625 void avic_vcpu_unblocking(struct kvm_vcpu *vcpu);
626 void avic_ring_doorbell(struct kvm_vcpu *vcpu);
627 unsigned long avic_vcpu_get_apicv_inhibit_reasons(struct kvm_vcpu *vcpu);
628
629 /* sev.c */
630
631 #define GHCB_VERSION_MAX 1ULL
632 #define GHCB_VERSION_MIN 1ULL
633
634
635 extern unsigned int max_sev_asid;
636
637 void sev_vm_destroy(struct kvm *kvm);
638 int sev_mem_enc_ioctl(struct kvm *kvm, void __user *argp);
639 int sev_mem_enc_register_region(struct kvm *kvm,
640 struct kvm_enc_region *range);
641 int sev_mem_enc_unregister_region(struct kvm *kvm,
642 struct kvm_enc_region *range);
643 int sev_vm_copy_enc_context_from(struct kvm *kvm, unsigned int source_fd);
644 int sev_vm_move_enc_context_from(struct kvm *kvm, unsigned int source_fd);
645 void sev_guest_memory_reclaimed(struct kvm *kvm);
646
647 void pre_sev_run(struct vcpu_svm *svm, int cpu);
648 void __init sev_set_cpu_caps(void);
649 void __init sev_hardware_setup(void);
650 void sev_hardware_unsetup(void);
651 int sev_cpu_init(struct svm_cpu_data *sd);
652 void sev_init_vmcb(struct vcpu_svm *svm);
653 void sev_free_vcpu(struct kvm_vcpu *vcpu);
654 int sev_handle_vmgexit(struct kvm_vcpu *vcpu);
655 int sev_es_string_io(struct vcpu_svm *svm, int size, unsigned int port, int in);
656 void sev_es_vcpu_reset(struct vcpu_svm *svm);
657 void sev_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector);
658 void sev_es_prepare_switch_to_guest(struct sev_es_save_area *hostsa);
659 void sev_es_unmap_ghcb(struct vcpu_svm *svm);
660
661 /* vmenter.S */
662
663 void __svm_sev_es_vcpu_run(unsigned long vmcb_pa);
664 void __svm_vcpu_run(unsigned long vmcb_pa, unsigned long *regs);
665
666 #endif
667