1 /* $Id: tpqic02.h,v 1.5 1996/12/14 23:01:38 root Exp root $ 2 * 3 * Include file for QIC-02 driver for Linux. 4 * 5 * Copyright (c) 1992--1995 by H. H. Bergman. All rights reserved. 6 * 7 * ******* USER CONFIG SECTION BELOW (Near line 70) ******* 8 */ 9 10 #ifndef _LINUX_TPQIC02_H 11 #define _LINUX_TPQIC02_H 12 13 #include <linux/config.h> 14 15 #if CONFIG_QIC02_TAPE || CONFIG_QIC02_TAPE_MODULE 16 17 /* need to have QIC02_TAPE_DRIVE and QIC02_TAPE_IFC expand to something */ 18 #include <linux/mtio.h> 19 20 21 /* Make QIC02_TAPE_IFC expand to something. 22 * 23 * The only difference between WANGTEK and EVEREX is in the 24 * handling of the DMA channel 3. 25 * Note that the driver maps EVEREX to WANGTEK internally for speed 26 * reasons. Externally WANGTEK==1, EVEREX==2, ARCHIVE==3. 27 * These must correspond to the values used in qic02config(1). 28 * 29 * Support for Mountain controllers was added by Erik Jacobson 30 * and severely hacked by me. -- hhb 31 * 32 * Support for Emerald controllers by Alan Bain <afrb2@chiark.chu.cam.ac.uk> 33 * with more hacks by me. -- hhb 34 */ 35 #define WANGTEK 1 /* don't know about Wangtek QIC-36 */ 36 #define EVEREX (WANGTEK+1) /* I heard *some* of these are identical */ 37 #define EVEREX_811V EVEREX /* With TEAC MT 2ST 45D */ 38 #define EVEREX_831V EVEREX 39 #define ARCHIVE 3 40 #define ARCHIVE_SC400 ARCHIVE /* rumoured to be from the pre-SMD-age */ 41 #define ARCHIVE_SC402 ARCHIVE /* don't know much about SC400 */ 42 #define ARCHIVE_SC499 ARCHIVE /* SC402 and SC499R should be identical */ 43 44 #define MOUNTAIN 5 /* Mountain Computer Interface */ 45 #define EMERALD 6 /* Emerald Interface card */ 46 47 48 49 #define QIC02_TAPE_PORT_RANGE 8 /* number of IO locations to reserve */ 50 51 52 /*********** START OF USER CONFIGURABLE SECTION ************/ 53 54 /* Tape configuration: Select DRIVE, IFC, PORT, IRQ and DMA below. 55 * Runtime (re)configuration is not supported yet. 56 * 57 * Tape drive configuration: (MT_IS* constants are defined in mtio.h) 58 * 59 * QIC02_TAPE_DRIVE = MT_ISWT5150 60 * - Wangtek 5150, format: up to QIC-150. 61 * QIC02_TAPE_DRIVE = MT_ISQIC02_ALL_FEATURES 62 * - Enables some optional QIC02 commands that some drives may lack. 63 * It is provided so you can check which are supported by your drive. 64 * Refer to tpqic02.h for others. 65 * 66 * Supported interface cards: QIC02_TAPE_IFC = 67 * WANGTEK, 68 * ARCHIVE_SC402, ARCHIVE_SC499. (both same programming interface) 69 * 70 * Make sure you have the I/O ports/DMA channels 71 * and IRQ stuff configured properly! 72 * NOTE: There may be other device drivers using the same major 73 * number. This must be avoided. Check for timer.h conflicts too. 74 * 75 * If you have an EVEREX EV-831 card and you are using DMA channel 3, 76 * you will probably have to ``#define QIC02_TAPE_DMA3_FIX'' below. 77 */ 78 79 /* CONFIG_QIC02_DYNCONF can be defined in autoconf.h, by `make config' */ 80 81 /*** #undef CONFIG_QIC02_DYNCONF ***/ 82 83 #ifndef CONFIG_QIC02_DYNCONF 84 85 #define QIC02_TAPE_DRIVE MT_ISQIC02_ALL_FEATURES /* drive type */ 86 /* #define QIC02_TAPE_DRIVE MT_ISWT5150 */ 87 /* #define QIC02_TAPE_DRIVE MT_ISARCHIVE_5945L2 */ 88 /* #define QIC02_TAPE_DRIVE MT_ISTEAC_MT2ST */ 89 /* #define QIC02_TAPE_DRIVE MT_ISARCHIVE_2150L */ 90 /* #define QIC02_TAPE_DRIVE MT_ISARCHIVESC499 */ 91 92 /* Either WANGTEK, ARCHIVE or MOUNTAIN. Not EVEREX. 93 * If you have an EVEREX, use WANGTEK and try the DMA3_FIX below. 94 */ 95 #define QIC02_TAPE_IFC WANGTEK /* interface card type */ 96 /* #define QIC02_TAPE_IFC ARCHIVE */ 97 /* #define QIC02_TAPE_IFC MOUNTAIN */ 98 99 #define QIC02_TAPE_PORT 0x300 /* controller port address */ 100 #define QIC02_TAPE_IRQ 5 /* For IRQ2, use 9 here, others normal. */ 101 #define QIC02_TAPE_DMA 1 /* either 1 or 3, because 2 is used by the floppy */ 102 103 /* If DMA3 doesn't work, but DMA1 does, and you have a 104 * Wangtek/Everex card, you can try #define-ing the flag 105 * below. Note that you should also change the DACK jumper 106 * for Wangtek/Everex cards when changing the DMA channel. 107 */ 108 #undef QIC02_TAPE_DMA3_FIX 109 110 /************ END OF USER CONFIGURABLE SECTION *************/ 111 112 /* I put the stuff above in config.in, but a few recompiles, to 113 * verify different configurations, and several days later I decided 114 * to change it back again. 115 */ 116 117 118 119 /* NOTE: TP_HAVE_DENS should distinguish between available densities (?) 120 * NOTE: Drive select is not implemented -- I have only one tape streamer, 121 * so I'm unable and unmotivated to test and implement that. ;-) ;-) 122 */ 123 #if QIC02_TAPE_DRIVE == MT_ISWT5150 124 #define TP_HAVE_DENS 1 125 #define TP_HAVE_BSF 0 /* nope */ 126 #define TP_HAVE_FSR 0 /* nope */ 127 #define TP_HAVE_BSR 0 /* nope */ 128 #define TP_HAVE_EOD 0 /* most of the time */ 129 #define TP_HAVE_SEEK 0 130 #define TP_HAVE_TELL 0 131 #define TP_HAVE_RAS1 1 132 #define TP_HAVE_RAS2 1 133 134 #elif QIC02_TAPE_DRIVE == MT_ISARCHIVESC499 /* Archive SC-499 QIC-36 controller */ 135 #define TP_HAVE_DENS 1 /* can do set density (QIC-11 / QIC-24) */ 136 #define TP_HAVE_BSF 0 137 #define TP_HAVE_FSR 1 /* can skip one block forwards */ 138 #define TP_HAVE_BSR 1 /* can skip one block backwards */ 139 #define TP_HAVE_EOD 1 /* can seek to end of recorded data */ 140 #define TP_HAVE_SEEK 0 141 #define TP_HAVE_TELL 0 142 #define TP_HAVE_RAS1 1 /* can run selftest 1 */ 143 #define TP_HAVE_RAS2 1 /* can run selftest 2 */ 144 /* These last two selftests shouldn't be used yet! */ 145 146 #elif (QIC02_TAPE_DRIVE == MT_ISARCHIVE_2060L) || (QIC02_TAPE_DRIVE == MT_ISARCHIVE_2150L) 147 #define TP_HAVE_DENS 1 /* can do set density (QIC-24 / QIC-120 / QIC-150) */ 148 #define TP_HAVE_BSF 0 149 #define TP_HAVE_FSR 1 /* can skip one block forwards */ 150 #define TP_HAVE_BSR 1 /* can skip one block backwards */ 151 #define TP_HAVE_EOD 1 /* can seek to end of recorded data */ 152 #define TP_HAVE_TELL 1 /* can read current block address */ 153 #define TP_HAVE_SEEK 1 /* can seek to block */ 154 #define TP_HAVE_RAS1 1 /* can run selftest 1 */ 155 #define TP_HAVE_RAS2 1 /* can run selftest 2 */ 156 /* These last two selftests shouldn't be used yet! */ 157 158 #elif QIC02_TAPE_DRIVE == MT_ISARCHIVE_5945L2 159 /* can anyone verify this entry?? */ 160 #define TP_HAVE_DENS 1 /* can do set density?? (QIC-24??) */ 161 #define TP_HAVE_BSF 0 162 #define TP_HAVE_FSR 1 /* can skip one block forwards */ 163 #define TP_HAVE_BSR 1 /* can skip one block backwards */ 164 #define TP_HAVE_EOD 1 /* can seek to end of recorded data */ 165 #define TP_HAVE_TELL 1 /* can read current block address */ 166 #define TP_HAVE_SEEK 1 /* can seek to block */ 167 #define TP_HAVE_RAS1 1 /* can run selftest 1 */ 168 #define TP_HAVE_RAS2 1 /* can run selftest 2 */ 169 /* These last two selftests shouldn't be used yet! */ 170 171 #elif QIC02_TAPE_DRIVE == MT_ISTEAC_MT2ST 172 /* can anyone verify this entry?? */ 173 #define TP_HAVE_DENS 0 /* cannot do set density?? (QIC-150?) */ 174 #define TP_HAVE_BSF 0 175 #define TP_HAVE_FSR 1 /* can skip one block forwards */ 176 #define TP_HAVE_BSR 1 /* can skip one block backwards */ 177 #define TP_HAVE_EOD 1 /* can seek to end of recorded data */ 178 #define TP_HAVE_SEEK 1 /* can seek to block */ 179 #define TP_HAVE_TELL 1 /* can read current block address */ 180 #define TP_HAVE_RAS1 1 /* can run selftest 1 */ 181 #define TP_HAVE_RAS2 1 /* can run selftest 2 */ 182 /* These last two selftests shouldn't be used yet! */ 183 184 #elif QIC02_TAPE_DRIVE == MT_ISQIC02_ALL_FEATURES 185 #define TP_HAVE_DENS 1 /* can do set density */ 186 #define TP_HAVE_BSF 1 /* can search filemark backwards */ 187 #define TP_HAVE_FSR 1 /* can skip one block forwards */ 188 #define TP_HAVE_BSR 1 /* can skip one block backwards */ 189 #define TP_HAVE_EOD 1 /* can seek to end of recorded data */ 190 #define TP_HAVE_SEEK 1 /* seek to block address */ 191 #define TP_HAVE_TELL 1 /* tell current block address */ 192 #define TP_HAVE_RAS1 1 /* can run selftest 1 */ 193 #define TP_HAVE_RAS2 1 /* can run selftest 2 */ 194 /* These last two selftests shouldn't be used yet! */ 195 196 197 #else 198 #error No QIC-02 tape drive type defined! 199 /* If your drive is not listed above, first try the 'ALL_FEATURES', 200 * to see what commands are supported, then create your own entry in 201 * the list above. You may want to mail it to me, so that I can include 202 * it in the next release. 203 */ 204 #endif 205 206 #endif /* !CONFIG_QIC02_DYNCONF */ 207 208 209 /* WANGTEK interface card specifics */ 210 #define WT_QIC02_STAT_PORT (QIC02_TAPE_PORT) 211 #define WT_QIC02_CTL_PORT (QIC02_TAPE_PORT) 212 #define WT_QIC02_CMD_PORT (QIC02_TAPE_PORT+1) 213 #define WT_QIC02_DATA_PORT (QIC02_TAPE_PORT+1) 214 215 /* status register bits (Active LOW!) */ 216 #define WT_QIC02_STAT_POLARITY 0 217 #define WT_QIC02_STAT_READY 0x01 218 #define WT_QIC02_STAT_EXCEPTION 0x02 219 #define WT_QIC02_STAT_MASK (WT_QIC02_STAT_READY|WT_QIC02_STAT_EXCEPTION) 220 221 #define WT_QIC02_STAT_RESETMASK 0x07 222 #define WT_QIC02_STAT_RESETVAL (WT_QIC02_STAT_RESETMASK & ~WT_QIC02_STAT_EXCEPTION) 223 224 /* controller register (QIC02_CTL_PORT) bits */ 225 #define WT_QIC02_CTL_RESET 0x02 226 #define WT_QIC02_CTL_REQUEST 0x04 227 #define WT_CTL_ONLINE 0x01 228 #define WT_CTL_CMDOFF 0xC0 229 230 #define WT_CTL_DMA3 0x10 /* enable dma chan3 */ 231 #define WT_CTL_DMA1 0x08 /* enable dma chan1 or chan2 */ 232 233 /* EMERALD interface card specifics 234 * Much like Wangtek, only different polarity and bit locations 235 */ 236 #define EMR_QIC02_STAT_PORT (QIC02_TAPE_PORT) 237 #define EMR_QIC02_CTL_PORT (QIC02_TAPE_PORT) 238 #define EMR_QIC02_CMD_PORT (QIC02_TAPE_PORT+1) 239 #define EMR_QIC02_DATA_PORT (QIC02_TAPE_PORT+1) 240 241 /* status register bits (Active High!) */ 242 #define EMR_QIC02_STAT_POLARITY 1 243 #define EMR_QIC02_STAT_READY 0x01 244 #define EMR_QIC02_STAT_EXCEPTION 0x02 245 #define EMR_QIC02_STAT_MASK (EMR_QIC02_STAT_READY|EMR_QIC02_STAT_EXCEPTION) 246 247 #define EMR_QIC02_STAT_RESETMASK 0x07 248 #define EMR_QIC02_STAT_RESETVAL (EMR_QIC02_STAT_RESETMASK & ~EMR_QIC02_STAT_EXCEPTION) 249 250 /* controller register (QIC02_CTL_PORT) bits */ 251 #define EMR_QIC02_CTL_RESET 0x02 252 #define EMR_QIC02_CTL_REQUEST 0x04 253 #define EMR_CTL_ONLINE 0x01 254 #define EMR_CTL_CMDOFF 0xC0 255 256 #define EMR_CTL_DMA3 0x10 /* enable dma chan3 */ 257 #define EMR_CTL_DMA1 0x08 /* enable dma chan1 or chan2 */ 258 259 260 261 /* ARCHIVE interface card specifics */ 262 #define AR_QIC02_STAT_PORT (QIC02_TAPE_PORT+1) 263 #define AR_QIC02_CTL_PORT (QIC02_TAPE_PORT+1) 264 #define AR_QIC02_CMD_PORT (QIC02_TAPE_PORT) 265 #define AR_QIC02_DATA_PORT (QIC02_TAPE_PORT) 266 267 #define AR_START_DMA_PORT (QIC02_TAPE_PORT+2) 268 #define AR_RESET_DMA_PORT (QIC02_TAPE_PORT+3) 269 270 /* STAT port bits */ 271 #define AR_QIC02_STAT_POLARITY 0 272 #define AR_STAT_IRQF 0x80 /* active high, interrupt request flag */ 273 #define AR_QIC02_STAT_READY 0x40 /* active low */ 274 #define AR_QIC02_STAT_EXCEPTION 0x20 /* active low */ 275 #define AR_QIC02_STAT_MASK (AR_QIC02_STAT_READY|AR_QIC02_STAT_EXCEPTION) 276 #define AR_STAT_DMADONE 0x10 /* active high, DMA done */ 277 #define AR_STAT_DIRC 0x08 /* active high, direction */ 278 279 #define AR_QIC02_STAT_RESETMASK 0x70 /* check RDY,EXC,DMADONE */ 280 #define AR_QIC02_STAT_RESETVAL ((AR_QIC02_STAT_RESETMASK & ~AR_STAT_IRQF & ~AR_QIC02_STAT_EXCEPTION) | AR_STAT_DMADONE) 281 282 /* CTL port bits */ 283 #define AR_QIC02_CTL_RESET 0x80 /* drive reset */ 284 #define AR_QIC02_CTL_REQUEST 0x40 /* notify of new command */ 285 #define AR_CTL_IEN 0x20 /* interrupt enable */ 286 #define AR_CTL_DNIEN 0x10 /* done-interrupt enable */ 287 /* Note: All of these bits are cleared automatically when writing to 288 * AR_RESET_DMA_PORT. So AR_CTL_IEN and AR_CTL_DNIEN must be 289 * reprogrammed before the write to AR_START_DMA_PORT. 290 */ 291 292 293 /* MOUNTAIN interface specifics */ 294 #define MTN_QIC02_STAT_PORT (QIC02_TAPE_PORT+1) 295 #define MTN_QIC02_CTL_PORT (QIC02_TAPE_PORT+1) 296 #define MTN_QIC02_CMD_PORT (QIC02_TAPE_PORT) 297 #define MTN_QIC02_DATA_PORT (QIC02_TAPE_PORT) 298 299 #define MTN_W_SELECT_DMA_PORT (QIC02_TAPE_PORT+2) 300 #define MTN_R_DESELECT_DMA_PORT (QIC02_TAPE_PORT+2) 301 #define MTN_W_DMA_WRITE_PORT (QIC02_TAPE_PORT+3) 302 303 /* STAT port bits */ 304 #define MTN_QIC02_STAT_POLARITY 0 305 #define MTN_QIC02_STAT_READY 0x02 /* active low */ 306 #define MTN_QIC02_STAT_EXCEPTION 0x04 /* active low */ 307 #define MTN_QIC02_STAT_MASK (MTN_QIC02_STAT_READY|MTN_QIC02_STAT_EXCEPTION) 308 #define MTN_STAT_DMADONE 0x01 /* active high, DMA done */ 309 310 #define MTN_QIC02_STAT_RESETMASK 0x07 /* check RDY,EXC,DMADONE */ 311 #define MTN_QIC02_STAT_RESETVAL ((MTN_QIC02_STAT_RESETMASK & ~MTN_QIC02_STAT_EXCEPTION) | MTN_STAT_DMADONE) 312 313 /* CTL port bits */ 314 #define MTN_QIC02_CTL_RESET_NOT 0x80 /* drive reset, active low */ 315 #define MTN_QIC02_CTL_RESET 0x80 /* Fodder #definition to keep gcc happy */ 316 317 #define MTN_QIC02_CTL_ONLINE 0x40 /* Put drive on line */ 318 #define MTN_QIC02_CTL_REQUEST 0x20 /* notify of new command */ 319 #define MTN_QIC02_CTL_IRQ_DRIVER 0x10 /* Enable IRQ tristate driver */ 320 #define MTN_QIC02_CTL_DMA_DRIVER 0x08 /* Enable DMA tristate driver */ 321 #define MTN_CTL_EXC_IEN 0x04 /* Exception interrupt enable */ 322 #define MTN_CTL_RDY_IEN 0x02 /* Ready interrupt enable */ 323 #define MTN_CTL_DNIEN 0x01 /* done-interrupt enable */ 324 325 #define MTN_CTL_ONLINE (MTN_QIC02_CTL_RESET_NOT | MTN_QIC02_CTL_IRQ_DRIVER | MTN_QIC02_CTL_DMA_DRIVER) 326 327 328 #ifndef CONFIG_QIC02_DYNCONF 329 330 # define QIC02_TAPE_DEBUG (qic02_tape_debug) 331 332 # if QIC02_TAPE_IFC == WANGTEK 333 # define QIC02_STAT_POLARITY WT_QIC02_STAT_POLARITY 334 # define QIC02_STAT_PORT WT_QIC02_STAT_PORT 335 # define QIC02_CTL_PORT WT_QIC02_CTL_PORT 336 # define QIC02_CMD_PORT WT_QIC02_CMD_PORT 337 # define QIC02_DATA_PORT WT_QIC02_DATA_PORT 338 339 # define QIC02_STAT_READY WT_QIC02_STAT_READY 340 # define QIC02_STAT_EXCEPTION WT_QIC02_STAT_EXCEPTION 341 # define QIC02_STAT_MASK WT_QIC02_STAT_MASK 342 # define QIC02_STAT_RESETMASK WT_QIC02_STAT_RESETMASK 343 # define QIC02_STAT_RESETVAL WT_QIC02_STAT_RESETVAL 344 345 # define QIC02_CTL_RESET WT_QIC02_CTL_RESET 346 # define QIC02_CTL_REQUEST WT_QIC02_CTL_REQUEST 347 348 # if QIC02_TAPE_DMA == 3 349 # ifdef QIC02_TAPE_DMA3_FIX 350 # define WT_CTL_DMA WT_CTL_DMA1 351 # else 352 # define WT_CTL_DMA WT_CTL_DMA3 353 # endif 354 # elif QIC02_TAPE_DMA == 1 355 # define WT_CTL_DMA WT_CTL_DMA1 356 # else 357 # error Unsupported or incorrect DMA configuration. 358 # endif 359 360 # elif QIC02_TAPE_IFC == EMERALD 361 # define QIC02_STAT_POLARITY EMR_QIC02_STAT_POLARITY 362 # define QIC02_STAT_PORT EMR_QIC02_STAT_PORT 363 # define QIC02_CTL_PORT EMR_QIC02_CTL_PORT 364 # define QIC02_CMD_PORT EMR_QIC02_CMD_PORT 365 # define QIC02_DATA_PORT EMR_QIC02_DATA_PORT 366 367 # define QIC02_STAT_READY EMR_QIC02_STAT_READY 368 # define QIC02_STAT_EXCEPTION EMR_QIC02_STAT_EXCEPTION 369 # define QIC02_STAT_MASK EMR_QIC02_STAT_MASK 370 # define QIC02_STAT_RESETMASK EMR_QIC02_STAT_RESETMASK 371 # define QIC02_STAT_RESETVAL EMR_QIC02_STAT_RESETVAL 372 373 # define QIC02_CTL_RESET EMR_QIC02_CTL_RESET 374 # define QIC02_CTL_REQUEST EMR_QIC02_CTL_REQUEST 375 376 # if QIC02_TAPE_DMA == 3 377 # ifdef QIC02_TAPE_DMA3_FIX 378 # define EMR_CTL_DMA EMR_CTL_DMA1 379 # else 380 # define EMR_CTL_DMA EMR_CTL_DMA3 381 # endif 382 # elif QIC02_TAPE_DMA == 1 383 # define EMR_CTL_DMA EMR_CTL_DMA1 384 # else 385 # error Unsupported or incorrect DMA configuration. 386 # endif 387 388 # elif QIC02_TAPE_IFC == ARCHIVE 389 # define QIC02_STAT_POLARITY AR_QIC02_STAT_POLARITY 390 # define QIC02_STAT_PORT AR_QIC02_STAT_PORT 391 # define QIC02_CTL_PORT AR_QIC02_CTL_PORT 392 # define QIC02_CMD_PORT AR_QIC02_CMD_PORT 393 # define QIC02_DATA_PORT AR_QIC02_DATA_PORT 394 395 # define QIC02_STAT_READY AR_QIC02_STAT_READY 396 # define QIC02_STAT_EXCEPTION AR_QIC02_STAT_EXCEPTION 397 # define QIC02_STAT_MASK AR_QIC02_STAT_MASK 398 # define QIC02_STAT_RESETMASK AR_QIC02_STAT_RESETMASK 399 # define QIC02_STAT_RESETVAL AR_QIC02_STAT_RESETVAL 400 401 # define QIC02_CTL_RESET AR_QIC02_CTL_RESET 402 # define QIC02_CTL_REQUEST AR_QIC02_CTL_REQUEST 403 404 # if QIC02_TAPE_DMA > 3 /* channel 2 is used by the floppy driver */ 405 # error DMA channels other than 1 and 3 are not supported. 406 # endif 407 408 # elif QIC02_TAPE_IFC == MOUNTAIN 409 # define QIC02_STAT_POLARITY MTN_QIC02_STAT_POLARITY 410 # define QIC02_STAT_PORT MTN_QIC02_STAT_PORT 411 # define QIC02_CTL_PORT MTN_QIC02_CTL_PORT 412 # define QIC02_CMD_PORT MTN_QIC02_CMD_PORT 413 # define QIC02_DATA_PORT MTN_QIC02_DATA_PORT 414 415 # define QIC02_STAT_READY MTN_QIC02_STAT_READY 416 # define QIC02_STAT_EXCEPTION MTN_QIC02_STAT_EXCEPTION 417 # define QIC02_STAT_MASK MTN_QIC02_STAT_MASK 418 # define QIC02_STAT_RESETMASK MTN_QIC02_STAT_RESETMASK 419 # define QIC02_STAT_RESETVAL MTN_QIC02_STAT_RESETVAL 420 421 # define QIC02_CTL_RESET MTN_QIC02_CTL_RESET 422 # define QIC02_CTL_REQUEST MTN_QIC02_CTL_REQUEST 423 424 # if QIC02_TAPE_DMA > 3 /* channel 2 is used by the floppy driver */ 425 # error DMA channels other than 1 and 3 are not supported. 426 # endif 427 428 # else 429 # error No valid interface card specified! 430 # endif /* QIC02_TAPE_IFC */ 431 432 433 /* An ugly hack to make sure WT_CTL_DMA is defined even for the 434 * static, non-Wangtek case. The alternative was even worse. 435 */ 436 # ifndef WT_CTL_DMA 437 # define WT_CTL_DMA WT_CTL_DMA1 438 # endif 439 440 /*******************/ 441 442 #else /* !CONFIG_QIC02_DYNCONF */ 443 444 /* Now the runtime config version, using variables instead of constants. 445 * 446 * qic02_tape_dynconf is R/O for the kernel, set from userspace. 447 * qic02_tape_ccb is private to the driver, R/W. 448 */ 449 450 # define QIC02_TAPE_DRIVE (qic02_tape_dynconf.mt_type) 451 # define QIC02_TAPE_IFC (qic02_tape_ccb.ifc_type) 452 # define QIC02_TAPE_IRQ (qic02_tape_dynconf.irqnr) 453 # define QIC02_TAPE_DMA (qic02_tape_dynconf.dmanr) 454 # define QIC02_TAPE_PORT (qic02_tape_dynconf.port) 455 # define WT_CTL_DMA (qic02_tape_ccb.dma_enable_value) 456 # define QIC02_TAPE_DEBUG (qic02_tape_dynconf.debug) 457 458 # define QIC02_STAT_PORT (qic02_tape_ccb.port_stat) 459 # define QIC02_CTL_PORT (qic02_tape_ccb.port_ctl) 460 # define QIC02_CMD_PORT (qic02_tape_ccb.port_cmd) 461 # define QIC02_DATA_PORT (qic02_tape_ccb.port_data) 462 463 # define QIC02_STAT_POLARITY (qic02_tape_ccb.stat_polarity) 464 # define QIC02_STAT_READY (qic02_tape_ccb.stat_ready) 465 # define QIC02_STAT_EXCEPTION (qic02_tape_ccb.stat_exception) 466 # define QIC02_STAT_MASK (qic02_tape_ccb.stat_mask) 467 468 # define QIC02_STAT_RESETMASK (qic02_tape_ccb.stat_resetmask) 469 # define QIC02_STAT_RESETVAL (qic02_tape_ccb.stat_resetval) 470 471 # define QIC02_CTL_RESET (qic02_tape_ccb.ctl_reset) 472 # define QIC02_CTL_REQUEST (qic02_tape_ccb.ctl_request) 473 474 # define TP_HAVE_DENS (qic02_tape_dynconf.have_dens) 475 # define TP_HAVE_BSF (qic02_tape_dynconf.have_bsf) 476 # define TP_HAVE_FSR (qic02_tape_dynconf.have_fsr) 477 # define TP_HAVE_BSR (qic02_tape_dynconf.have_bsr) 478 # define TP_HAVE_EOD (qic02_tape_dynconf.have_eod) 479 # define TP_HAVE_SEEK (qic02_tape_dynconf.have_seek) 480 # define TP_HAVE_TELL (qic02_tape_dynconf.have_tell) 481 # define TP_HAVE_RAS1 (qic02_tape_dynconf.have_ras1) 482 # define TP_HAVE_RAS2 (qic02_tape_dynconf.have_ras2) 483 484 #endif /* CONFIG_QIC02_DYNCONF */ 485 486 487 /* "Vendor Unique" codes */ 488 /* Archive seek & tell stuff */ 489 #define AR_QCMDV_TELL_BLK 0xAE /* read current block address */ 490 #define AR_QCMDV_SEEK_BLK 0xAD /* seek to specific block */ 491 #define AR_SEEK_BUF_SIZE 3 /* address is 3 bytes */ 492 493 494 495 /* 496 * Misc common stuff 497 */ 498 499 /* Standard QIC-02 commands -- rev F. All QIC-02 drives must support these */ 500 #define QCMD_SEL_1 0x01 /* select drive 1 */ 501 #define QCMD_SEL_2 0x02 /* select drive 2 */ 502 #define QCMD_SEL_3 0x04 /* select drive 3 */ 503 #define QCMD_SEL_4 0x08 /* select drive 4 */ 504 #define QCMD_REWIND 0x21 /* rewind tape */ 505 #define QCMD_ERASE 0x22 /* erase tape */ 506 #define QCMD_RETEN 0x24 /* retension tape */ 507 #define QCMD_WRT_DATA 0x40 /* write data */ 508 #define QCMD_WRT_FM 0x60 /* write file mark */ 509 #define QCMD_RD_DATA 0x80 /* read data */ 510 #define QCMD_RD_FM 0xA0 /* read file mark (forward direction) */ 511 #define QCMD_RD_STAT 0xC0 /* read status */ 512 513 /* Other (optional/vendor unique) commands */ 514 /* Density commands are only valid when TP_BOM is set! */ 515 #define QCMD_DENS_11 0x26 /* QIC-11 */ 516 #define QCMD_DENS_24 0x27 /* QIC-24: 9 track 60MB */ 517 #define QCMD_DENS_120 0x28 /* QIC-120: 15 track 120MB */ 518 #define QCMD_DENS_150 0x29 /* QIC-150: 18 track 150MB */ 519 #define QCMD_DENS_300 0x2A /* QIC-300/QIC-2100 */ 520 #define QCMD_DENS_600 0x2B /* QIC-600/QIC-2200 */ 521 /* don't know about QIC-1000 and QIC-1350 */ 522 523 #define QCMD_WRTNU_DATA 0x40 /* write data, no underruns, insert filler. */ 524 #define QCMD_SPACE_FWD 0x81 /* skip next block */ 525 #define QCMD_SPACE_BCK 0x89 /* move tape head one block back -- very useful! */ 526 #define QCMD_RD_FM_BCK 0xA8 /* read filemark (backwards) */ 527 #define QCMD_SEEK_EOD 0xA3 /* skip to EOD */ 528 #define QCMD_RD_STAT_X1 0xC1 /* read extended status 1 */ 529 #define QCMD_RD_STAT_X2 0xC4 /* read extended status 2 */ 530 #define QCMD_RD_STAT_X3 0xE0 /* read extended status 3 */ 531 #define QCMD_SELF_TST1 0xC2 /* run self test 1 (nondestructive) */ 532 #define QCMD_SELF_TST2 0xCA /* run self test 2 (destructive) */ 533 534 535 536 /* Optional, QFA (Quick File Access) commands. 537 * Not all drives support this, but those that do could use these commands 538 * to implement semi-non-sequential access. `mt fsf` would benefit from this. 539 * QFA divides the tape into 2 partitions, a data and a directory partition, 540 * causing some incompatibility problems wrt std QIC-02 data exchange. 541 * It would be useful to cache the directory info, but that might be tricky 542 * to do in kernel-space. [Size constraints.] 543 * Refer to the QIC-02 specs, appendix A for more information. 544 * I have no idea how other *nix variants implement QFA. 545 * I have no idea which drives support QFA and which don't. 546 */ 547 #define QFA_ENABLE 0x2D /* enter QFA mode, give @ BOT only */ 548 #define QFA_DATA 0x20 /* select data partition */ 549 #define QFA_DIR 0x23 /* select directory partition */ 550 #define QFA_RD_POS 0xCF /* read position+status bytes */ 551 #define QFA_SEEK_EOD 0xA1 /* seek EOD within current partition */ 552 #define QFA_SEEK_BLK 0xAF /* seek to a block within current partition */ 553 554 555 556 557 /* 558 * Debugging flags 559 */ 560 #define TPQD_SENSE_TEXT 0x0001 561 #define TPQD_SENSE_CNTS 0x0002 562 #define TPQD_REWIND 0x0004 563 #define TPQD_TERM_CYCLE 0x0008 564 #define TPQD_IOCTLS 0x0010 565 #define TPQD_DMAX 0x0020 566 #define TPQD_BLKSZ 0x0040 567 #define TPQD_MISC 0x0080 568 569 #define TPQD_DEBUG 0x0100 570 571 #define TPQD_DIAGS 0x1000 572 573 #define TPQD_ALWAYS 0x8000 574 575 #define TPQD_DEFAULT_FLAGS 0x00fc 576 577 578 #define TPQDBG(f) ((QIC02_TAPE_DEBUG) & (TPQD_##f)) 579 580 581 /* Minor device codes for tapes: 582 * |7|6|5|4|3|2|1|0| 583 * | \ | / \ | / |_____ 1=rewind on close, 0=no rewind on close 584 * | \|/ |_________ Density: 000=none, 001=QIC-11, 010=24, 011=120, 585 * | | 100=QIC-150, 101..111 reserved. 586 * | |_______________ Reserved for unit numbers. 587 * |___________________ Reserved for diagnostics during debugging. 588 */ 589 590 #define TP_REWCLOSE(d) ((MINOR(d)&0x01) == 1) /* rewind bit */ 591 /* rewind is only done if data has been transferred */ 592 #define TP_DENS(dev) ((MINOR(dev) >> 1) & 0x07) /* tape density */ 593 #define TP_UNIT(dev) ((MINOR(dev) >> 4) & 0x07) /* unit number */ 594 595 /* print excessive diagnostics */ 596 #define TP_DIAGS(dev) (QIC02_TAPE_DEBUG & TPQD_DIAGS) 597 598 /* status codes returned by a WTS_RDSTAT call */ 599 struct tpstatus { /* sizeof(short)==2), LSB first */ 600 unsigned short exs; /* Drive exception flags */ 601 unsigned short dec; /* data error count: nr of blocks rewritten/soft read errors */ 602 unsigned short urc; /* underrun count: nr of times streaming was interrupted */ 603 }; 604 #define TPSTATSIZE sizeof(struct tpstatus) 605 606 607 /* defines for tpstatus.exs -- taken from 386BSD wt driver */ 608 #define TP_POR 0x100 /* Power on or reset occurred */ 609 #define TP_EOR 0x200 /* REServed for end of RECORDED media */ 610 #define TP_PAR 0x400 /* REServed for bus parity */ 611 #define TP_BOM 0x800 /* Beginning of media */ 612 #define TP_MBD 0x1000 /* Marginal block detected */ 613 #define TP_NDT 0x2000 /* No data detected */ 614 #define TP_ILL 0x4000 /* Illegal command */ 615 #define TP_ST1 0x8000 /* Status byte 1 flag */ 616 #define TP_FIL 0x01 /* File mark detected */ 617 #define TP_BNL 0x02 /* Bad block not located */ 618 #define TP_UDA 0x04 /* Unrecoverable data error */ 619 #define TP_EOM 0x08 /* End of media */ 620 #define TP_WRP 0x10 /* Write protected cartridge */ 621 #define TP_USL 0x20 /* Unselected drive */ 622 #define TP_CNI 0x40 /* Cartridge not in place */ 623 #define TP_ST0 0x80 /* Status byte 0 flag */ 624 625 #define REPORT_ERR0 (TP_CNI|TP_USL|TP_WRP|TP_EOM|TP_UDA|TP_BNL|TP_FIL) 626 #define REPORT_ERR1 (TP_ILL|TP_NDT|TP_MBD|TP_PAR) 627 628 629 /* exception numbers */ 630 #define EXC_UNKNOWN 0 /* (extra) Unknown exception code */ 631 #define EXC_NDRV 1 /* No drive */ 632 #define EXC_NCART 2 /* No cartridge */ 633 #define EXC_WP 3 /* Write protected */ 634 #define EXC_EOM 4 /* EOM */ 635 #define EXC_RWA 5 /* read/write abort */ 636 #define EXC_XBAD 6 /* read error, bad block transferred */ 637 #define EXC_XFILLER 7 /* read error, filler block transferred */ 638 #define EXC_NDT 8 /* read error, no data */ 639 #define EXC_NDTEOM 9 /* read error, no data & EOM */ 640 #define EXC_NDTBOM 10 /* read error, no data & BOM */ 641 #define EXC_FM 11 /* Read a filemark */ 642 #define EXC_ILL 12 /* Illegal command */ 643 #define EXC_POR 13 /* Power on/reset */ 644 #define EXC_MARGINAL 14 /* Marginal block detected */ 645 #define EXC_EOR 15 /* (extra, for SEEKEOD) End Of Recorded data reached */ 646 #define EXC_BOM 16 /* (extra) BOM reached */ 647 648 649 #define TAPE_NOTIFY_TIMEOUT 1000000 650 651 /* internal function return codes */ 652 #define TE_OK 0 /* everything is fine */ 653 #define TE_EX 1 /* exception detected */ 654 #define TE_ERR 2 /* some error */ 655 #define TE_NS 3 /* can't read status */ 656 #define TE_TIM 4 /* timed out */ 657 #define TE_DEAD 5 /* tape drive doesn't respond */ 658 #define TE_END 6 /******** Archive hack *****/ 659 660 /* timeout timer values -- check these! */ 661 #define TIM_S (4*HZ) /* 4 seconds (normal cmds) */ 662 #define TIM_M (30*HZ) /* 30 seconds (write FM) */ 663 #define TIM_R (8*60*HZ) /* 8 minutes (retensioning) */ 664 #define TIM_F (2*3600*HZ) /* est. 1.2hr for full tape read/write+2 retens */ 665 666 #define TIMERON(t) mod_timer(&tp_timer, jiffies + (t)) 667 #define TIMEROFF del_timer_sync(&tp_timer); 668 #define TIMERCONT add_timer(&tp_timer); 669 670 671 typedef char flag; 672 #define NO 0 /* NO must be 0 */ 673 #define YES 1 /* YES must be != 0 */ 674 675 676 #ifdef TDEBUG 677 # define TPQDEB(s) s 678 # define TPQPUTS(s) tpqputs(s) 679 #else 680 # define TPQDEB(s) 681 # define TPQPUTS(s) 682 #endif 683 684 685 /* NR_BLK_BUF is a `tuneable parameter'. If you're really low on 686 * kernel space, you could decrease it to 1, or if you got a very 687 * slow machine, you could increase it up to 127 blocks. Less kernel 688 * buffer blocks result in more context-switching. 689 */ 690 #define NR_BLK_BUF 20 /* max 127 blocks */ 691 #define TAPE_BLKSIZE 512 /* streamer tape block size (fixed) */ 692 #define TPQBUF_SIZE (TAPE_BLKSIZE*NR_BLK_BUF) /* buffer size */ 693 694 695 #define BLOCKS_BEYOND_EW 2 /* nr of blocks after Early Warning hole */ 696 #define BOGUS_IRQ 32009 697 698 699 /* This is internal data, filled in based on the ifc_type field given 700 * by the user. Everex is mapped to Wangtek with a different 701 * `dma_enable_value', if dmanr==3. 702 */ 703 struct qic02_ccb { 704 long ifc_type; 705 706 unsigned short port_stat; /* Status port address */ 707 unsigned short port_ctl; /* Control port address */ 708 unsigned short port_cmd; /* Command port address */ 709 unsigned short port_data; /* Data port address */ 710 711 /* status register bits */ 712 unsigned short stat_polarity; /* invert status bits or not */ 713 unsigned short stat_ready; /* drive ready */ 714 unsigned short stat_exception; /* drive signals exception */ 715 unsigned short stat_mask; 716 unsigned short stat_resetmask; 717 unsigned short stat_resetval; 718 719 /* control register bits */ 720 unsigned short ctl_reset; /* reset drive */ 721 unsigned short ctl_request; /* latch command */ 722 723 /* This is used to change the DMA3 behaviour */ 724 unsigned short dma_enable_value; 725 }; 726 727 #if MODULE 728 static int qic02_tape_init(void); 729 #else 730 extern int qic02_tape_init(void); /* for mem.c */ 731 #endif 732 733 734 735 #endif /* CONFIG_QIC02_TAPE */ 736 737 #endif /* _LINUX_TPQIC02_H */ 738 739