1 /* SPDX-License-Identifier: ISC */
2 /* Copyright (C) 2019 MediaTek Inc. */
3
4 #ifndef __MT7615_H
5 #define __MT7615_H
6
7 #include <linux/completion.h>
8 #include <linux/interrupt.h>
9 #include <linux/ktime.h>
10 #include <linux/regmap.h>
11 #include "../mt76_connac_mcu.h"
12 #include "regs.h"
13
14 #define MT7615_MAX_INTERFACES 16
15 #define MT7615_MAX_WMM_SETS 4
16 #define MT7663_WTBL_SIZE 32
17 #define MT7615_WTBL_SIZE 128
18 #define MT7615_WTBL_RESERVED (mt7615_wtbl_size(dev) - 1)
19 #define MT7615_WTBL_STA (MT7615_WTBL_RESERVED - \
20 MT7615_MAX_INTERFACES)
21
22 #define MT7615_PM_TIMEOUT (HZ / 12)
23 #define MT7615_HW_SCAN_TIMEOUT (HZ / 10)
24 #define MT7615_RESET_TIMEOUT (30 * HZ)
25 #define MT7615_RATE_RETRY 2
26
27 #define MT7615_TX_RING_SIZE 1024
28 #define MT7615_TX_MGMT_RING_SIZE 128
29 #define MT7615_TX_MCU_RING_SIZE 128
30 #define MT7615_TX_FWDL_RING_SIZE 128
31
32 #define MT7615_RX_RING_SIZE 1024
33 #define MT7615_RX_MCU_RING_SIZE 512
34
35 #define MT7615_DRV_OWN_RETRY_COUNT 10
36
37 #define MT7615_FIRMWARE_CR4 "mediatek/mt7615_cr4.bin"
38 #define MT7615_FIRMWARE_N9 "mediatek/mt7615_n9.bin"
39 #define MT7615_ROM_PATCH "mediatek/mt7615_rom_patch.bin"
40
41 #define MT7622_FIRMWARE_N9 "mediatek/mt7622_n9.bin"
42 #define MT7622_ROM_PATCH "mediatek/mt7622_rom_patch.bin"
43
44 #define MT7615_FIRMWARE_V1 1
45 #define MT7615_FIRMWARE_V2 2
46 #define MT7615_FIRMWARE_V3 3
47
48 #define MT7663_OFFLOAD_ROM_PATCH "mediatek/mt7663pr2h.bin"
49 #define MT7663_OFFLOAD_FIRMWARE_N9 "mediatek/mt7663_n9_v3.bin"
50 #define MT7663_ROM_PATCH "mediatek/mt7663pr2h_rebb.bin"
51 #define MT7663_FIRMWARE_N9 "mediatek/mt7663_n9_rebb.bin"
52
53 #define MT7615_EEPROM_SIZE 1024
54 #define MT7615_TOKEN_SIZE 4096
55
56 #define MT_FRAC_SCALE 12
57 #define MT_FRAC(val, div) (((val) << MT_FRAC_SCALE) / (div))
58
59 #define MT_CHFREQ_VALID BIT(7)
60 #define MT_CHFREQ_DBDC_IDX BIT(6)
61 #define MT_CHFREQ_SEQ GENMASK(5, 0)
62
63 #define MT7615_BAR_RATE_DEFAULT 0x4b /* OFDM 6M */
64 #define MT7615_CFEND_RATE_DEFAULT 0x49 /* OFDM 24M */
65 #define MT7615_CFEND_RATE_11B 0x03 /* 11B LP, 11M */
66
67 struct mt7615_vif;
68 struct mt7615_sta;
69 struct mt7615_dfs_pulse;
70 struct mt7615_dfs_pattern;
71 enum mt7615_cipher_type;
72
73 enum mt7615_hw_txq_id {
74 MT7615_TXQ_MAIN,
75 MT7615_TXQ_EXT,
76 MT7615_TXQ_MCU,
77 MT7615_TXQ_FWDL,
78 };
79
80 enum mt7622_hw_txq_id {
81 MT7622_TXQ_AC0,
82 MT7622_TXQ_AC1,
83 MT7622_TXQ_AC2,
84 MT7622_TXQ_FWDL = MT7615_TXQ_FWDL,
85 MT7622_TXQ_AC3,
86 MT7622_TXQ_MGMT,
87 MT7622_TXQ_MCU = 15,
88 };
89
90 struct mt7615_rate_set {
91 struct ieee80211_tx_rate probe_rate;
92 struct ieee80211_tx_rate rates[4];
93 };
94
95 struct mt7615_rate_desc {
96 bool rateset;
97 u16 probe_val;
98 u16 val[4];
99 u8 bw_idx;
100 u8 bw;
101 };
102
103 struct mt7615_wtbl_rate_desc {
104 struct list_head node;
105
106 struct mt7615_rate_desc rate;
107 struct mt7615_sta *sta;
108 };
109
110 struct mt7663s_intr {
111 u32 isr;
112 struct {
113 u32 wtqcr[8];
114 } tx;
115 struct {
116 u16 num[2];
117 u16 len[2][16];
118 } rx;
119 u32 rec_mb[2];
120 } __packed;
121
122 struct mt7615_sta {
123 struct mt76_wcid wcid; /* must be first */
124
125 struct mt7615_vif *vif;
126
127 struct list_head poll_list;
128 u32 airtime_ac[8];
129
130 struct ieee80211_tx_rate rates[4];
131
132 struct mt7615_rate_set rateset[2];
133 u32 rate_set_tsf;
134
135 u8 rate_count;
136 u8 n_rates;
137
138 u8 rate_probe;
139 };
140
141 struct mt7615_vif {
142 struct mt76_vif mt76; /* must be first */
143 struct mt7615_sta sta;
144 };
145
146 struct mib_stats {
147 u32 ack_fail_cnt;
148 u32 fcs_err_cnt;
149 u32 rts_cnt;
150 u32 rts_retries_cnt;
151 u32 ba_miss_cnt;
152 unsigned long aggr_per;
153 };
154
155 struct mt7615_phy {
156 struct mt76_phy *mt76;
157 struct mt7615_dev *dev;
158
159 struct ieee80211_vif *monitor_vif;
160
161 u8 n_beacon_vif;
162
163 u32 rxfilter;
164 u64 omac_mask;
165
166 u16 noise;
167
168 bool scs_en;
169
170 unsigned long last_cca_adj;
171 int false_cca_ofdm, false_cca_cck;
172 s8 ofdm_sensitivity;
173 s8 cck_sensitivity;
174
175 s16 coverage_class;
176 u8 slottime;
177
178 u8 chfreq;
179 u8 rdd_state;
180
181 u32 rx_ampdu_ts;
182 u32 ampdu_ref;
183
184 struct mib_stats mib;
185
186 struct sk_buff_head scan_event_list;
187 struct delayed_work scan_work;
188
189 struct work_struct roc_work;
190 struct timer_list roc_timer;
191 wait_queue_head_t roc_wait;
192 bool roc_grant;
193
194 #ifdef CONFIG_NL80211_TESTMODE
195 struct {
196 u32 *reg_backup;
197
198 s16 last_freq_offset;
199 u8 last_rcpi[4];
200 s8 last_ib_rssi[4];
201 s8 last_wb_rssi[4];
202 } test;
203 #endif
204 };
205
206 #define mt7615_mcu_add_tx_ba(dev, ...) (dev)->mcu_ops->add_tx_ba((dev), __VA_ARGS__)
207 #define mt7615_mcu_add_rx_ba(dev, ...) (dev)->mcu_ops->add_rx_ba((dev), __VA_ARGS__)
208 #define mt7615_mcu_sta_add(phy, ...) ((phy)->dev)->mcu_ops->sta_add((phy), __VA_ARGS__)
209 #define mt7615_mcu_add_dev_info(phy, ...) ((phy)->dev)->mcu_ops->add_dev_info((phy), __VA_ARGS__)
210 #define mt7615_mcu_add_bss_info(phy, ...) ((phy)->dev)->mcu_ops->add_bss_info((phy), __VA_ARGS__)
211 #define mt7615_mcu_add_beacon(dev, ...) (dev)->mcu_ops->add_beacon_offload((dev), __VA_ARGS__)
212 #define mt7615_mcu_set_pm(dev, ...) (dev)->mcu_ops->set_pm_state((dev), __VA_ARGS__)
213 #define mt7615_mcu_set_drv_ctrl(dev) (dev)->mcu_ops->set_drv_ctrl((dev))
214 #define mt7615_mcu_set_fw_ctrl(dev) (dev)->mcu_ops->set_fw_ctrl((dev))
215 #define mt7615_mcu_set_sta_decap_offload(dev, ...) (dev)->mcu_ops->set_sta_decap_offload((dev), __VA_ARGS__)
216 struct mt7615_mcu_ops {
217 int (*add_tx_ba)(struct mt7615_dev *dev,
218 struct ieee80211_ampdu_params *params,
219 bool enable);
220 int (*add_rx_ba)(struct mt7615_dev *dev,
221 struct ieee80211_ampdu_params *params,
222 bool enable);
223 int (*sta_add)(struct mt7615_phy *phy, struct ieee80211_vif *vif,
224 struct ieee80211_sta *sta, bool enable);
225 int (*add_dev_info)(struct mt7615_phy *phy, struct ieee80211_vif *vif,
226 bool enable);
227 int (*add_bss_info)(struct mt7615_phy *phy, struct ieee80211_vif *vif,
228 struct ieee80211_sta *sta, bool enable);
229 int (*add_beacon_offload)(struct mt7615_dev *dev,
230 struct ieee80211_hw *hw,
231 struct ieee80211_vif *vif, bool enable);
232 int (*set_pm_state)(struct mt7615_dev *dev, int band, int state);
233 int (*set_drv_ctrl)(struct mt7615_dev *dev);
234 int (*set_fw_ctrl)(struct mt7615_dev *dev);
235 int (*set_sta_decap_offload)(struct mt7615_dev *dev,
236 struct ieee80211_vif *vif,
237 struct ieee80211_sta *sta);
238 };
239
240 struct mt7615_dev {
241 union { /* must be first */
242 struct mt76_dev mt76;
243 struct mt76_phy mphy;
244 };
245
246 const struct mt76_bus_ops *bus_ops;
247 struct tasklet_struct irq_tasklet;
248
249 struct mt7615_phy phy;
250 u64 omac_mask;
251
252 u16 chainmask;
253
254 struct ieee80211_ops *ops;
255 const struct mt7615_mcu_ops *mcu_ops;
256 struct regmap *infracfg;
257 const u32 *reg_map;
258
259 struct work_struct mcu_work;
260
261 struct work_struct reset_work;
262 wait_queue_head_t reset_wait;
263 u32 reset_state;
264
265 struct list_head sta_poll_list;
266 spinlock_t sta_poll_lock;
267
268 struct {
269 u8 n_pulses;
270 u32 period;
271 u16 width;
272 s16 power;
273 } radar_pattern;
274 u32 hw_pattern;
275
276 bool fw_debug;
277 bool flash_eeprom;
278 bool dbdc_support;
279
280 u8 fw_ver;
281
282 struct work_struct rate_work;
283 struct list_head wrd_head;
284
285 u32 debugfs_rf_wf;
286 u32 debugfs_rf_reg;
287
288 u32 muar_mask;
289
290 struct mt76_connac_pm pm;
291 struct mt76_connac_coredump coredump;
292 };
293
294 enum tx_pkt_queue_idx {
295 MT_LMAC_AC00,
296 MT_LMAC_AC01,
297 MT_LMAC_AC02,
298 MT_LMAC_AC03,
299 MT_LMAC_ALTX0 = 0x10,
300 MT_LMAC_BMC0,
301 MT_LMAC_BCN0,
302 MT_LMAC_PSMP0,
303 MT_LMAC_ALTX1,
304 MT_LMAC_BMC1,
305 MT_LMAC_BCN1,
306 MT_LMAC_PSMP1,
307 };
308
309 enum {
310 MT_RX_SEL0,
311 MT_RX_SEL1,
312 };
313
314 enum mt7615_rdd_cmd {
315 RDD_STOP,
316 RDD_START,
317 RDD_DET_MODE,
318 RDD_DET_STOP,
319 RDD_CAC_START,
320 RDD_CAC_END,
321 RDD_NORMAL_START,
322 RDD_DISABLE_DFS_CAL,
323 RDD_PULSE_DBG,
324 RDD_READ_PULSE,
325 RDD_RESUME_BF,
326 };
327
328 static inline struct mt7615_phy *
mt7615_hw_phy(struct ieee80211_hw * hw)329 mt7615_hw_phy(struct ieee80211_hw *hw)
330 {
331 struct mt76_phy *phy = hw->priv;
332
333 return phy->priv;
334 }
335
336 static inline struct mt7615_dev *
mt7615_hw_dev(struct ieee80211_hw * hw)337 mt7615_hw_dev(struct ieee80211_hw *hw)
338 {
339 struct mt76_phy *phy = hw->priv;
340
341 return container_of(phy->dev, struct mt7615_dev, mt76);
342 }
343
344 static inline struct mt7615_phy *
mt7615_ext_phy(struct mt7615_dev * dev)345 mt7615_ext_phy(struct mt7615_dev *dev)
346 {
347 struct mt76_phy *phy = dev->mt76.phy2;
348
349 if (!phy)
350 return NULL;
351
352 return phy->priv;
353 }
354
355 extern struct ieee80211_rate mt7615_rates[12];
356 extern const struct ieee80211_ops mt7615_ops;
357 extern const u32 mt7615e_reg_map[__MT_BASE_MAX];
358 extern const u32 mt7663e_reg_map[__MT_BASE_MAX];
359 extern const u32 mt7663_usb_sdio_reg_map[__MT_BASE_MAX];
360 extern struct pci_driver mt7615_pci_driver;
361 extern struct platform_driver mt7622_wmac_driver;
362 extern const struct mt76_testmode_ops mt7615_testmode_ops;
363
364 #ifdef CONFIG_MT7622_WMAC
365 int mt7622_wmac_init(struct mt7615_dev *dev);
366 #else
mt7622_wmac_init(struct mt7615_dev * dev)367 static inline int mt7622_wmac_init(struct mt7615_dev *dev)
368 {
369 return 0;
370 }
371 #endif
372
373 int mt7615_thermal_init(struct mt7615_dev *dev);
374 int mt7615_mmio_probe(struct device *pdev, void __iomem *mem_base,
375 int irq, const u32 *map);
376 u32 mt7615_reg_map(struct mt7615_dev *dev, u32 addr);
377
378 void mt7615_init_device(struct mt7615_dev *dev);
379 int mt7615_register_device(struct mt7615_dev *dev);
380 void mt7615_unregister_device(struct mt7615_dev *dev);
381 int mt7615_register_ext_phy(struct mt7615_dev *dev);
382 void mt7615_unregister_ext_phy(struct mt7615_dev *dev);
383 int mt7615_eeprom_init(struct mt7615_dev *dev, u32 addr);
384 int mt7615_eeprom_get_target_power_index(struct mt7615_dev *dev,
385 struct ieee80211_channel *chan,
386 u8 chain_idx);
387 int mt7615_eeprom_get_power_delta_index(struct mt7615_dev *dev,
388 enum nl80211_band band);
389 int mt7615_wait_pdma_busy(struct mt7615_dev *dev);
390 int mt7615_dma_init(struct mt7615_dev *dev);
391 void mt7615_dma_start(struct mt7615_dev *dev);
392 void mt7615_dma_cleanup(struct mt7615_dev *dev);
393 int mt7615_mcu_init(struct mt7615_dev *dev);
394 bool mt7615_wait_for_mcu_init(struct mt7615_dev *dev);
395 void mt7615_mac_set_rates(struct mt7615_phy *phy, struct mt7615_sta *sta,
396 struct ieee80211_tx_rate *probe_rate,
397 struct ieee80211_tx_rate *rates);
398 void mt7615_pm_wake_work(struct work_struct *work);
399 void mt7615_pm_power_save_work(struct work_struct *work);
400 int mt7615_mcu_del_wtbl_all(struct mt7615_dev *dev);
401 int mt7615_mcu_set_chan_info(struct mt7615_phy *phy, int cmd);
402 int mt7615_mcu_set_wmm(struct mt7615_dev *dev, u8 queue,
403 const struct ieee80211_tx_queue_params *params);
404 void mt7615_mcu_rx_event(struct mt7615_dev *dev, struct sk_buff *skb);
405 int mt7615_mcu_rdd_send_pattern(struct mt7615_dev *dev);
406 int mt7615_mcu_fw_log_2_host(struct mt7615_dev *dev, u8 ctrl);
407
mt7615_irq_enable(struct mt7615_dev * dev,u32 mask)408 static inline void mt7615_irq_enable(struct mt7615_dev *dev, u32 mask)
409 {
410 mt76_set_irq_mask(&dev->mt76, 0, 0, mask);
411
412 tasklet_schedule(&dev->irq_tasklet);
413 }
414
mt7615_firmware_offload(struct mt7615_dev * dev)415 static inline bool mt7615_firmware_offload(struct mt7615_dev *dev)
416 {
417 return dev->fw_ver > MT7615_FIRMWARE_V2;
418 }
419
mt7615_wtbl_size(struct mt7615_dev * dev)420 static inline u16 mt7615_wtbl_size(struct mt7615_dev *dev)
421 {
422 if (is_mt7663(&dev->mt76) && mt7615_firmware_offload(dev))
423 return MT7663_WTBL_SIZE;
424 else
425 return MT7615_WTBL_SIZE;
426 }
427
428 #define mt7615_mutex_acquire(dev) \
429 mt76_connac_mutex_acquire(&(dev)->mt76, &(dev)->pm)
430 #define mt7615_mutex_release(dev) \
431 mt76_connac_mutex_release(&(dev)->mt76, &(dev)->pm)
432
mt7615_lmac_mapping(struct mt7615_dev * dev,u8 ac)433 static inline u8 mt7615_lmac_mapping(struct mt7615_dev *dev, u8 ac)
434 {
435 static const u8 lmac_queue_map[] = {
436 [IEEE80211_AC_BK] = MT_LMAC_AC00,
437 [IEEE80211_AC_BE] = MT_LMAC_AC01,
438 [IEEE80211_AC_VI] = MT_LMAC_AC02,
439 [IEEE80211_AC_VO] = MT_LMAC_AC03,
440 };
441
442 if (WARN_ON_ONCE(ac >= ARRAY_SIZE(lmac_queue_map)))
443 return MT_LMAC_AC01; /* BE */
444
445 return lmac_queue_map[ac];
446 }
447
mt7615_tx_mcu_int_mask(struct mt7615_dev * dev)448 static inline u32 mt7615_tx_mcu_int_mask(struct mt7615_dev *dev)
449 {
450 return MT_INT_TX_DONE(dev->mt76.q_mcu[MT_MCUQ_WM]->hw_idx);
451 }
452
453 static inline unsigned long
mt7615_get_macwork_timeout(struct mt7615_dev * dev)454 mt7615_get_macwork_timeout(struct mt7615_dev *dev)
455 {
456 return dev->pm.enable ? HZ / 3 : HZ / 10;
457 }
458
459 void mt7615_dma_reset(struct mt7615_dev *dev);
460 void mt7615_scan_work(struct work_struct *work);
461 void mt7615_roc_work(struct work_struct *work);
462 void mt7615_roc_timer(struct timer_list *timer);
463 void mt7615_init_txpower(struct mt7615_dev *dev,
464 struct ieee80211_supported_band *sband);
465 int mt7615_set_channel(struct mt7615_phy *phy);
466 void mt7615_init_work(struct mt7615_dev *dev);
467
468 int mt7615_mcu_restart(struct mt76_dev *dev);
469 void mt7615_update_channel(struct mt76_phy *mphy);
470 bool mt7615_mac_wtbl_update(struct mt7615_dev *dev, int idx, u32 mask);
471 void mt7615_mac_reset_counters(struct mt7615_dev *dev);
472 void mt7615_mac_cca_stats_reset(struct mt7615_phy *phy);
473 void mt7615_mac_set_scs(struct mt7615_phy *phy, bool enable);
474 void mt7615_mac_enable_nf(struct mt7615_dev *dev, bool ext_phy);
475 void mt7615_mac_sta_poll(struct mt7615_dev *dev);
476 int mt7615_mac_write_txwi(struct mt7615_dev *dev, __le32 *txwi,
477 struct sk_buff *skb, struct mt76_wcid *wcid,
478 struct ieee80211_sta *sta, int pid,
479 struct ieee80211_key_conf *key, bool beacon);
480 void mt7615_mac_set_timing(struct mt7615_phy *phy);
481 int __mt7615_mac_wtbl_set_key(struct mt7615_dev *dev,
482 struct mt76_wcid *wcid,
483 struct ieee80211_key_conf *key,
484 enum set_key_cmd cmd);
485 int mt7615_mac_wtbl_set_key(struct mt7615_dev *dev, struct mt76_wcid *wcid,
486 struct ieee80211_key_conf *key,
487 enum set_key_cmd cmd);
488 void mt7615_mac_reset_work(struct work_struct *work);
489 u32 mt7615_mac_get_sta_tid_sn(struct mt7615_dev *dev, int wcid, u8 tid);
490
491 int mt7615_mcu_parse_response(struct mt76_dev *mdev, int cmd,
492 struct sk_buff *skb, int seq);
493 u32 mt7615_rf_rr(struct mt7615_dev *dev, u32 wf, u32 reg);
494 int mt7615_rf_wr(struct mt7615_dev *dev, u32 wf, u32 reg, u32 val);
495 int mt7615_mcu_set_dbdc(struct mt7615_dev *dev);
496 int mt7615_mcu_set_eeprom(struct mt7615_dev *dev);
497 int mt7615_mcu_get_temperature(struct mt7615_dev *dev);
498 int mt7615_mcu_set_tx_power(struct mt7615_phy *phy);
499 void mt7615_mcu_exit(struct mt7615_dev *dev);
500 void mt7615_mcu_fill_msg(struct mt7615_dev *dev, struct sk_buff *skb,
501 int cmd, int *wait_seq);
502
503 int mt7615_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
504 enum mt76_txq_id qid, struct mt76_wcid *wcid,
505 struct ieee80211_sta *sta,
506 struct mt76_tx_info *tx_info);
507
508 void mt7615_tx_worker(struct mt76_worker *w);
509 void mt7615_tx_complete_skb(struct mt76_dev *mdev, struct mt76_queue_entry *e);
510 void mt7615_tx_token_put(struct mt7615_dev *dev);
511 bool mt7615_rx_check(struct mt76_dev *mdev, void *data, int len);
512 void mt7615_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
513 struct sk_buff *skb);
514 void mt7615_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps);
515 int mt7615_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
516 struct ieee80211_sta *sta);
517 void mt7615_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
518 struct ieee80211_sta *sta);
519 void mt7615_mac_work(struct work_struct *work);
520 void mt7615_txp_skb_unmap(struct mt76_dev *dev,
521 struct mt76_txwi_cache *txwi);
522 int mt7615_mcu_set_rx_hdr_trans_blacklist(struct mt7615_dev *dev);
523 int mt7615_mcu_set_fcc5_lpn(struct mt7615_dev *dev, int val);
524 int mt7615_mcu_set_pulse_th(struct mt7615_dev *dev,
525 const struct mt7615_dfs_pulse *pulse);
526 int mt7615_mcu_set_radar_th(struct mt7615_dev *dev, int index,
527 const struct mt7615_dfs_pattern *pattern);
528 int mt7615_mcu_set_test_param(struct mt7615_dev *dev, u8 param, bool test_mode,
529 u32 val);
530 int mt7615_mcu_set_sku_en(struct mt7615_phy *phy, bool enable);
531 int mt7615_mcu_apply_rx_dcoc(struct mt7615_phy *phy);
532 int mt7615_mcu_apply_tx_dpd(struct mt7615_phy *phy);
533 int mt7615_dfs_init_radar_detector(struct mt7615_phy *phy);
534
535 int mt7615_mcu_set_roc(struct mt7615_phy *phy, struct ieee80211_vif *vif,
536 struct ieee80211_channel *chan, int duration);
537
538 int mt7615_init_debugfs(struct mt7615_dev *dev);
539 int mt7615_mcu_wait_response(struct mt7615_dev *dev, int cmd, int seq);
540
541 int mt7615_mac_set_beacon_filter(struct mt7615_phy *phy,
542 struct ieee80211_vif *vif,
543 bool enable);
544 int mt7615_mcu_set_bss_pm(struct mt7615_dev *dev, struct ieee80211_vif *vif,
545 bool enable);
546 int __mt7663_load_firmware(struct mt7615_dev *dev);
547 void mt7615_coredump_work(struct work_struct *work);
548
549 void mt7622_trigger_hif_int(struct mt7615_dev *dev, bool en);
550
551 /* usb */
552 int mt7663_usb_sdio_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
553 enum mt76_txq_id qid, struct mt76_wcid *wcid,
554 struct ieee80211_sta *sta,
555 struct mt76_tx_info *tx_info);
556 bool mt7663_usb_sdio_tx_status_data(struct mt76_dev *mdev, u8 *update);
557 void mt7663_usb_sdio_tx_complete_skb(struct mt76_dev *mdev,
558 struct mt76_queue_entry *e);
559 int mt7663_usb_sdio_register_device(struct mt7615_dev *dev);
560 int mt7663u_mcu_init(struct mt7615_dev *dev);
561 int mt7663u_mcu_power_on(struct mt7615_dev *dev);
562
563 /* sdio */
564 int mt7663s_mcu_init(struct mt7615_dev *dev);
565
566 #endif
567