1 /*
2  * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and/or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  */
32 
33 #ifndef __MLX5_EN_TC_H__
34 #define __MLX5_EN_TC_H__
35 
36 #include <net/pkt_cls.h>
37 #include "en.h"
38 #include "eswitch.h"
39 #include "en/tc_ct.h"
40 #include "en/tc_tun.h"
41 #include "en/tc/int_port.h"
42 #include "en/tc/meter.h"
43 #include "en_rep.h"
44 
45 #define MLX5E_TC_FLOW_ID_MASK 0x0000ffff
46 
47 #ifdef CONFIG_MLX5_ESWITCH
48 
49 #define NIC_FLOW_ATTR_SZ (sizeof(struct mlx5_flow_attr) +\
50 			  sizeof(struct mlx5_nic_flow_attr))
51 #define ESW_FLOW_ATTR_SZ (sizeof(struct mlx5_flow_attr) +\
52 			  sizeof(struct mlx5_esw_flow_attr))
53 #define ns_to_attr_sz(ns) (((ns) == MLX5_FLOW_NAMESPACE_FDB) ?\
54 			    ESW_FLOW_ATTR_SZ :\
55 			    NIC_FLOW_ATTR_SZ)
56 
57 struct mlx5_fs_chains *mlx5e_nic_chains(struct mlx5e_tc_table *tc);
58 int mlx5e_tc_num_filters(struct mlx5e_priv *priv, unsigned long flags);
59 
60 struct mlx5e_tc_update_priv {
61 	struct net_device *fwd_dev;
62 };
63 
64 struct mlx5_nic_flow_attr {
65 	u32 flow_tag;
66 	u32 hairpin_tirn;
67 	struct mlx5_flow_table *hairpin_ft;
68 };
69 
70 struct mlx5_flow_attr {
71 	u32 action;
72 	struct mlx5_fc *counter;
73 	struct mlx5_modify_hdr *modify_hdr;
74 	struct mlx5_ct_attr ct_attr;
75 	struct mlx5e_sample_attr sample_attr;
76 	struct mlx5e_meter_attr meter_attr;
77 	struct mlx5e_tc_flow_parse_attr *parse_attr;
78 	u32 chain;
79 	u16 prio;
80 	u32 dest_chain;
81 	struct mlx5_flow_table *ft;
82 	struct mlx5_flow_table *dest_ft;
83 	u8 inner_match_level;
84 	u8 outer_match_level;
85 	u8 ip_version;
86 	u8 tun_ip_version;
87 	int tunnel_id; /* mapped tunnel id */
88 	u32 flags;
89 	u32 exe_aso_type;
90 	struct list_head list;
91 	struct mlx5e_post_act_handle *post_act_handle;
92 	struct {
93 		/* Indicate whether the parsed flow should be counted for lag mode decision
94 		 * making
95 		 */
96 		bool count;
97 	} lag;
98 	/* keep this union last */
99 	union {
100 		struct mlx5_esw_flow_attr esw_attr[0];
101 		struct mlx5_nic_flow_attr nic_attr[0];
102 	};
103 };
104 
105 enum {
106 	MLX5_ATTR_FLAG_VLAN_HANDLED  = BIT(0),
107 	MLX5_ATTR_FLAG_SLOW_PATH     = BIT(1),
108 	MLX5_ATTR_FLAG_NO_IN_PORT    = BIT(2),
109 	MLX5_ATTR_FLAG_SRC_REWRITE   = BIT(3),
110 	MLX5_ATTR_FLAG_SAMPLE        = BIT(4),
111 	MLX5_ATTR_FLAG_ACCEPT        = BIT(5),
112 	MLX5_ATTR_FLAG_CT            = BIT(6),
113 };
114 
115 /* Returns true if any of the flags that require skipping further TC/NF processing are set. */
116 static inline bool
mlx5e_tc_attr_flags_skip(u32 attr_flags)117 mlx5e_tc_attr_flags_skip(u32 attr_flags)
118 {
119 	return attr_flags & (MLX5_ATTR_FLAG_SLOW_PATH | MLX5_ATTR_FLAG_ACCEPT);
120 }
121 
122 struct mlx5_rx_tun_attr {
123 	u16 decap_vport;
124 	union {
125 		__be32 v4;
126 		struct in6_addr v6;
127 	} src_ip; /* Valid if decap_vport is not zero */
128 	union {
129 		__be32 v4;
130 		struct in6_addr v6;
131 	} dst_ip; /* Valid if decap_vport is not zero */
132 	u32 vni;
133 };
134 
135 #define MLX5E_TC_TABLE_CHAIN_TAG_BITS 16
136 #define MLX5E_TC_TABLE_CHAIN_TAG_MASK GENMASK(MLX5E_TC_TABLE_CHAIN_TAG_BITS - 1, 0)
137 
138 #define MLX5E_TC_MAX_INT_PORT_NUM (8)
139 
140 #if IS_ENABLED(CONFIG_MLX5_CLS_ACT)
141 
142 struct tunnel_match_key {
143 	struct flow_dissector_key_control enc_control;
144 	struct flow_dissector_key_keyid enc_key_id;
145 	struct flow_dissector_key_ports enc_tp;
146 	struct flow_dissector_key_ip enc_ip;
147 	union {
148 		struct flow_dissector_key_ipv4_addrs enc_ipv4;
149 		struct flow_dissector_key_ipv6_addrs enc_ipv6;
150 	};
151 
152 	int filter_ifindex;
153 };
154 
155 struct tunnel_match_enc_opts {
156 	struct flow_dissector_key_enc_opts key;
157 	struct flow_dissector_key_enc_opts mask;
158 };
159 
160 /* Tunnel_id mapping is TUNNEL_INFO_BITS + ENC_OPTS_BITS.
161  * Upper TUNNEL_INFO_BITS for general tunnel info.
162  * Lower ENC_OPTS_BITS bits for enc_opts.
163  */
164 #define TUNNEL_INFO_BITS 12
165 #define TUNNEL_INFO_BITS_MASK GENMASK(TUNNEL_INFO_BITS - 1, 0)
166 #define ENC_OPTS_BITS 11
167 #define ENC_OPTS_BITS_MASK GENMASK(ENC_OPTS_BITS - 1, 0)
168 #define TUNNEL_ID_BITS (TUNNEL_INFO_BITS + ENC_OPTS_BITS)
169 #define TUNNEL_ID_MASK GENMASK(TUNNEL_ID_BITS - 1, 0)
170 
171 enum {
172 	MLX5E_TC_FLAG_INGRESS_BIT,
173 	MLX5E_TC_FLAG_EGRESS_BIT,
174 	MLX5E_TC_FLAG_NIC_OFFLOAD_BIT,
175 	MLX5E_TC_FLAG_ESW_OFFLOAD_BIT,
176 	MLX5E_TC_FLAG_FT_OFFLOAD_BIT,
177 	MLX5E_TC_FLAG_LAST_EXPORTED_BIT = MLX5E_TC_FLAG_FT_OFFLOAD_BIT,
178 };
179 
180 #define MLX5_TC_FLAG(flag) BIT(MLX5E_TC_FLAG_##flag##_BIT)
181 
182 int mlx5e_tc_esw_init(struct mlx5_rep_uplink_priv *uplink_priv);
183 void mlx5e_tc_esw_cleanup(struct mlx5_rep_uplink_priv *uplink_priv);
184 
185 int mlx5e_tc_ht_init(struct rhashtable *tc_ht);
186 void mlx5e_tc_ht_cleanup(struct rhashtable *tc_ht);
187 
188 int mlx5e_configure_flower(struct net_device *dev, struct mlx5e_priv *priv,
189 			   struct flow_cls_offload *f, unsigned long flags);
190 int mlx5e_delete_flower(struct net_device *dev, struct mlx5e_priv *priv,
191 			struct flow_cls_offload *f, unsigned long flags);
192 
193 int mlx5e_stats_flower(struct net_device *dev, struct mlx5e_priv *priv,
194 		       struct flow_cls_offload *f, unsigned long flags);
195 
196 int mlx5e_tc_configure_matchall(struct mlx5e_priv *priv,
197 				struct tc_cls_matchall_offload *f);
198 int mlx5e_tc_delete_matchall(struct mlx5e_priv *priv,
199 			     struct tc_cls_matchall_offload *f);
200 void mlx5e_tc_stats_matchall(struct mlx5e_priv *priv,
201 			     struct tc_cls_matchall_offload *ma);
202 
203 struct mlx5e_encap_entry;
204 void mlx5e_tc_encap_flows_add(struct mlx5e_priv *priv,
205 			      struct mlx5e_encap_entry *e,
206 			      struct list_head *flow_list);
207 void mlx5e_tc_encap_flows_del(struct mlx5e_priv *priv,
208 			      struct mlx5e_encap_entry *e,
209 			      struct list_head *flow_list);
210 bool mlx5e_encap_take(struct mlx5e_encap_entry *e);
211 void mlx5e_encap_put(struct mlx5e_priv *priv, struct mlx5e_encap_entry *e);
212 
213 void mlx5e_take_all_encap_flows(struct mlx5e_encap_entry *e, struct list_head *flow_list);
214 void mlx5e_put_flow_list(struct mlx5e_priv *priv, struct list_head *flow_list);
215 
216 struct mlx5e_neigh_hash_entry;
217 struct mlx5e_encap_entry *
218 mlx5e_get_next_init_encap(struct mlx5e_neigh_hash_entry *nhe,
219 			  struct mlx5e_encap_entry *e);
220 void mlx5e_tc_update_neigh_used_value(struct mlx5e_neigh_hash_entry *nhe);
221 
222 void mlx5e_tc_reoffload_flows_work(struct work_struct *work);
223 
224 enum mlx5e_tc_attr_to_reg {
225 	CHAIN_TO_REG,
226 	VPORT_TO_REG,
227 	TUNNEL_TO_REG,
228 	CTSTATE_TO_REG,
229 	ZONE_TO_REG,
230 	ZONE_RESTORE_TO_REG,
231 	MARK_TO_REG,
232 	LABELS_TO_REG,
233 	FTEID_TO_REG,
234 	NIC_CHAIN_TO_REG,
235 	NIC_ZONE_RESTORE_TO_REG,
236 	PACKET_COLOR_TO_REG,
237 };
238 
239 struct mlx5e_tc_attr_to_reg_mapping {
240 	int mfield; /* rewrite field */
241 	int moffset; /* bit offset of mfield */
242 	int mlen; /* bits to rewrite/match */
243 
244 	int soffset; /* byte offset of spec for match */
245 };
246 
247 extern struct mlx5e_tc_attr_to_reg_mapping mlx5e_tc_attr_to_reg_mappings[];
248 
249 #define MLX5_REG_MAPPING_MOFFSET(reg_id) (mlx5e_tc_attr_to_reg_mappings[reg_id].moffset)
250 #define MLX5_REG_MAPPING_MBITS(reg_id) (mlx5e_tc_attr_to_reg_mappings[reg_id].mlen)
251 #define MLX5_REG_MAPPING_MASK(reg_id) (GENMASK(mlx5e_tc_attr_to_reg_mappings[reg_id].mlen - 1, 0))
252 
253 bool mlx5e_is_valid_eswitch_fwd_dev(struct mlx5e_priv *priv,
254 				    struct net_device *out_dev);
255 
256 int mlx5e_tc_match_to_reg_set(struct mlx5_core_dev *mdev,
257 			      struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts,
258 			      enum mlx5_flow_namespace_type ns,
259 			      enum mlx5e_tc_attr_to_reg type,
260 			      u32 data);
261 
262 void mlx5e_tc_match_to_reg_mod_hdr_change(struct mlx5_core_dev *mdev,
263 					  struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts,
264 					  enum mlx5e_tc_attr_to_reg type,
265 					  int act_id, u32 data);
266 
267 void mlx5e_tc_match_to_reg_match(struct mlx5_flow_spec *spec,
268 				 enum mlx5e_tc_attr_to_reg type,
269 				 u32 data,
270 				 u32 mask);
271 
272 void mlx5e_tc_match_to_reg_get_match(struct mlx5_flow_spec *spec,
273 				     enum mlx5e_tc_attr_to_reg type,
274 				     u32 *data,
275 				     u32 *mask);
276 
277 int mlx5e_tc_match_to_reg_set_and_get_id(struct mlx5_core_dev *mdev,
278 					 struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts,
279 					 enum mlx5_flow_namespace_type ns,
280 					 enum mlx5e_tc_attr_to_reg type,
281 					 u32 data);
282 
283 int mlx5e_tc_add_flow_mod_hdr(struct mlx5e_priv *priv,
284 			      struct mlx5e_tc_flow *flow,
285 			      struct mlx5_flow_attr *attr);
286 
287 void mlx5e_tc_set_ethertype(struct mlx5_core_dev *mdev,
288 			    struct flow_match_basic *match, bool outer,
289 			    void *headers_c, void *headers_v);
290 
291 int mlx5e_tc_nic_init(struct mlx5e_priv *priv);
292 void mlx5e_tc_nic_cleanup(struct mlx5e_priv *priv);
293 
294 int mlx5e_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
295 			    void *cb_priv);
296 
297 struct mlx5_flow_handle *
298 mlx5e_add_offloaded_nic_rule(struct mlx5e_priv *priv,
299 			     struct mlx5_flow_spec *spec,
300 			     struct mlx5_flow_attr *attr);
301 void mlx5e_del_offloaded_nic_rule(struct mlx5e_priv *priv,
302 				  struct mlx5_flow_handle *rule,
303 				  struct mlx5_flow_attr *attr);
304 
305 struct mlx5_flow_handle *
306 mlx5_tc_rule_insert(struct mlx5e_priv *priv,
307 		    struct mlx5_flow_spec *spec,
308 		    struct mlx5_flow_attr *attr);
309 void
310 mlx5_tc_rule_delete(struct mlx5e_priv *priv,
311 		    struct mlx5_flow_handle *rule,
312 		    struct mlx5_flow_attr *attr);
313 
314 bool mlx5e_tc_is_vf_tunnel(struct net_device *out_dev, struct net_device *route_dev);
315 int mlx5e_tc_query_route_vport(struct net_device *out_dev, struct net_device *route_dev,
316 			       u16 *vport);
317 
318 int mlx5e_set_fwd_to_int_port_actions(struct mlx5e_priv *priv,
319 				      struct mlx5_flow_attr *attr,
320 				      int ifindex,
321 				      enum mlx5e_tc_int_port_type type,
322 				      u32 *action,
323 				      int out_index);
324 #else /* CONFIG_MLX5_CLS_ACT */
mlx5e_tc_nic_init(struct mlx5e_priv * priv)325 static inline int  mlx5e_tc_nic_init(struct mlx5e_priv *priv) { return 0; }
mlx5e_tc_nic_cleanup(struct mlx5e_priv * priv)326 static inline void mlx5e_tc_nic_cleanup(struct mlx5e_priv *priv) {}
mlx5e_tc_ht_init(struct rhashtable * tc_ht)327 static inline int mlx5e_tc_ht_init(struct rhashtable *tc_ht) { return 0; }
mlx5e_tc_ht_cleanup(struct rhashtable * tc_ht)328 static inline void mlx5e_tc_ht_cleanup(struct rhashtable *tc_ht) {}
329 static inline int
mlx5e_setup_tc_block_cb(enum tc_setup_type type,void * type_data,void * cb_priv)330 mlx5e_setup_tc_block_cb(enum tc_setup_type type, void *type_data, void *cb_priv)
331 { return -EOPNOTSUPP; }
332 
333 #endif /* CONFIG_MLX5_CLS_ACT */
334 
335 struct mlx5_flow_attr *mlx5_alloc_flow_attr(enum mlx5_flow_namespace_type type);
336 
337 struct mlx5_flow_handle *
338 mlx5e_add_offloaded_nic_rule(struct mlx5e_priv *priv,
339 			     struct mlx5_flow_spec *spec,
340 			     struct mlx5_flow_attr *attr);
341 void mlx5e_del_offloaded_nic_rule(struct mlx5e_priv *priv,
342 				  struct mlx5_flow_handle *rule,
343 				  struct mlx5_flow_attr *attr);
344 
345 #else /* CONFIG_MLX5_ESWITCH */
mlx5e_tc_nic_init(struct mlx5e_priv * priv)346 static inline int  mlx5e_tc_nic_init(struct mlx5e_priv *priv) { return 0; }
mlx5e_tc_nic_cleanup(struct mlx5e_priv * priv)347 static inline void mlx5e_tc_nic_cleanup(struct mlx5e_priv *priv) {}
mlx5e_tc_num_filters(struct mlx5e_priv * priv,unsigned long flags)348 static inline int  mlx5e_tc_num_filters(struct mlx5e_priv *priv,
349 					unsigned long flags)
350 {
351 	return 0;
352 }
353 
354 static inline int
mlx5e_setup_tc_block_cb(enum tc_setup_type type,void * type_data,void * cb_priv)355 mlx5e_setup_tc_block_cb(enum tc_setup_type type, void *type_data, void *cb_priv)
356 { return -EOPNOTSUPP; }
357 #endif
358 
359 #if IS_ENABLED(CONFIG_MLX5_CLS_ACT)
360 struct mlx5e_tc_table *mlx5e_tc_table_alloc(void);
361 void mlx5e_tc_table_free(struct mlx5e_tc_table *tc);
mlx5e_cqe_regb_chain(struct mlx5_cqe64 * cqe)362 static inline bool mlx5e_cqe_regb_chain(struct mlx5_cqe64 *cqe)
363 {
364 #if IS_ENABLED(CONFIG_NET_TC_SKB_EXT)
365 	u32 chain, reg_b;
366 
367 	reg_b = be32_to_cpu(cqe->ft_metadata);
368 
369 	if (reg_b >> (MLX5E_TC_TABLE_CHAIN_TAG_BITS + ESW_ZONE_ID_BITS))
370 		return false;
371 
372 	chain = reg_b & MLX5E_TC_TABLE_CHAIN_TAG_MASK;
373 	if (chain)
374 		return true;
375 #endif
376 
377 	return false;
378 }
379 
380 bool mlx5e_tc_update_skb(struct mlx5_cqe64 *cqe, struct sk_buff *skb);
381 #else /* CONFIG_MLX5_CLS_ACT */
mlx5e_tc_table_alloc(void)382 static inline struct mlx5e_tc_table *mlx5e_tc_table_alloc(void) { return NULL; }
mlx5e_tc_table_free(struct mlx5e_tc_table * tc)383 static inline void mlx5e_tc_table_free(struct mlx5e_tc_table *tc) {}
mlx5e_cqe_regb_chain(struct mlx5_cqe64 * cqe)384 static inline bool mlx5e_cqe_regb_chain(struct mlx5_cqe64 *cqe)
385 { return false; }
386 static inline bool
mlx5e_tc_update_skb(struct mlx5_cqe64 * cqe,struct sk_buff * skb)387 mlx5e_tc_update_skb(struct mlx5_cqe64 *cqe, struct sk_buff *skb)
388 { return true; }
389 #endif
390 
391 #endif /* __MLX5_EN_TC_H__ */
392