1 /*
2 * Copyright (c) 2007 Cisco Systems, Inc. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33 #ifndef MLX4_CQ_H
34 #define MLX4_CQ_H
35
36 #include <linux/types.h>
37
38 #include <linux/mlx4/device.h>
39 #include <linux/mlx4/doorbell.h>
40
41 struct mlx4_cqe {
42 __be32 vlan_my_qpn;
43 __be32 immed_rss_invalid;
44 __be32 g_mlpath_rqpn;
45 __be16 sl_vid;
46 __be16 rlid;
47 __be16 status;
48 u8 ipv6_ext_mask;
49 u8 badfcs_enc;
50 __be32 byte_cnt;
51 __be16 wqe_index;
52 __be16 checksum;
53 u8 reserved[3];
54 u8 owner_sr_opcode;
55 };
56
57 struct mlx4_err_cqe {
58 __be32 my_qpn;
59 u32 reserved1[5];
60 __be16 wqe_index;
61 u8 vendor_err_syndrome;
62 u8 syndrome;
63 u8 reserved2[3];
64 u8 owner_sr_opcode;
65 };
66
67 enum {
68 MLX4_CQE_VLAN_PRESENT_MASK = 1 << 29,
69 MLX4_CQE_QPN_MASK = 0xffffff,
70 };
71
72 enum {
73 MLX4_CQE_OWNER_MASK = 0x80,
74 MLX4_CQE_IS_SEND_MASK = 0x40,
75 MLX4_CQE_OPCODE_MASK = 0x1f
76 };
77
78 enum {
79 MLX4_CQE_SYNDROME_LOCAL_LENGTH_ERR = 0x01,
80 MLX4_CQE_SYNDROME_LOCAL_QP_OP_ERR = 0x02,
81 MLX4_CQE_SYNDROME_LOCAL_PROT_ERR = 0x04,
82 MLX4_CQE_SYNDROME_WR_FLUSH_ERR = 0x05,
83 MLX4_CQE_SYNDROME_MW_BIND_ERR = 0x06,
84 MLX4_CQE_SYNDROME_BAD_RESP_ERR = 0x10,
85 MLX4_CQE_SYNDROME_LOCAL_ACCESS_ERR = 0x11,
86 MLX4_CQE_SYNDROME_REMOTE_INVAL_REQ_ERR = 0x12,
87 MLX4_CQE_SYNDROME_REMOTE_ACCESS_ERR = 0x13,
88 MLX4_CQE_SYNDROME_REMOTE_OP_ERR = 0x14,
89 MLX4_CQE_SYNDROME_TRANSPORT_RETRY_EXC_ERR = 0x15,
90 MLX4_CQE_SYNDROME_RNR_RETRY_EXC_ERR = 0x16,
91 MLX4_CQE_SYNDROME_REMOTE_ABORTED_ERR = 0x22,
92 };
93
94 enum {
95 MLX4_CQE_STATUS_IPV4 = 1 << 6,
96 MLX4_CQE_STATUS_IPV4F = 1 << 7,
97 MLX4_CQE_STATUS_IPV6 = 1 << 8,
98 MLX4_CQE_STATUS_IPV4OPT = 1 << 9,
99 MLX4_CQE_STATUS_TCP = 1 << 10,
100 MLX4_CQE_STATUS_UDP = 1 << 11,
101 MLX4_CQE_STATUS_IPOK = 1 << 12,
102 };
103
104 enum {
105 MLX4_CQE_LLC = 1,
106 MLX4_CQE_SNAP = 1 << 1,
107 MLX4_CQE_BAD_FCS = 1 << 4,
108 };
109
mlx4_cq_arm(struct mlx4_cq * cq,u32 cmd,void __iomem * uar_page,spinlock_t * doorbell_lock)110 static inline void mlx4_cq_arm(struct mlx4_cq *cq, u32 cmd,
111 void __iomem *uar_page,
112 spinlock_t *doorbell_lock)
113 {
114 __be32 doorbell[2];
115 u32 sn;
116 u32 ci;
117
118 sn = cq->arm_sn & 3;
119 ci = cq->cons_index & 0xffffff;
120
121 *cq->arm_db = cpu_to_be32(sn << 28 | cmd | ci);
122
123 /*
124 * Make sure that the doorbell record in host memory is
125 * written before ringing the doorbell via PCI MMIO.
126 */
127 wmb();
128
129 doorbell[0] = cpu_to_be32(sn << 28 | cmd | cq->cqn);
130 doorbell[1] = cpu_to_be32(ci);
131
132 mlx4_write64(doorbell, uar_page + MLX4_CQ_DOORBELL, doorbell_lock);
133 }
134
mlx4_cq_set_ci(struct mlx4_cq * cq)135 static inline void mlx4_cq_set_ci(struct mlx4_cq *cq)
136 {
137 *cq->set_ci_db = cpu_to_be32(cq->cons_index & 0xffffff);
138 }
139
140 enum {
141 MLX4_CQ_DB_REQ_NOT_SOL = 1 << 24,
142 MLX4_CQ_DB_REQ_NOT = 2 << 24
143 };
144
145 int mlx4_cq_modify(struct mlx4_dev *dev, struct mlx4_cq *cq,
146 u16 count, u16 period);
147 int mlx4_cq_resize(struct mlx4_dev *dev, struct mlx4_cq *cq,
148 int entries, struct mlx4_mtt *mtt);
149
150 #endif /* MLX4_CQ_H */
151