1 /*
2  * Copyright (c) 2006 Cisco Systems, Inc.  All rights reserved.
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and/or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  */
32 
33 #ifndef MLX4_CMD_H
34 #define MLX4_CMD_H
35 
36 #include <linux/dma-mapping.h>
37 
38 enum {
39 	/* initialization and general commands */
40 	MLX4_CMD_SYS_EN		 = 0x1,
41 	MLX4_CMD_SYS_DIS	 = 0x2,
42 	MLX4_CMD_MAP_FA		 = 0xfff,
43 	MLX4_CMD_UNMAP_FA	 = 0xffe,
44 	MLX4_CMD_RUN_FW		 = 0xff6,
45 	MLX4_CMD_MOD_STAT_CFG	 = 0x34,
46 	MLX4_CMD_QUERY_DEV_CAP	 = 0x3,
47 	MLX4_CMD_QUERY_FW	 = 0x4,
48 	MLX4_CMD_ENABLE_LAM	 = 0xff8,
49 	MLX4_CMD_DISABLE_LAM	 = 0xff7,
50 	MLX4_CMD_QUERY_DDR	 = 0x5,
51 	MLX4_CMD_QUERY_ADAPTER	 = 0x6,
52 	MLX4_CMD_INIT_HCA	 = 0x7,
53 	MLX4_CMD_CLOSE_HCA	 = 0x8,
54 	MLX4_CMD_INIT_PORT	 = 0x9,
55 	MLX4_CMD_CLOSE_PORT	 = 0xa,
56 	MLX4_CMD_QUERY_HCA	 = 0xb,
57 	MLX4_CMD_QUERY_PORT	 = 0x43,
58 	MLX4_CMD_SENSE_PORT	 = 0x4d,
59 	MLX4_CMD_HW_HEALTH_CHECK = 0x50,
60 	MLX4_CMD_SET_PORT	 = 0xc,
61 	MLX4_CMD_SET_NODE	 = 0x5a,
62 	MLX4_CMD_ACCESS_DDR	 = 0x2e,
63 	MLX4_CMD_MAP_ICM	 = 0xffa,
64 	MLX4_CMD_UNMAP_ICM	 = 0xff9,
65 	MLX4_CMD_MAP_ICM_AUX	 = 0xffc,
66 	MLX4_CMD_UNMAP_ICM_AUX	 = 0xffb,
67 	MLX4_CMD_SET_ICM_SIZE	 = 0xffd,
68 
69 	/* TPT commands */
70 	MLX4_CMD_SW2HW_MPT	 = 0xd,
71 	MLX4_CMD_QUERY_MPT	 = 0xe,
72 	MLX4_CMD_HW2SW_MPT	 = 0xf,
73 	MLX4_CMD_READ_MTT	 = 0x10,
74 	MLX4_CMD_WRITE_MTT	 = 0x11,
75 	MLX4_CMD_SYNC_TPT	 = 0x2f,
76 
77 	/* EQ commands */
78 	MLX4_CMD_MAP_EQ		 = 0x12,
79 	MLX4_CMD_SW2HW_EQ	 = 0x13,
80 	MLX4_CMD_HW2SW_EQ	 = 0x14,
81 	MLX4_CMD_QUERY_EQ	 = 0x15,
82 
83 	/* CQ commands */
84 	MLX4_CMD_SW2HW_CQ	 = 0x16,
85 	MLX4_CMD_HW2SW_CQ	 = 0x17,
86 	MLX4_CMD_QUERY_CQ	 = 0x18,
87 	MLX4_CMD_MODIFY_CQ	 = 0x2c,
88 
89 	/* SRQ commands */
90 	MLX4_CMD_SW2HW_SRQ	 = 0x35,
91 	MLX4_CMD_HW2SW_SRQ	 = 0x36,
92 	MLX4_CMD_QUERY_SRQ	 = 0x37,
93 	MLX4_CMD_ARM_SRQ	 = 0x40,
94 
95 	/* QP/EE commands */
96 	MLX4_CMD_RST2INIT_QP	 = 0x19,
97 	MLX4_CMD_INIT2RTR_QP	 = 0x1a,
98 	MLX4_CMD_RTR2RTS_QP	 = 0x1b,
99 	MLX4_CMD_RTS2RTS_QP	 = 0x1c,
100 	MLX4_CMD_SQERR2RTS_QP	 = 0x1d,
101 	MLX4_CMD_2ERR_QP	 = 0x1e,
102 	MLX4_CMD_RTS2SQD_QP	 = 0x1f,
103 	MLX4_CMD_SQD2SQD_QP	 = 0x38,
104 	MLX4_CMD_SQD2RTS_QP	 = 0x20,
105 	MLX4_CMD_2RST_QP	 = 0x21,
106 	MLX4_CMD_QUERY_QP	 = 0x22,
107 	MLX4_CMD_INIT2INIT_QP	 = 0x2d,
108 	MLX4_CMD_SUSPEND_QP	 = 0x32,
109 	MLX4_CMD_UNSUSPEND_QP	 = 0x33,
110 	/* special QP and management commands */
111 	MLX4_CMD_CONF_SPECIAL_QP = 0x23,
112 	MLX4_CMD_MAD_IFC	 = 0x24,
113 
114 	/* multicast commands */
115 	MLX4_CMD_READ_MCG	 = 0x25,
116 	MLX4_CMD_WRITE_MCG	 = 0x26,
117 	MLX4_CMD_MGID_HASH	 = 0x27,
118 
119 	/* miscellaneous commands */
120 	MLX4_CMD_DIAG_RPRT	 = 0x30,
121 	MLX4_CMD_NOP		 = 0x31,
122 
123 	/* debug commands */
124 	MLX4_CMD_QUERY_DEBUG_MSG = 0x2a,
125 	MLX4_CMD_SET_DEBUG_MSG	 = 0x2b,
126 };
127 
128 enum {
129 	MLX4_CMD_TIME_CLASS_A	= 10000,
130 	MLX4_CMD_TIME_CLASS_B	= 10000,
131 	MLX4_CMD_TIME_CLASS_C	= 10000,
132 };
133 
134 enum {
135 	MLX4_MAILBOX_SIZE	=  4096
136 };
137 
138 enum {
139 	/* set port opcode modifiers */
140 	MLX4_SET_PORT_GENERAL   = 0x0,
141 	MLX4_SET_PORT_RQP_CALC  = 0x1,
142 	MLX4_SET_PORT_MAC_TABLE = 0x2,
143 	MLX4_SET_PORT_VLAN_TABLE = 0x3,
144 	MLX4_SET_PORT_PRIO_MAP  = 0x4,
145 	MLX4_SET_PORT_GID_TABLE = 0x5,
146 };
147 
148 struct mlx4_dev;
149 
150 struct mlx4_cmd_mailbox {
151 	void		       *buf;
152 	dma_addr_t		dma;
153 };
154 
155 int __mlx4_cmd(struct mlx4_dev *dev, u64 in_param, u64 *out_param,
156 	       int out_is_imm, u32 in_modifier, u8 op_modifier,
157 	       u16 op, unsigned long timeout);
158 
159 /* Invoke a command with no output parameter */
mlx4_cmd(struct mlx4_dev * dev,u64 in_param,u32 in_modifier,u8 op_modifier,u16 op,unsigned long timeout)160 static inline int mlx4_cmd(struct mlx4_dev *dev, u64 in_param, u32 in_modifier,
161 			   u8 op_modifier, u16 op, unsigned long timeout)
162 {
163 	return __mlx4_cmd(dev, in_param, NULL, 0, in_modifier,
164 			  op_modifier, op, timeout);
165 }
166 
167 /* Invoke a command with an output mailbox */
mlx4_cmd_box(struct mlx4_dev * dev,u64 in_param,u64 out_param,u32 in_modifier,u8 op_modifier,u16 op,unsigned long timeout)168 static inline int mlx4_cmd_box(struct mlx4_dev *dev, u64 in_param, u64 out_param,
169 			       u32 in_modifier, u8 op_modifier, u16 op,
170 			       unsigned long timeout)
171 {
172 	return __mlx4_cmd(dev, in_param, &out_param, 0, in_modifier,
173 			  op_modifier, op, timeout);
174 }
175 
176 /*
177  * Invoke a command with an immediate output parameter (and copy the
178  * output into the caller's out_param pointer after the command
179  * executes).
180  */
mlx4_cmd_imm(struct mlx4_dev * dev,u64 in_param,u64 * out_param,u32 in_modifier,u8 op_modifier,u16 op,unsigned long timeout)181 static inline int mlx4_cmd_imm(struct mlx4_dev *dev, u64 in_param, u64 *out_param,
182 			       u32 in_modifier, u8 op_modifier, u16 op,
183 			       unsigned long timeout)
184 {
185 	return __mlx4_cmd(dev, in_param, out_param, 1, in_modifier,
186 			  op_modifier, op, timeout);
187 }
188 
189 struct mlx4_cmd_mailbox *mlx4_alloc_cmd_mailbox(struct mlx4_dev *dev);
190 void mlx4_free_cmd_mailbox(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox);
191 
192 #endif /* MLX4_CMD_H */
193