1 /*
2 * Copyright (c) 2006 Cisco Systems, Inc. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33 #ifndef MLX4_CMD_H
34 #define MLX4_CMD_H
35
36 #include <linux/dma-mapping.h>
37
38 enum {
39 /* initialization and general commands */
40 MLX4_CMD_SYS_EN = 0x1,
41 MLX4_CMD_SYS_DIS = 0x2,
42 MLX4_CMD_MAP_FA = 0xfff,
43 MLX4_CMD_UNMAP_FA = 0xffe,
44 MLX4_CMD_RUN_FW = 0xff6,
45 MLX4_CMD_MOD_STAT_CFG = 0x34,
46 MLX4_CMD_QUERY_DEV_CAP = 0x3,
47 MLX4_CMD_QUERY_FW = 0x4,
48 MLX4_CMD_ENABLE_LAM = 0xff8,
49 MLX4_CMD_DISABLE_LAM = 0xff7,
50 MLX4_CMD_QUERY_DDR = 0x5,
51 MLX4_CMD_QUERY_ADAPTER = 0x6,
52 MLX4_CMD_INIT_HCA = 0x7,
53 MLX4_CMD_CLOSE_HCA = 0x8,
54 MLX4_CMD_INIT_PORT = 0x9,
55 MLX4_CMD_CLOSE_PORT = 0xa,
56 MLX4_CMD_QUERY_HCA = 0xb,
57 MLX4_CMD_QUERY_PORT = 0x43,
58 MLX4_CMD_SENSE_PORT = 0x4d,
59 MLX4_CMD_HW_HEALTH_CHECK = 0x50,
60 MLX4_CMD_SET_PORT = 0xc,
61 MLX4_CMD_SET_NODE = 0x5a,
62 MLX4_CMD_QUERY_FUNC = 0x56,
63 MLX4_CMD_ACCESS_DDR = 0x2e,
64 MLX4_CMD_MAP_ICM = 0xffa,
65 MLX4_CMD_UNMAP_ICM = 0xff9,
66 MLX4_CMD_MAP_ICM_AUX = 0xffc,
67 MLX4_CMD_UNMAP_ICM_AUX = 0xffb,
68 MLX4_CMD_SET_ICM_SIZE = 0xffd,
69 /*master notify fw on finish for slave's flr*/
70 MLX4_CMD_INFORM_FLR_DONE = 0x5b,
71
72 /* TPT commands */
73 MLX4_CMD_SW2HW_MPT = 0xd,
74 MLX4_CMD_QUERY_MPT = 0xe,
75 MLX4_CMD_HW2SW_MPT = 0xf,
76 MLX4_CMD_READ_MTT = 0x10,
77 MLX4_CMD_WRITE_MTT = 0x11,
78 MLX4_CMD_SYNC_TPT = 0x2f,
79
80 /* EQ commands */
81 MLX4_CMD_MAP_EQ = 0x12,
82 MLX4_CMD_SW2HW_EQ = 0x13,
83 MLX4_CMD_HW2SW_EQ = 0x14,
84 MLX4_CMD_QUERY_EQ = 0x15,
85
86 /* CQ commands */
87 MLX4_CMD_SW2HW_CQ = 0x16,
88 MLX4_CMD_HW2SW_CQ = 0x17,
89 MLX4_CMD_QUERY_CQ = 0x18,
90 MLX4_CMD_MODIFY_CQ = 0x2c,
91
92 /* SRQ commands */
93 MLX4_CMD_SW2HW_SRQ = 0x35,
94 MLX4_CMD_HW2SW_SRQ = 0x36,
95 MLX4_CMD_QUERY_SRQ = 0x37,
96 MLX4_CMD_ARM_SRQ = 0x40,
97
98 /* QP/EE commands */
99 MLX4_CMD_RST2INIT_QP = 0x19,
100 MLX4_CMD_INIT2RTR_QP = 0x1a,
101 MLX4_CMD_RTR2RTS_QP = 0x1b,
102 MLX4_CMD_RTS2RTS_QP = 0x1c,
103 MLX4_CMD_SQERR2RTS_QP = 0x1d,
104 MLX4_CMD_2ERR_QP = 0x1e,
105 MLX4_CMD_RTS2SQD_QP = 0x1f,
106 MLX4_CMD_SQD2SQD_QP = 0x38,
107 MLX4_CMD_SQD2RTS_QP = 0x20,
108 MLX4_CMD_2RST_QP = 0x21,
109 MLX4_CMD_QUERY_QP = 0x22,
110 MLX4_CMD_INIT2INIT_QP = 0x2d,
111 MLX4_CMD_SUSPEND_QP = 0x32,
112 MLX4_CMD_UNSUSPEND_QP = 0x33,
113 /* special QP and management commands */
114 MLX4_CMD_CONF_SPECIAL_QP = 0x23,
115 MLX4_CMD_MAD_IFC = 0x24,
116
117 /* multicast commands */
118 MLX4_CMD_READ_MCG = 0x25,
119 MLX4_CMD_WRITE_MCG = 0x26,
120 MLX4_CMD_MGID_HASH = 0x27,
121
122 /* miscellaneous commands */
123 MLX4_CMD_DIAG_RPRT = 0x30,
124 MLX4_CMD_NOP = 0x31,
125 MLX4_CMD_ACCESS_MEM = 0x2e,
126 MLX4_CMD_SET_VEP = 0x52,
127
128 /* Ethernet specific commands */
129 MLX4_CMD_SET_VLAN_FLTR = 0x47,
130 MLX4_CMD_SET_MCAST_FLTR = 0x48,
131 MLX4_CMD_DUMP_ETH_STATS = 0x49,
132
133 /* Communication channel commands */
134 MLX4_CMD_ARM_COMM_CHANNEL = 0x57,
135 MLX4_CMD_GEN_EQE = 0x58,
136
137 /* virtual commands */
138 MLX4_CMD_ALLOC_RES = 0xf00,
139 MLX4_CMD_FREE_RES = 0xf01,
140 MLX4_CMD_MCAST_ATTACH = 0xf05,
141 MLX4_CMD_UCAST_ATTACH = 0xf06,
142 MLX4_CMD_PROMISC = 0xf08,
143 MLX4_CMD_QUERY_FUNC_CAP = 0xf0a,
144 MLX4_CMD_QP_ATTACH = 0xf0b,
145
146 /* debug commands */
147 MLX4_CMD_QUERY_DEBUG_MSG = 0x2a,
148 MLX4_CMD_SET_DEBUG_MSG = 0x2b,
149
150 /* statistics commands */
151 MLX4_CMD_QUERY_IF_STAT = 0X54,
152 MLX4_CMD_SET_IF_STAT = 0X55,
153 };
154
155 enum {
156 MLX4_CMD_TIME_CLASS_A = 10000,
157 MLX4_CMD_TIME_CLASS_B = 10000,
158 MLX4_CMD_TIME_CLASS_C = 10000,
159 };
160
161 enum {
162 MLX4_MAILBOX_SIZE = 4096,
163 MLX4_ACCESS_MEM_ALIGN = 256,
164 };
165
166 enum {
167 /* set port opcode modifiers */
168 MLX4_SET_PORT_GENERAL = 0x0,
169 MLX4_SET_PORT_RQP_CALC = 0x1,
170 MLX4_SET_PORT_MAC_TABLE = 0x2,
171 MLX4_SET_PORT_VLAN_TABLE = 0x3,
172 MLX4_SET_PORT_PRIO_MAP = 0x4,
173 MLX4_SET_PORT_GID_TABLE = 0x5,
174 };
175
176 enum {
177 MLX4_CMD_WRAPPED,
178 MLX4_CMD_NATIVE
179 };
180
181 struct mlx4_dev;
182
183 struct mlx4_cmd_mailbox {
184 void *buf;
185 dma_addr_t dma;
186 };
187
188 int __mlx4_cmd(struct mlx4_dev *dev, u64 in_param, u64 *out_param,
189 int out_is_imm, u32 in_modifier, u8 op_modifier,
190 u16 op, unsigned long timeout, int native);
191
192 /* Invoke a command with no output parameter */
mlx4_cmd(struct mlx4_dev * dev,u64 in_param,u32 in_modifier,u8 op_modifier,u16 op,unsigned long timeout,int native)193 static inline int mlx4_cmd(struct mlx4_dev *dev, u64 in_param, u32 in_modifier,
194 u8 op_modifier, u16 op, unsigned long timeout,
195 int native)
196 {
197 return __mlx4_cmd(dev, in_param, NULL, 0, in_modifier,
198 op_modifier, op, timeout, native);
199 }
200
201 /* Invoke a command with an output mailbox */
mlx4_cmd_box(struct mlx4_dev * dev,u64 in_param,u64 out_param,u32 in_modifier,u8 op_modifier,u16 op,unsigned long timeout,int native)202 static inline int mlx4_cmd_box(struct mlx4_dev *dev, u64 in_param, u64 out_param,
203 u32 in_modifier, u8 op_modifier, u16 op,
204 unsigned long timeout, int native)
205 {
206 return __mlx4_cmd(dev, in_param, &out_param, 0, in_modifier,
207 op_modifier, op, timeout, native);
208 }
209
210 /*
211 * Invoke a command with an immediate output parameter (and copy the
212 * output into the caller's out_param pointer after the command
213 * executes).
214 */
mlx4_cmd_imm(struct mlx4_dev * dev,u64 in_param,u64 * out_param,u32 in_modifier,u8 op_modifier,u16 op,unsigned long timeout,int native)215 static inline int mlx4_cmd_imm(struct mlx4_dev *dev, u64 in_param, u64 *out_param,
216 u32 in_modifier, u8 op_modifier, u16 op,
217 unsigned long timeout, int native)
218 {
219 return __mlx4_cmd(dev, in_param, out_param, 1, in_modifier,
220 op_modifier, op, timeout, native);
221 }
222
223 struct mlx4_cmd_mailbox *mlx4_alloc_cmd_mailbox(struct mlx4_dev *dev);
224 void mlx4_free_cmd_mailbox(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox);
225
226 u32 mlx4_comm_get_version(void);
227
228 #define MLX4_COMM_GET_IF_REV(cmd_chan_ver) (u8)((cmd_chan_ver) >> 8)
229
230 #endif /* MLX4_CMD_H */
231