1 /* 2 * include/asm-mips/vr41xx/vr41xx.h 3 * 4 * Include file for NEC VR4100 series. 5 * 6 * Copyright (C) 1999 Michael Klar 7 * Copyright (C) 2001, 2002 Paul Mundt 8 * Copyright (C) 2002 MontaVista Software, Inc. 9 * Copyright (C) 2002 TimeSys Corp. 10 * Copyright (C) 2003 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 11 * 12 * This program is free software; you can redistribute it and/or modify it 13 * under the terms of the GNU General Public License as published by the 14 * Free Software Foundation; either version 2 of the License, or (at your 15 * option) any later version. 16 */ 17 #ifndef __NEC_VR41XX_H 18 #define __NEC_VR41XX_H 19 20 #include <linux/interrupt.h> 21 22 /* 23 * CPU Revision 24 */ 25 /* VR4122 0x00000c70-0x00000c72 */ 26 #define PRID_VR4122_REV1_0 0x00000c70 27 #define PRID_VR4122_REV2_0 0x00000c70 28 #define PRID_VR4122_REV2_1 0x00000c70 29 #define PRID_VR4122_REV3_0 0x00000c71 30 #define PRID_VR4122_REV3_1 0x00000c72 31 32 /* VR4181A 0x00000c73-0x00000c7f */ 33 #define PRID_VR4181A_REV1_0 0x00000c73 34 #define PRID_VR4181A_REV1_1 0x00000c74 35 36 /* VR4131 0x00000c80-0x00000c83 */ 37 #define PRID_VR4131_REV1_2 0x00000c80 38 #define PRID_VR4131_REV2_0 0x00000c81 39 #define PRID_VR4131_REV2_1 0x00000c82 40 #define PRID_VR4131_REV2_2 0x00000c83 41 42 /* VR4133 0x00000c84- */ 43 #define PRID_VR4133 0x00000c84 44 45 /* 46 * Bus Control Uint 47 */ 48 extern void vr41xx_bcu_init(void); 49 extern unsigned long vr41xx_get_vtclock_frequency(void); 50 extern unsigned long vr41xx_get_tclock_frequency(void); 51 52 /* 53 * Clock Mask Unit 54 */ 55 extern void vr41xx_cmu_init(void); 56 57 enum { 58 PIU_CLOCK, 59 SIU_CLOCK, 60 AIU_CLOCK, 61 KIU_CLOCK, 62 FIR_CLOCK, 63 DSIU_CLOCK, 64 CSI_CLOCK, 65 PCIU_CLOCK, 66 HSP_CLOCK, 67 PCI_CLOCK, 68 CEU_CLOCK, 69 ETHER0_CLOCK, 70 ETHER1_CLOCK 71 }; 72 73 extern void vr41xx_supply_clock(unsigned int clock); 74 extern void vr41xx_mask_clock(unsigned int clock); 75 76 /* 77 * Interrupt Control Unit 78 */ 79 /* CPU core Interrupt Numbers */ 80 #define MIPS_CPU_IRQ_BASE 0 81 #define MIPS_CPU_IRQ(x) (MIPS_CPU_IRQ_BASE + (x)) 82 #define MIPS_SOFTINT0_IRQ MIPS_CPU_IRQ(0) 83 #define MIPS_SOFTINT1_IRQ MIPS_CPU_IRQ(1) 84 #define INT0_CASCADE_IRQ MIPS_CPU_IRQ(2) 85 #define INT1_CASCADE_IRQ MIPS_CPU_IRQ(3) 86 #define INT2_CASCADE_IRQ MIPS_CPU_IRQ(4) 87 #define INT3_CASCADE_IRQ MIPS_CPU_IRQ(5) 88 #define INT4_CASCADE_IRQ MIPS_CPU_IRQ(6) 89 #define MIPS_COUNTER_IRQ MIPS_CPU_IRQ(7) 90 91 /* SYINT1 Interrupt Numbers */ 92 #define SYSINT1_IRQ_BASE 8 93 #define SYSINT1_IRQ(x) (SYSINT1_IRQ_BASE + (x)) 94 #define BATTRY_IRQ SYSINT1_IRQ(0) 95 #define POWER_IRQ SYSINT1_IRQ(1) 96 #define RTCLONG1_IRQ SYSINT1_IRQ(2) 97 #define ELAPSEDTIME_IRQ SYSINT1_IRQ(3) 98 /* RFU */ 99 #define PIU_IRQ SYSINT1_IRQ(5) 100 #define AIU_IRQ SYSINT1_IRQ(6) 101 #define KIU_IRQ SYSINT1_IRQ(7) 102 #define GIUINT_CASCADE_IRQ SYSINT1_IRQ(8) 103 #define SIU_IRQ SYSINT1_IRQ(9) 104 #define BUSERR_IRQ SYSINT1_IRQ(10) 105 #define SOFTINT_IRQ SYSINT1_IRQ(11) 106 #define CLKRUN_IRQ SYSINT1_IRQ(12) 107 #define DOZEPIU_IRQ SYSINT1_IRQ(13) 108 #define SYSINT1_IRQ_LAST DOZEPIU_IRQ 109 110 /* SYSINT2 Interrupt Numbers */ 111 #define SYSINT2_IRQ_BASE 24 112 #define SYSINT2_IRQ(x) (SYSINT2_IRQ_BASE + (x)) 113 #define RTCLONG2_IRQ SYSINT2_IRQ(0) 114 #define LED_IRQ SYSINT2_IRQ(1) 115 #define HSP_IRQ SYSINT2_IRQ(2) 116 #define TCLOCK_IRQ SYSINT2_IRQ(3) 117 #define FIR_IRQ SYSINT2_IRQ(4) 118 #define CEU_IRQ SYSINT2_IRQ(4) /* same number as FIR_IRQ */ 119 #define DSIU_IRQ SYSINT2_IRQ(5) 120 #define PCI_IRQ SYSINT2_IRQ(6) 121 #define SCU_IRQ SYSINT2_IRQ(7) 122 #define CSI_IRQ SYSINT2_IRQ(8) 123 #define BCU_IRQ SYSINT2_IRQ(9) 124 #define ETHERNET_IRQ SYSINT2_IRQ(10) 125 #define SYSINT2_IRQ_LAST ETHERNET_IRQ 126 127 /* GIU Interrupt Numbers */ 128 #define GIU_IRQ_BASE 40 129 #define GIU_IRQ(x) (GIU_IRQ_BASE + (x)) /* IRQ 40-71 */ 130 #define GIU_IRQ_LAST GIU_IRQ(31) 131 #define GIU_IRQ_TO_PIN(x) ((x) - GIU_IRQ_BASE) /* Pin 0-31 */ 132 133 extern void (*board_irq_init)(void); 134 extern int vr41xx_set_intassign(unsigned int irq, unsigned char intassign); 135 extern int vr41xx_cascade_irq(unsigned int irq, int (*get_irq_number)(int irq)); 136 137 /* 138 * Power Management Unit 139 */ 140 extern void vr41xx_pmu_init(void); 141 142 /* 143 * RTC 144 */ 145 extern void vr41xx_set_rtclong1_cycle(uint32_t cycles); 146 extern uint32_t vr41xx_read_rtclong1_counter(void); 147 148 extern void vr41xx_set_rtclong2_cycle(uint32_t cycles); 149 extern uint32_t vr41xx_read_rtclong2_counter(void); 150 151 extern void vr41xx_set_tclock_cycle(uint32_t cycles); 152 extern uint32_t vr41xx_read_tclock_counter(void); 153 154 /* 155 * General-Purpose I/O Unit 156 */ 157 enum { 158 TRIGGER_LEVEL, 159 TRIGGER_EDGE, 160 TRIGGER_EDGE_FALLING, 161 TRIGGER_EDGE_RISING 162 }; 163 164 enum { 165 SIGNAL_THROUGH, 166 SIGNAL_HOLD 167 }; 168 169 extern void vr41xx_set_irq_trigger(int pin, int trigger, int hold); 170 171 enum { 172 LEVEL_LOW, 173 LEVEL_HIGH 174 }; 175 176 extern void vr41xx_set_irq_level(int pin, int level); 177 178 enum { 179 PIO_INPUT, 180 PIO_OUTPUT 181 }; 182 183 enum { 184 DATA_LOW, 185 DATA_HIGH 186 }; 187 188 /* 189 * Serial Interface Unit 190 */ 191 extern void vr41xx_siu_init(int interface, int module); 192 extern void vr41xx_siu_ifselect(int interface, int module); 193 extern int vr41xx_serial_ports; 194 195 /* SIU interfaces */ 196 enum { 197 SIU_RS232C, 198 SIU_IRDA 199 }; 200 201 /* IrDA interfaces */ 202 enum { 203 IRDA_SHARP = 1, 204 IRDA_TEMIC, 205 IRDA_HP 206 }; 207 208 /* 209 * Debug Serial Interface Unit 210 */ 211 extern void vr41xx_dsiu_init(void); 212 213 /* 214 * PCI Control Unit 215 */ 216 struct vr41xx_pci_address_space { 217 uint32_t internal_base; 218 uint32_t address_mask; 219 uint32_t pci_base; 220 }; 221 222 struct vr41xx_pci_address_map { 223 struct vr41xx_pci_address_space *mem1; 224 struct vr41xx_pci_address_space *mem2; 225 struct vr41xx_pci_address_space *io; 226 }; 227 228 extern void vr41xx_pciu_init(struct vr41xx_pci_address_map *map); 229 230 extern struct pci_ops vr41xx_pci_ops; 231 232 /* 233 * MISC 234 */ 235 extern void vr41xx_time_init(void); 236 extern void vr41xx_timer_setup(struct irqaction *irq); 237 238 #if defined(CONFIG_IDE) || defined(CONFIG_IDE_MODULE) 239 extern struct ide_ops vr41xx_ide_ops; 240 #endif 241 242 #endif /* __NEC_VR41XX_H */ 243