1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * Copyright (c) 2003-2022, Intel Corporation. All rights reserved.
4 * Intel Management Engine Interface (Intel MEI) Linux driver
5 */
6
7 #ifndef _MEI_DEV_H_
8 #define _MEI_DEV_H_
9
10 #include <linux/types.h>
11 #include <linux/cdev.h>
12 #include <linux/poll.h>
13 #include <linux/mei.h>
14 #include <linux/mei_cl_bus.h>
15
16 #include "hw.h"
17 #include "hbm.h"
18
19 #define MEI_SLOT_SIZE sizeof(u32)
20 #define MEI_RD_MSG_BUF_SIZE (128 * MEI_SLOT_SIZE)
21
22 /*
23 * Number of Maximum MEI Clients
24 */
25 #define MEI_CLIENTS_MAX 256
26
27 /*
28 * maximum number of consecutive resets
29 */
30 #define MEI_MAX_CONSEC_RESET 3
31
32 /*
33 * Number of File descriptors/handles
34 * that can be opened to the driver.
35 *
36 * Limit to 255: 256 Total Clients
37 * minus internal client for MEI Bus Messages
38 */
39 #define MEI_MAX_OPEN_HANDLE_COUNT (MEI_CLIENTS_MAX - 1)
40
41 /* File state */
42 enum file_state {
43 MEI_FILE_UNINITIALIZED = 0,
44 MEI_FILE_INITIALIZING,
45 MEI_FILE_CONNECTING,
46 MEI_FILE_CONNECTED,
47 MEI_FILE_DISCONNECTING,
48 MEI_FILE_DISCONNECT_REPLY,
49 MEI_FILE_DISCONNECT_REQUIRED,
50 MEI_FILE_DISCONNECTED,
51 };
52
53 /* MEI device states */
54 enum mei_dev_state {
55 MEI_DEV_INITIALIZING = 0,
56 MEI_DEV_INIT_CLIENTS,
57 MEI_DEV_ENABLED,
58 MEI_DEV_RESETTING,
59 MEI_DEV_DISABLED,
60 MEI_DEV_POWERING_DOWN,
61 MEI_DEV_POWER_DOWN,
62 MEI_DEV_POWER_UP
63 };
64
65 /**
66 * enum mei_dev_pxp_mode - MEI PXP mode state
67 *
68 * @MEI_DEV_PXP_DEFAULT: PCH based device, no initailization required
69 * @MEI_DEV_PXP_INIT: device requires initialization, send setup message to firmware
70 * @MEI_DEV_PXP_SETUP: device is in setup stage, waiting for firmware repsonse
71 * @MEI_DEV_PXP_READY: device initialized
72 */
73 enum mei_dev_pxp_mode {
74 MEI_DEV_PXP_DEFAULT = 0,
75 MEI_DEV_PXP_INIT = 1,
76 MEI_DEV_PXP_SETUP = 2,
77 MEI_DEV_PXP_READY = 3,
78 };
79
80 const char *mei_dev_state_str(int state);
81
82 enum mei_file_transaction_states {
83 MEI_IDLE,
84 MEI_WRITING,
85 MEI_WRITE_COMPLETE,
86 };
87
88 /**
89 * enum mei_cb_file_ops - file operation associated with the callback
90 * @MEI_FOP_READ: read
91 * @MEI_FOP_WRITE: write
92 * @MEI_FOP_CONNECT: connect
93 * @MEI_FOP_DISCONNECT: disconnect
94 * @MEI_FOP_DISCONNECT_RSP: disconnect response
95 * @MEI_FOP_NOTIFY_START: start notification
96 * @MEI_FOP_NOTIFY_STOP: stop notification
97 * @MEI_FOP_DMA_MAP: request client dma map
98 * @MEI_FOP_DMA_UNMAP: request client dma unmap
99 */
100 enum mei_cb_file_ops {
101 MEI_FOP_READ = 0,
102 MEI_FOP_WRITE,
103 MEI_FOP_CONNECT,
104 MEI_FOP_DISCONNECT,
105 MEI_FOP_DISCONNECT_RSP,
106 MEI_FOP_NOTIFY_START,
107 MEI_FOP_NOTIFY_STOP,
108 MEI_FOP_DMA_MAP,
109 MEI_FOP_DMA_UNMAP,
110 };
111
112 /**
113 * enum mei_cl_io_mode - io mode between driver and fw
114 *
115 * @MEI_CL_IO_TX_BLOCKING: send is blocking
116 * @MEI_CL_IO_TX_INTERNAL: internal communication between driver and FW
117 *
118 * @MEI_CL_IO_RX_NONBLOCK: recv is non-blocking
119 */
120 enum mei_cl_io_mode {
121 MEI_CL_IO_TX_BLOCKING = BIT(0),
122 MEI_CL_IO_TX_INTERNAL = BIT(1),
123
124 MEI_CL_IO_RX_NONBLOCK = BIT(2),
125 };
126
127 /*
128 * Intel MEI message data struct
129 */
130 struct mei_msg_data {
131 size_t size;
132 unsigned char *data;
133 };
134
135 struct mei_dma_data {
136 u8 buffer_id;
137 void *vaddr;
138 dma_addr_t daddr;
139 size_t size;
140 };
141
142 /**
143 * struct mei_dma_dscr - dma address descriptor
144 *
145 * @vaddr: dma buffer virtual address
146 * @daddr: dma buffer physical address
147 * @size : dma buffer size
148 */
149 struct mei_dma_dscr {
150 void *vaddr;
151 dma_addr_t daddr;
152 size_t size;
153 };
154
155 /* Maximum number of processed FW status registers */
156 #define MEI_FW_STATUS_MAX 6
157 /* Minimal buffer for FW status string (8 bytes in dw + space or '\0') */
158 #define MEI_FW_STATUS_STR_SZ (MEI_FW_STATUS_MAX * (8 + 1))
159
160
161 /*
162 * struct mei_fw_status - storage of FW status data
163 *
164 * @count: number of actually available elements in array
165 * @status: FW status registers
166 */
167 struct mei_fw_status {
168 int count;
169 u32 status[MEI_FW_STATUS_MAX];
170 };
171
172 /**
173 * struct mei_me_client - representation of me (fw) client
174 *
175 * @list: link in me client list
176 * @refcnt: struct reference count
177 * @props: client properties
178 * @client_id: me client id
179 * @tx_flow_ctrl_creds: flow control credits
180 * @connect_count: number connections to this client
181 * @bus_added: added to bus
182 */
183 struct mei_me_client {
184 struct list_head list;
185 struct kref refcnt;
186 struct mei_client_properties props;
187 u8 client_id;
188 u8 tx_flow_ctrl_creds;
189 u8 connect_count;
190 u8 bus_added;
191 };
192
193
194 struct mei_cl;
195
196 /**
197 * struct mei_cl_cb - file operation callback structure
198 *
199 * @list: link in callback queue
200 * @cl: file client who is running this operation
201 * @fop_type: file operation type
202 * @buf: buffer for data associated with the callback
203 * @buf_idx: last read index
204 * @vtag: virtual tag
205 * @fp: pointer to file structure
206 * @status: io status of the cb
207 * @internal: communication between driver and FW flag
208 * @blocking: transmission blocking mode
209 */
210 struct mei_cl_cb {
211 struct list_head list;
212 struct mei_cl *cl;
213 enum mei_cb_file_ops fop_type;
214 struct mei_msg_data buf;
215 size_t buf_idx;
216 u8 vtag;
217 const struct file *fp;
218 int status;
219 u32 internal:1;
220 u32 blocking:1;
221 };
222
223 /**
224 * struct mei_cl_vtag - file pointer to vtag mapping structure
225 *
226 * @list: link in map queue
227 * @fp: file pointer
228 * @vtag: corresponding vtag
229 * @pending_read: the read is pending on this file
230 */
231 struct mei_cl_vtag {
232 struct list_head list;
233 const struct file *fp;
234 u8 vtag;
235 u8 pending_read:1;
236 };
237
238 /**
239 * struct mei_cl - me client host representation
240 * carried in file->private_data
241 *
242 * @link: link in the clients list
243 * @dev: mei parent device
244 * @state: file operation state
245 * @tx_wait: wait queue for tx completion
246 * @rx_wait: wait queue for rx completion
247 * @wait: wait queue for management operation
248 * @ev_wait: notification wait queue
249 * @ev_async: event async notification
250 * @status: connection status
251 * @me_cl: fw client connected
252 * @fp: file associated with client
253 * @host_client_id: host id
254 * @vtag_map: vtag map
255 * @tx_flow_ctrl_creds: transmit flow credentials
256 * @rx_flow_ctrl_creds: receive flow credentials
257 * @timer_count: watchdog timer for operation completion
258 * @notify_en: notification - enabled/disabled
259 * @notify_ev: pending notification event
260 * @tx_cb_queued: number of tx callbacks in queue
261 * @writing_state: state of the tx
262 * @rd_pending: pending read credits
263 * @rd_completed_lock: protects rd_completed queue
264 * @rd_completed: completed read
265 * @dma: dma settings
266 * @dma_mapped: dma buffer is currently mapped.
267 *
268 * @cldev: device on the mei client bus
269 */
270 struct mei_cl {
271 struct list_head link;
272 struct mei_device *dev;
273 enum file_state state;
274 wait_queue_head_t tx_wait;
275 wait_queue_head_t rx_wait;
276 wait_queue_head_t wait;
277 wait_queue_head_t ev_wait;
278 struct fasync_struct *ev_async;
279 int status;
280 struct mei_me_client *me_cl;
281 const struct file *fp;
282 u8 host_client_id;
283 struct list_head vtag_map;
284 u8 tx_flow_ctrl_creds;
285 u8 rx_flow_ctrl_creds;
286 u8 timer_count;
287 u8 notify_en;
288 u8 notify_ev;
289 u8 tx_cb_queued;
290 enum mei_file_transaction_states writing_state;
291 struct list_head rd_pending;
292 spinlock_t rd_completed_lock; /* protects rd_completed queue */
293 struct list_head rd_completed;
294 struct mei_dma_data dma;
295 u8 dma_mapped;
296
297 struct mei_cl_device *cldev;
298 };
299
300 #define MEI_TX_QUEUE_LIMIT_DEFAULT 50
301 #define MEI_TX_QUEUE_LIMIT_MAX 255
302 #define MEI_TX_QUEUE_LIMIT_MIN 30
303
304 /**
305 * struct mei_hw_ops - hw specific ops
306 *
307 * @host_is_ready : query for host readiness
308 *
309 * @hw_is_ready : query if hw is ready
310 * @hw_reset : reset hw
311 * @hw_start : start hw after reset
312 * @hw_config : configure hw
313 *
314 * @fw_status : get fw status registers
315 * @trc_status : get trc status register
316 * @pg_state : power gating state of the device
317 * @pg_in_transition : is device now in pg transition
318 * @pg_is_enabled : is power gating enabled
319 *
320 * @intr_clear : clear pending interrupts
321 * @intr_enable : enable interrupts
322 * @intr_disable : disable interrupts
323 * @synchronize_irq : synchronize irqs
324 *
325 * @hbuf_free_slots : query for write buffer empty slots
326 * @hbuf_is_ready : query if write buffer is empty
327 * @hbuf_depth : query for write buffer depth
328 *
329 * @write : write a message to FW
330 *
331 * @rdbuf_full_slots : query how many slots are filled
332 *
333 * @read_hdr : get first 4 bytes (header)
334 * @read : read a buffer from the FW
335 */
336 struct mei_hw_ops {
337
338 bool (*host_is_ready)(struct mei_device *dev);
339
340 bool (*hw_is_ready)(struct mei_device *dev);
341 int (*hw_reset)(struct mei_device *dev, bool enable);
342 int (*hw_start)(struct mei_device *dev);
343 int (*hw_config)(struct mei_device *dev);
344
345 int (*fw_status)(struct mei_device *dev, struct mei_fw_status *fw_sts);
346 int (*trc_status)(struct mei_device *dev, u32 *trc);
347
348 enum mei_pg_state (*pg_state)(struct mei_device *dev);
349 bool (*pg_in_transition)(struct mei_device *dev);
350 bool (*pg_is_enabled)(struct mei_device *dev);
351
352 void (*intr_clear)(struct mei_device *dev);
353 void (*intr_enable)(struct mei_device *dev);
354 void (*intr_disable)(struct mei_device *dev);
355 void (*synchronize_irq)(struct mei_device *dev);
356
357 int (*hbuf_free_slots)(struct mei_device *dev);
358 bool (*hbuf_is_ready)(struct mei_device *dev);
359 u32 (*hbuf_depth)(const struct mei_device *dev);
360 int (*write)(struct mei_device *dev,
361 const void *hdr, size_t hdr_len,
362 const void *data, size_t data_len);
363
364 int (*rdbuf_full_slots)(struct mei_device *dev);
365
366 u32 (*read_hdr)(const struct mei_device *dev);
367 int (*read)(struct mei_device *dev,
368 unsigned char *buf, unsigned long len);
369 };
370
371 /* MEI bus API*/
372 void mei_cl_bus_rescan_work(struct work_struct *work);
373 void mei_cl_bus_dev_fixup(struct mei_cl_device *dev);
374 ssize_t __mei_cl_send(struct mei_cl *cl, const u8 *buf, size_t length, u8 vtag,
375 unsigned int mode);
376 ssize_t __mei_cl_recv(struct mei_cl *cl, u8 *buf, size_t length, u8 *vtag,
377 unsigned int mode, unsigned long timeout);
378 bool mei_cl_bus_rx_event(struct mei_cl *cl);
379 bool mei_cl_bus_notify_event(struct mei_cl *cl);
380 void mei_cl_bus_remove_devices(struct mei_device *bus);
381 int mei_cl_bus_init(void);
382 void mei_cl_bus_exit(void);
383
384 /**
385 * enum mei_pg_event - power gating transition events
386 *
387 * @MEI_PG_EVENT_IDLE: the driver is not in power gating transition
388 * @MEI_PG_EVENT_WAIT: the driver is waiting for a pg event to complete
389 * @MEI_PG_EVENT_RECEIVED: the driver received pg event
390 * @MEI_PG_EVENT_INTR_WAIT: the driver is waiting for a pg event interrupt
391 * @MEI_PG_EVENT_INTR_RECEIVED: the driver received pg event interrupt
392 */
393 enum mei_pg_event {
394 MEI_PG_EVENT_IDLE,
395 MEI_PG_EVENT_WAIT,
396 MEI_PG_EVENT_RECEIVED,
397 MEI_PG_EVENT_INTR_WAIT,
398 MEI_PG_EVENT_INTR_RECEIVED,
399 };
400
401 /**
402 * enum mei_pg_state - device internal power gating state
403 *
404 * @MEI_PG_OFF: device is not power gated - it is active
405 * @MEI_PG_ON: device is power gated - it is in lower power state
406 */
407 enum mei_pg_state {
408 MEI_PG_OFF = 0,
409 MEI_PG_ON = 1,
410 };
411
412 const char *mei_pg_state_str(enum mei_pg_state state);
413
414 /**
415 * struct mei_fw_version - MEI FW version struct
416 *
417 * @platform: platform identifier
418 * @major: major version field
419 * @minor: minor version field
420 * @buildno: build number version field
421 * @hotfix: hotfix number version field
422 */
423 struct mei_fw_version {
424 u8 platform;
425 u8 major;
426 u16 minor;
427 u16 buildno;
428 u16 hotfix;
429 };
430
431 #define MEI_MAX_FW_VER_BLOCKS 3
432
433 struct mei_dev_timeouts {
434 unsigned long hw_ready; /* Timeout on ready message, in jiffies */
435 int connect; /* HPS: at least 2 seconds, in seconds */
436 unsigned long cl_connect; /* HPS: Client Connect Timeout, in jiffies */
437 int client_init; /* HPS: Clients Enumeration Timeout, in seconds */
438 unsigned long pgi; /* PG Isolation time response, in jiffies */
439 unsigned int d0i3; /* D0i3 set/unset max response time, in jiffies */
440 unsigned long hbm; /* HBM operation timeout, in jiffies */
441 unsigned long mkhi_recv; /* receive timeout, in jiffies */
442 };
443
444 /**
445 * struct mei_device - MEI private device struct
446 *
447 * @dev : device on a bus
448 * @cdev : character device
449 * @minor : minor number allocated for device
450 *
451 * @write_list : write pending list
452 * @write_waiting_list : write completion list
453 * @ctrl_wr_list : pending control write list
454 * @ctrl_rd_list : pending control read list
455 * @tx_queue_limit: tx queues per client linit
456 *
457 * @file_list : list of opened handles
458 * @open_handle_count: number of opened handles
459 *
460 * @device_lock : big device lock
461 * @timer_work : MEI timer delayed work (timeouts)
462 *
463 * @recvd_hw_ready : hw ready message received flag
464 *
465 * @wait_hw_ready : wait queue for receive HW ready message form FW
466 * @wait_pg : wait queue for receive PG message from FW
467 * @wait_hbm_start : wait queue for receive HBM start message from FW
468 *
469 * @reset_count : number of consecutive resets
470 * @dev_state : device state
471 * @hbm_state : state of host bus message protocol
472 * @pxp_mode : PXP device mode
473 * @init_clients_timer : HBM init handshake timeout
474 *
475 * @pg_event : power gating event
476 * @pg_domain : runtime PM domain
477 *
478 * @rd_msg_buf : control messages buffer
479 * @rd_msg_hdr : read message header storage
480 * @rd_msg_hdr_count : how many dwords were already read from header
481 *
482 * @hbuf_is_ready : query if the host host/write buffer is ready
483 * @dr_dscr: DMA ring descriptors: TX, RX, and CTRL
484 *
485 * @version : HBM protocol version in use
486 * @hbm_f_pg_supported : hbm feature pgi protocol
487 * @hbm_f_dc_supported : hbm feature dynamic clients
488 * @hbm_f_dot_supported : hbm feature disconnect on timeout
489 * @hbm_f_ev_supported : hbm feature event notification
490 * @hbm_f_fa_supported : hbm feature fixed address client
491 * @hbm_f_ie_supported : hbm feature immediate reply to enum request
492 * @hbm_f_os_supported : hbm feature support OS ver message
493 * @hbm_f_dr_supported : hbm feature dma ring supported
494 * @hbm_f_vt_supported : hbm feature vtag supported
495 * @hbm_f_cap_supported : hbm feature capabilities message supported
496 * @hbm_f_cd_supported : hbm feature client dma supported
497 *
498 * @fw_ver : FW versions
499 *
500 * @fw_f_fw_ver_supported : fw feature: fw version supported
501 *
502 * @me_clients_rwsem: rw lock over me_clients list
503 * @me_clients : list of FW clients
504 * @me_clients_map : FW clients bit map
505 * @host_clients_map : host clients id pool
506 *
507 * @allow_fixed_address: allow user space to connect a fixed client
508 * @override_fixed_address: force allow fixed address behavior
509 *
510 * @timeouts: actual timeout values
511 *
512 * @reset_work : work item for the device reset
513 * @bus_rescan_work : work item for the bus rescan
514 *
515 * @device_list : mei client bus list
516 * @cl_bus_lock : client bus list lock
517 *
518 * @kind : kind of mei device
519 *
520 * @dbgfs_dir : debugfs mei root directory
521 *
522 * @ops: : hw specific operations
523 * @hw : hw specific data
524 */
525 struct mei_device {
526 struct device *dev;
527 struct cdev cdev;
528 int minor;
529
530 struct list_head write_list;
531 struct list_head write_waiting_list;
532 struct list_head ctrl_wr_list;
533 struct list_head ctrl_rd_list;
534 u8 tx_queue_limit;
535
536 struct list_head file_list;
537 long open_handle_count;
538
539 struct mutex device_lock;
540 struct delayed_work timer_work;
541
542 bool recvd_hw_ready;
543 /*
544 * waiting queue for receive message from FW
545 */
546 wait_queue_head_t wait_hw_ready;
547 wait_queue_head_t wait_pg;
548 wait_queue_head_t wait_hbm_start;
549
550 /*
551 * mei device states
552 */
553 unsigned long reset_count;
554 enum mei_dev_state dev_state;
555 enum mei_hbm_state hbm_state;
556 enum mei_dev_pxp_mode pxp_mode;
557 u16 init_clients_timer;
558
559 /*
560 * Power Gating support
561 */
562 enum mei_pg_event pg_event;
563 #ifdef CONFIG_PM
564 struct dev_pm_domain pg_domain;
565 #endif /* CONFIG_PM */
566
567 unsigned char rd_msg_buf[MEI_RD_MSG_BUF_SIZE];
568 u32 rd_msg_hdr[MEI_RD_MSG_BUF_SIZE];
569 int rd_msg_hdr_count;
570
571 /* write buffer */
572 bool hbuf_is_ready;
573
574 struct mei_dma_dscr dr_dscr[DMA_DSCR_NUM];
575
576 struct hbm_version version;
577 unsigned int hbm_f_pg_supported:1;
578 unsigned int hbm_f_dc_supported:1;
579 unsigned int hbm_f_dot_supported:1;
580 unsigned int hbm_f_ev_supported:1;
581 unsigned int hbm_f_fa_supported:1;
582 unsigned int hbm_f_ie_supported:1;
583 unsigned int hbm_f_os_supported:1;
584 unsigned int hbm_f_dr_supported:1;
585 unsigned int hbm_f_vt_supported:1;
586 unsigned int hbm_f_cap_supported:1;
587 unsigned int hbm_f_cd_supported:1;
588
589 struct mei_fw_version fw_ver[MEI_MAX_FW_VER_BLOCKS];
590
591 unsigned int fw_f_fw_ver_supported:1;
592
593 struct rw_semaphore me_clients_rwsem;
594 struct list_head me_clients;
595 DECLARE_BITMAP(me_clients_map, MEI_CLIENTS_MAX);
596 DECLARE_BITMAP(host_clients_map, MEI_CLIENTS_MAX);
597
598 bool allow_fixed_address;
599 bool override_fixed_address;
600
601 struct mei_dev_timeouts timeouts;
602
603 struct work_struct reset_work;
604 struct work_struct bus_rescan_work;
605
606 /* List of bus devices */
607 struct list_head device_list;
608 struct mutex cl_bus_lock;
609
610 const char *kind;
611
612 #if IS_ENABLED(CONFIG_DEBUG_FS)
613 struct dentry *dbgfs_dir;
614 #endif /* CONFIG_DEBUG_FS */
615
616 const struct mei_hw_ops *ops;
617 char hw[] __aligned(sizeof(void *));
618 };
619
mei_secs_to_jiffies(unsigned long sec)620 static inline unsigned long mei_secs_to_jiffies(unsigned long sec)
621 {
622 return msecs_to_jiffies(sec * MSEC_PER_SEC);
623 }
624
625 /**
626 * mei_data2slots - get slots number from a message length
627 *
628 * @length: size of the messages in bytes
629 *
630 * Return: number of slots
631 */
mei_data2slots(size_t length)632 static inline u32 mei_data2slots(size_t length)
633 {
634 return DIV_ROUND_UP(length, MEI_SLOT_SIZE);
635 }
636
637 /**
638 * mei_hbm2slots - get slots number from a hbm message length
639 * length + size of the mei message header
640 *
641 * @length: size of the messages in bytes
642 *
643 * Return: number of slots
644 */
mei_hbm2slots(size_t length)645 static inline u32 mei_hbm2slots(size_t length)
646 {
647 return DIV_ROUND_UP(sizeof(struct mei_msg_hdr) + length, MEI_SLOT_SIZE);
648 }
649
650 /**
651 * mei_slots2data - get data in slots - bytes from slots
652 *
653 * @slots: number of available slots
654 *
655 * Return: number of bytes in slots
656 */
mei_slots2data(int slots)657 static inline u32 mei_slots2data(int slots)
658 {
659 return slots * MEI_SLOT_SIZE;
660 }
661
662 /*
663 * mei init function prototypes
664 */
665 void mei_device_init(struct mei_device *dev,
666 struct device *device,
667 bool slow_fw,
668 const struct mei_hw_ops *hw_ops);
669 int mei_reset(struct mei_device *dev);
670 int mei_start(struct mei_device *dev);
671 int mei_restart(struct mei_device *dev);
672 void mei_stop(struct mei_device *dev);
673 void mei_cancel_work(struct mei_device *dev);
674
675 void mei_set_devstate(struct mei_device *dev, enum mei_dev_state state);
676
677 int mei_dmam_ring_alloc(struct mei_device *dev);
678 void mei_dmam_ring_free(struct mei_device *dev);
679 bool mei_dma_ring_is_allocated(struct mei_device *dev);
680 void mei_dma_ring_reset(struct mei_device *dev);
681 void mei_dma_ring_read(struct mei_device *dev, unsigned char *buf, u32 len);
682 void mei_dma_ring_write(struct mei_device *dev, unsigned char *buf, u32 len);
683 u32 mei_dma_ring_empty_slots(struct mei_device *dev);
684
685 /*
686 * MEI interrupt functions prototype
687 */
688
689 void mei_timer(struct work_struct *work);
690 void mei_schedule_stall_timer(struct mei_device *dev);
691 int mei_irq_read_handler(struct mei_device *dev,
692 struct list_head *cmpl_list, s32 *slots);
693
694 int mei_irq_write_handler(struct mei_device *dev, struct list_head *cmpl_list);
695 void mei_irq_compl_handler(struct mei_device *dev, struct list_head *cmpl_list);
696
697 /*
698 * Register Access Function
699 */
700
701
mei_hw_config(struct mei_device * dev)702 static inline int mei_hw_config(struct mei_device *dev)
703 {
704 return dev->ops->hw_config(dev);
705 }
706
mei_pg_state(struct mei_device * dev)707 static inline enum mei_pg_state mei_pg_state(struct mei_device *dev)
708 {
709 return dev->ops->pg_state(dev);
710 }
711
mei_pg_in_transition(struct mei_device * dev)712 static inline bool mei_pg_in_transition(struct mei_device *dev)
713 {
714 return dev->ops->pg_in_transition(dev);
715 }
716
mei_pg_is_enabled(struct mei_device * dev)717 static inline bool mei_pg_is_enabled(struct mei_device *dev)
718 {
719 return dev->ops->pg_is_enabled(dev);
720 }
721
mei_hw_reset(struct mei_device * dev,bool enable)722 static inline int mei_hw_reset(struct mei_device *dev, bool enable)
723 {
724 return dev->ops->hw_reset(dev, enable);
725 }
726
mei_hw_start(struct mei_device * dev)727 static inline int mei_hw_start(struct mei_device *dev)
728 {
729 return dev->ops->hw_start(dev);
730 }
731
mei_clear_interrupts(struct mei_device * dev)732 static inline void mei_clear_interrupts(struct mei_device *dev)
733 {
734 dev->ops->intr_clear(dev);
735 }
736
mei_enable_interrupts(struct mei_device * dev)737 static inline void mei_enable_interrupts(struct mei_device *dev)
738 {
739 dev->ops->intr_enable(dev);
740 }
741
mei_disable_interrupts(struct mei_device * dev)742 static inline void mei_disable_interrupts(struct mei_device *dev)
743 {
744 dev->ops->intr_disable(dev);
745 }
746
mei_synchronize_irq(struct mei_device * dev)747 static inline void mei_synchronize_irq(struct mei_device *dev)
748 {
749 dev->ops->synchronize_irq(dev);
750 }
751
mei_host_is_ready(struct mei_device * dev)752 static inline bool mei_host_is_ready(struct mei_device *dev)
753 {
754 return dev->ops->host_is_ready(dev);
755 }
mei_hw_is_ready(struct mei_device * dev)756 static inline bool mei_hw_is_ready(struct mei_device *dev)
757 {
758 return dev->ops->hw_is_ready(dev);
759 }
760
mei_hbuf_is_ready(struct mei_device * dev)761 static inline bool mei_hbuf_is_ready(struct mei_device *dev)
762 {
763 return dev->ops->hbuf_is_ready(dev);
764 }
765
mei_hbuf_empty_slots(struct mei_device * dev)766 static inline int mei_hbuf_empty_slots(struct mei_device *dev)
767 {
768 return dev->ops->hbuf_free_slots(dev);
769 }
770
mei_hbuf_depth(const struct mei_device * dev)771 static inline u32 mei_hbuf_depth(const struct mei_device *dev)
772 {
773 return dev->ops->hbuf_depth(dev);
774 }
775
mei_write_message(struct mei_device * dev,const void * hdr,size_t hdr_len,const void * data,size_t data_len)776 static inline int mei_write_message(struct mei_device *dev,
777 const void *hdr, size_t hdr_len,
778 const void *data, size_t data_len)
779 {
780 return dev->ops->write(dev, hdr, hdr_len, data, data_len);
781 }
782
mei_read_hdr(const struct mei_device * dev)783 static inline u32 mei_read_hdr(const struct mei_device *dev)
784 {
785 return dev->ops->read_hdr(dev);
786 }
787
mei_read_slots(struct mei_device * dev,unsigned char * buf,unsigned long len)788 static inline void mei_read_slots(struct mei_device *dev,
789 unsigned char *buf, unsigned long len)
790 {
791 dev->ops->read(dev, buf, len);
792 }
793
mei_count_full_read_slots(struct mei_device * dev)794 static inline int mei_count_full_read_slots(struct mei_device *dev)
795 {
796 return dev->ops->rdbuf_full_slots(dev);
797 }
798
mei_trc_status(struct mei_device * dev,u32 * trc)799 static inline int mei_trc_status(struct mei_device *dev, u32 *trc)
800 {
801 if (dev->ops->trc_status)
802 return dev->ops->trc_status(dev, trc);
803 return -EOPNOTSUPP;
804 }
805
mei_fw_status(struct mei_device * dev,struct mei_fw_status * fw_status)806 static inline int mei_fw_status(struct mei_device *dev,
807 struct mei_fw_status *fw_status)
808 {
809 return dev->ops->fw_status(dev, fw_status);
810 }
811
812 bool mei_hbuf_acquire(struct mei_device *dev);
813
814 bool mei_write_is_idle(struct mei_device *dev);
815
816 #if IS_ENABLED(CONFIG_DEBUG_FS)
817 void mei_dbgfs_register(struct mei_device *dev, const char *name);
818 void mei_dbgfs_deregister(struct mei_device *dev);
819 #else
mei_dbgfs_register(struct mei_device * dev,const char * name)820 static inline void mei_dbgfs_register(struct mei_device *dev, const char *name) {}
mei_dbgfs_deregister(struct mei_device * dev)821 static inline void mei_dbgfs_deregister(struct mei_device *dev) {}
822 #endif /* CONFIG_DEBUG_FS */
823
824 int mei_register(struct mei_device *dev, struct device *parent);
825 void mei_deregister(struct mei_device *dev);
826
827 #define MEI_HDR_FMT "hdr:host=%02d me=%02d len=%d dma=%1d ext=%1d internal=%1d comp=%1d"
828 #define MEI_HDR_PRM(hdr) \
829 (hdr)->host_addr, (hdr)->me_addr, \
830 (hdr)->length, (hdr)->dma_ring, (hdr)->extended, \
831 (hdr)->internal, (hdr)->msg_complete
832
833 ssize_t mei_fw_status2str(struct mei_fw_status *fw_sts, char *buf, size_t len);
834 /**
835 * mei_fw_status_str - fetch and convert fw status registers to printable string
836 *
837 * @dev: the device structure
838 * @buf: string buffer at minimal size MEI_FW_STATUS_STR_SZ
839 * @len: buffer len must be >= MEI_FW_STATUS_STR_SZ
840 *
841 * Return: number of bytes written or < 0 on failure
842 */
mei_fw_status_str(struct mei_device * dev,char * buf,size_t len)843 static inline ssize_t mei_fw_status_str(struct mei_device *dev,
844 char *buf, size_t len)
845 {
846 struct mei_fw_status fw_status;
847 int ret;
848
849 buf[0] = '\0';
850
851 ret = mei_fw_status(dev, &fw_status);
852 if (ret)
853 return ret;
854
855 ret = mei_fw_status2str(&fw_status, buf, MEI_FW_STATUS_STR_SZ);
856
857 return ret;
858 }
859
860
861 #endif
862