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Searched defs:MDMA_S1_IRQ_STATUS (Results 1 – 7 of 7) sorted by relevance

/linux-2.6.39/arch/blackfin/mach-bf533/include/mach/
DdefBF532.h323 #define MDMA_S1_IRQ_STATUS 0xFFC00EE8 /* MemDMA Stream 1 Source Interrupt/Status Register */ macro
/linux-2.6.39/arch/blackfin/mach-bf518/include/mach/
DdefBF512.h440 #define MDMA_S1_IRQ_STATUS 0xFFC00FE8 /* MemDMA Stream 1 Source Interrupt/Status Register */ macro
/linux-2.6.39/arch/blackfin/mach-bf527/include/mach/
DdefBF522.h440 #define MDMA_S1_IRQ_STATUS 0xFFC00FE8 /* MemDMA Stream 1 Source Interrupt/Status Register */ macro
/linux-2.6.39/arch/blackfin/mach-bf561/include/mach/
DdefBF561.h761 #define MDMA_S1_IRQ_STATUS 0xFFC00FE8 /*MemDMA2 Stream 1 Source Interrupt/Status Register */ macro
/linux-2.6.39/arch/blackfin/mach-bf537/include/mach/
DdefBF534.h416 #define MDMA_S1_IRQ_STATUS 0xFFC00FE8 /* MemDMA Stream 1 Source Interrupt/Status Register … macro
/linux-2.6.39/arch/blackfin/mach-bf538/include/mach/
DdefBF538.h361 #define MDMA_S1_IRQ_STATUS 0xFFC00EE8 /* MemDMA0 Stream 1 Source Interrupt/Status Register */ macro
/linux-2.6.39/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h450 #define MDMA_S1_IRQ_STATUS 0xffc00fe8 /* Memory DMA Stream 1 Source Interrupt/Stat… macro