1 /* 2 * Definitions for MCT (Magic Control Technology) USB-RS232 Converter Driver 3 * 4 * Copyright (C) 2000 Wolfgang Grandegger (wolfgang@ces.ch) 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This driver is for the device MCT USB-RS232 Converter (25 pin, Model No. 12 * U232-P25) from Magic Control Technology Corp. (there is also a 9 pin 13 * Model No. U232-P9). See http://www.mct.com.tw/p_u232.html for further 14 * information. The properties of this device are listed at the end of this 15 * file. This device is available from various distributors. I know Hana, 16 * http://www.hana.de and D-Link, http://www.dlink.com/products/usb/dsbs25. 17 * 18 * All of the information about the device was acquired by using SniffUSB 19 * on Windows98. The technical details of the reverse engineering are 20 * summarized at the end of this file. 21 */ 22 23 #ifndef __LINUX_USB_SERIAL_MCT_U232_H 24 #define __LINUX_USB_SERIAL_MCT_U232_H 25 26 #define MCT_U232_VID 0x0711 /* Vendor Id */ 27 #define MCT_U232_PID 0x0210 /* Original MCT Product Id */ 28 29 /* U232-P25, Sitecom */ 30 #define MCT_U232_SITECOM_PID 0x0230 /* Sitecom Product Id */ 31 32 /* DU-H3SP USB BAY hub */ 33 #define MCT_U232_DU_H3SP_PID 0x0200 /* D-Link DU-H3SP USB BAY */ 34 35 /* Belkin badge the MCT U232-P9 as the F5U109 */ 36 #define MCT_U232_BELKIN_F5U109_VID 0x050d /* Vendor Id */ 37 #define MCT_U232_BELKIN_F5U109_PID 0x0109 /* Product Id */ 38 39 /* 40 * Vendor Request Interface 41 */ 42 #define MCT_U232_SET_REQUEST_TYPE 0x40 43 #define MCT_U232_GET_REQUEST_TYPE 0xc0 44 45 #define MCT_U232_GET_MODEM_STAT_REQUEST 2 /* Get Modem Status Register (MSR) */ 46 #define MCT_U232_GET_MODEM_STAT_SIZE 1 47 48 #define MCT_U232_GET_LINE_CTRL_REQUEST 6 /* Get Line Control Register (LCR) */ 49 #define MCT_U232_GET_LINE_CTRL_SIZE 1 /* ... not used by this driver */ 50 51 #define MCT_U232_SET_BAUD_RATE_REQUEST 5 /* Set Baud Rate Divisor */ 52 #define MCT_U232_SET_BAUD_RATE_SIZE 4 53 54 #define MCT_U232_SET_LINE_CTRL_REQUEST 7 /* Set Line Control Register (LCR) */ 55 #define MCT_U232_SET_LINE_CTRL_SIZE 1 56 57 #define MCT_U232_SET_MODEM_CTRL_REQUEST 10 /* Set Modem Control Register (MCR) */ 58 #define MCT_U232_SET_MODEM_CTRL_SIZE 1 59 60 /* This USB device request code is not well understood. It is transmitted by 61 the MCT-supplied Windows driver whenever the baud rate changes. 62 */ 63 #define MCT_U232_SET_UNKNOWN1_REQUEST 11 /* Unknown functionality */ 64 #define MCT_U232_SET_UNKNOWN1_SIZE 1 65 66 /* This USB device request code is not well understood. It is transmitted by 67 the MCT-supplied Windows driver whenever the baud rate changes. 68 69 Without this USB device request, the USB/RS-232 adapter will not write to 70 RS-232 devices which do not assert the 'CTS' signal. 71 */ 72 #define MCT_U232_SET_UNKNOWN2_REQUEST 12 /* Unknown functionality */ 73 #define MCT_U232_SET_UNKNOWN2_SIZE 1 74 75 /* 76 * Baud rate (divisor) 77 */ 78 #define MCT_U232_BAUD_RATE(b) (115200/b) 79 80 /* 81 * Line Control Register (LCR) 82 */ 83 #define MCT_U232_SET_BREAK 0x40 84 85 #define MCT_U232_PARITY_SPACE 0x38 86 #define MCT_U232_PARITY_MARK 0x28 87 #define MCT_U232_PARITY_EVEN 0x18 88 #define MCT_U232_PARITY_ODD 0x08 89 #define MCT_U232_PARITY_NONE 0x00 90 91 #define MCT_U232_DATA_BITS_5 0x00 92 #define MCT_U232_DATA_BITS_6 0x01 93 #define MCT_U232_DATA_BITS_7 0x02 94 #define MCT_U232_DATA_BITS_8 0x03 95 96 #define MCT_U232_STOP_BITS_2 0x04 97 #define MCT_U232_STOP_BITS_1 0x00 98 99 /* 100 * Modem Control Register (MCR) 101 */ 102 #define MCT_U232_MCR_NONE 0x8 /* Deactivate DTR and RTS */ 103 #define MCT_U232_MCR_RTS 0xa /* Activate RTS */ 104 #define MCT_U232_MCR_DTR 0x9 /* Activate DTR */ 105 106 /* 107 * Modem Status Register (MSR) 108 */ 109 #define MCT_U232_MSR_INDEX 0x0 /* data[index] */ 110 #define MCT_U232_MSR_CD 0x80 /* Current CD */ 111 #define MCT_U232_MSR_RI 0x40 /* Current RI */ 112 #define MCT_U232_MSR_DSR 0x20 /* Current DSR */ 113 #define MCT_U232_MSR_CTS 0x10 /* Current CTS */ 114 #define MCT_U232_MSR_DCD 0x08 /* Delta CD */ 115 #define MCT_U232_MSR_DRI 0x04 /* Delta RI */ 116 #define MCT_U232_MSR_DDSR 0x02 /* Delta DSR */ 117 #define MCT_U232_MSR_DCTS 0x01 /* Delta CTS */ 118 119 /* 120 * Line Status Register (LSR) 121 */ 122 #define MCT_U232_LSR_INDEX 1 /* data[index] */ 123 #define MCT_U232_LSR_ERR 0x80 /* OE | PE | FE | BI */ 124 #define MCT_U232_LSR_TEMT 0x40 /* transmit register empty */ 125 #define MCT_U232_LSR_THRE 0x20 /* transmit holding register empty */ 126 #define MCT_U232_LSR_BI 0x10 /* break indicator */ 127 #define MCT_U232_LSR_FE 0x08 /* framing error */ 128 #define MCT_U232_LSR_OE 0x02 /* overrun error */ 129 #define MCT_U232_LSR_PE 0x04 /* parity error */ 130 #define MCT_U232_LSR_OE 0x02 /* overrun error */ 131 #define MCT_U232_LSR_DR 0x01 /* receive data ready */ 132 133 134 /* ----------------------------------------------------------------------------- 135 * Technical Specification reverse engineered with SniffUSB on Windows98 136 * ===================================================================== 137 * 138 * The technical details of the device have been acquired be using "SniffUSB" 139 * and the vendor-supplied device driver (version 2.3A) under Windows98. To 140 * identify the USB vendor-specific requests and to assign them to terminal 141 * settings (flow control, baud rate, etc.) the program "SerialSettings" from 142 * William G. Greathouse has been proven to be very useful. I also used the 143 * Win98 "HyperTerminal" and "usb-robot" on Linux for testing. The results and 144 * observations are summarized below: 145 * 146 * The USB requests seem to be directly mapped to the registers of a 8250, 147 * 16450 or 16550 UART. The FreeBSD handbook (appendix F.4 "Input/Output 148 * devices") contains a comprehensive description of UARTs and its registers. 149 * The bit descriptions are actually taken from there. 150 * 151 * 152 * Baud rate (divisor) 153 * ------------------- 154 * 155 * BmRequestType: 0x40 (0100 0000B) 156 * bRequest: 0x05 157 * wValue: 0x0000 158 * wIndex: 0x0000 159 * wLength: 0x0004 160 * Data: divisor = 115200 / baud_rate 161 * 162 * SniffUSB observations (Nov 2003): Contrary to the 'wLength' value of 4 163 * shown above, observations with a Belkin F5U109 adapter, using the 164 * MCT-supplied Windows98 driver (U2SPORT.VXD, "File version: 1.21P.0104 for 165 * Win98/Me"), show this request has a length of 1 byte, presumably because 166 * of the fact that the Belkin adapter and the 'Sitecom U232-P25' adapter 167 * use a baud-rate code instead of a conventional RS-232 baud rate divisor. 168 * The current source code for this driver does not reflect this fact, but 169 * the driver works fine with this adapter/driver combination nonetheless. 170 * 171 * 172 * Line Control Register (LCR) 173 * --------------------------- 174 * 175 * BmRequestType: 0x40 (0100 0000B) 0xc0 (1100 0000B) 176 * bRequest: 0x07 0x06 177 * wValue: 0x0000 178 * wIndex: 0x0000 179 * wLength: 0x0001 180 * Data: LCR (see below) 181 * 182 * Bit 7: Divisor Latch Access Bit (DLAB). When set, access to the data 183 * transmit/receive register (THR/RBR) and the Interrupt Enable Register 184 * (IER) is disabled. Any access to these ports is now redirected to the 185 * Divisor Latch Registers. Setting this bit, loading the Divisor 186 * Registers, and clearing DLAB should be done with interrupts disabled. 187 * Bit 6: Set Break. When set to "1", the transmitter begins to transmit 188 * continuous Spacing until this bit is set to "0". This overrides any 189 * bits of characters that are being transmitted. 190 * Bit 5: Stick Parity. When parity is enabled, setting this bit causes parity 191 * to always be "1" or "0", based on the value of Bit 4. 192 * Bit 4: Even Parity Select (EPS). When parity is enabled and Bit 5 is "0", 193 * setting this bit causes even parity to be transmitted and expected. 194 * Otherwise, odd parity is used. 195 * Bit 3: Parity Enable (PEN). When set to "1", a parity bit is inserted 196 * between the last bit of the data and the Stop Bit. The UART will also 197 * expect parity to be present in the received data. 198 * Bit 2: Number of Stop Bits (STB). If set to "1" and using 5-bit data words, 199 * 1.5 Stop Bits are transmitted and expected in each data word. For 200 * 6, 7 and 8-bit data words, 2 Stop Bits are transmitted and expected. 201 * When this bit is set to "0", one Stop Bit is used on each data word. 202 * Bit 1: Word Length Select Bit #1 (WLSB1) 203 * Bit 0: Word Length Select Bit #0 (WLSB0) 204 * Together these bits specify the number of bits in each data word. 205 * 1 0 Word Length 206 * 0 0 5 Data Bits 207 * 0 1 6 Data Bits 208 * 1 0 7 Data Bits 209 * 1 1 8 Data Bits 210 * 211 * SniffUSB observations: Bit 7 seems not to be used. There seem to be two bugs 212 * in the Win98 driver: the break does not work (bit 6 is not asserted) and the 213 * stick parity bit is not cleared when set once. The LCR can also be read 214 * back with USB request 6 but this has never been observed with SniffUSB. 215 * 216 * 217 * Modem Control Register (MCR) 218 * ---------------------------- 219 * 220 * BmRequestType: 0x40 (0100 0000B) 221 * bRequest: 0x0a 222 * wValue: 0x0000 223 * wIndex: 0x0000 224 * wLength: 0x0001 225 * Data: MCR (Bit 4..7, see below) 226 * 227 * Bit 7: Reserved, always 0. 228 * Bit 6: Reserved, always 0. 229 * Bit 5: Reserved, always 0. 230 * Bit 4: Loop-Back Enable. When set to "1", the UART transmitter and receiver 231 * are internally connected together to allow diagnostic operations. In 232 * addition, the UART modem control outputs are connected to the UART 233 * modem control inputs. CTS is connected to RTS, DTR is connected to 234 * DSR, OUT1 is connected to RI, and OUT 2 is connected to DCD. 235 * Bit 3: OUT 2. An auxiliary output that the host processor may set high or 236 * low. In the IBM PC serial adapter (and most clones), OUT 2 is used 237 * to tri-state (disable) the interrupt signal from the 238 * 8250/16450/16550 UART. 239 * Bit 2: OUT 1. An auxiliary output that the host processor may set high or 240 * low. This output is not used on the IBM PC serial adapter. 241 * Bit 1: Request to Send (RTS). When set to "1", the output of the UART -RTS 242 * line is Low (Active). 243 * Bit 0: Data Terminal Ready (DTR). When set to "1", the output of the UART 244 * -DTR line is Low (Active). 245 * 246 * SniffUSB observations: Bit 2 and 4 seem not to be used but bit 3 has been 247 * seen _always_ set. 248 * 249 * 250 * Modem Status Register (MSR) 251 * --------------------------- 252 * 253 * BmRequestType: 0xc0 (1100 0000B) 254 * bRequest: 0x02 255 * wValue: 0x0000 256 * wIndex: 0x0000 257 * wLength: 0x0001 258 * Data: MSR (see below) 259 * 260 * Bit 7: Data Carrier Detect (CD). Reflects the state of the DCD line on the 261 * UART. 262 * Bit 6: Ring Indicator (RI). Reflects the state of the RI line on the UART. 263 * Bit 5: Data Set Ready (DSR). Reflects the state of the DSR line on the UART. 264 * Bit 4: Clear To Send (CTS). Reflects the state of the CTS line on the UART. 265 * Bit 3: Delta Data Carrier Detect (DDCD). Set to "1" if the -DCD line has 266 * changed state one more more times since the last time the MSR was 267 * read by the host. 268 * Bit 2: Trailing Edge Ring Indicator (TERI). Set to "1" if the -RI line has 269 * had a low to high transition since the last time the MSR was read by 270 * the host. 271 * Bit 1: Delta Data Set Ready (DDSR). Set to "1" if the -DSR line has changed 272 * state one more more times since the last time the MSR was read by the 273 * host. 274 * Bit 0: Delta Clear To Send (DCTS). Set to "1" if the -CTS line has changed 275 * state one more times since the last time the MSR was read by the 276 * host. 277 * 278 * SniffUSB observations: the MSR is also returned as first byte on the 279 * interrupt-in endpoint 0x83 to signal changes of modem status lines. The USB 280 * request to read MSR cannot be applied during normal device operation. 281 * 282 * 283 * Line Status Register (LSR) 284 * -------------------------- 285 * 286 * Bit 7 Error in Receiver FIFO. On the 8250/16450 UART, this bit is zero. 287 * This bit is set to "1" when any of the bytes in the FIFO have one or 288 * more of the following error conditions: PE, FE, or BI. 289 * Bit 6 Transmitter Empty (TEMT). When set to "1", there are no words 290 * remaining in the transmit FIFO or the transmit shift register. The 291 * transmitter is completely idle. 292 * Bit 5 Transmitter Holding Register Empty (THRE). When set to "1", the FIFO 293 * (or holding register) now has room for at least one additional word 294 * to transmit. The transmitter may still be transmitting when this bit 295 * is set to "1". 296 * Bit 4 Break Interrupt (BI). The receiver has detected a Break signal. 297 * Bit 3 Framing Error (FE). A Start Bit was detected but the Stop Bit did not 298 * appear at the expected time. The received word is probably garbled. 299 * Bit 2 Parity Error (PE). The parity bit was incorrect for the word received. 300 * Bit 1 Overrun Error (OE). A new word was received and there was no room in 301 * the receive buffer. The newly-arrived word in the shift register is 302 * discarded. On 8250/16450 UARTs, the word in the holding register is 303 * discarded and the newly- arrived word is put in the holding register. 304 * Bit 0 Data Ready (DR). One or more words are in the receive FIFO that the 305 * host may read. A word must be completely received and moved from the 306 * shift register into the FIFO (or holding register for 8250/16450 307 * designs) before this bit is set. 308 * 309 * SniffUSB observations: the LSR is returned as second byte on the interrupt-in 310 * endpoint 0x83 to signal error conditions. Such errors have been seen with 311 * minicom/zmodem transfers (CRC errors). 312 * 313 * 314 * Unknown #1 315 * ------------------- 316 * 317 * BmRequestType: 0x40 (0100 0000B) 318 * bRequest: 0x0b 319 * wValue: 0x0000 320 * wIndex: 0x0000 321 * wLength: 0x0001 322 * Data: 0x00 323 * 324 * SniffUSB observations (Nov 2003): With the MCT-supplied Windows98 driver 325 * (U2SPORT.VXD, "File version: 1.21P.0104 for Win98/Me"), this request 326 * occurs immediately after a "Baud rate (divisor)" message. It was not 327 * observed at any other time. It is unclear what purpose this message 328 * serves. 329 * 330 * 331 * Unknown #2 332 * ------------------- 333 * 334 * BmRequestType: 0x40 (0100 0000B) 335 * bRequest: 0x0c 336 * wValue: 0x0000 337 * wIndex: 0x0000 338 * wLength: 0x0001 339 * Data: 0x00 340 * 341 * SniffUSB observations (Nov 2003): With the MCT-supplied Windows98 driver 342 * (U2SPORT.VXD, "File version: 1.21P.0104 for Win98/Me"), this request 343 * occurs immediately after the 'Unknown #1' message (see above). It was 344 * not observed at any other time. It is unclear what other purpose (if 345 * any) this message might serve, but without it, the USB/RS-232 adapter 346 * will not write to RS-232 devices which do not assert the 'CTS' signal. 347 * 348 * 349 * Flow control 350 * ------------ 351 * 352 * SniffUSB observations: no flow control specific requests have been realized 353 * apart from DTR/RTS settings. Both signals are dropped for no flow control 354 * but asserted for hardware or software flow control. 355 * 356 * 357 * Endpoint usage 358 * -------------- 359 * 360 * SniffUSB observations: the bulk-out endpoint 0x1 and interrupt-in endpoint 361 * 0x81 is used to transmit and receive characters. The second interrupt-in 362 * endpoint 0x83 signals exceptional conditions like modem line changes and 363 * errors. The first byte returned is the MSR and the second byte the LSR. 364 * 365 * 366 * Other observations 367 * ------------------ 368 * 369 * Queued bulk transfers like used in visor.c did not work. 370 * 371 * 372 * Properties of the USB device used (as found in /var/log/messages) 373 * ----------------------------------------------------------------- 374 * 375 * Manufacturer: MCT Corporation. 376 * Product: USB-232 Interfact Controller 377 * SerialNumber: U2S22050 378 * 379 * Length = 18 380 * DescriptorType = 01 381 * USB version = 1.00 382 * Vendor:Product = 0711:0210 383 * MaxPacketSize0 = 8 384 * NumConfigurations = 1 385 * Device version = 1.02 386 * Device Class:SubClass:Protocol = 00:00:00 387 * Per-interface classes 388 * Configuration: 389 * bLength = 9 390 * bDescriptorType = 02 391 * wTotalLength = 0027 392 * bNumInterfaces = 01 393 * bConfigurationValue = 01 394 * iConfiguration = 00 395 * bmAttributes = c0 396 * MaxPower = 100mA 397 * 398 * Interface: 0 399 * Alternate Setting: 0 400 * bLength = 9 401 * bDescriptorType = 04 402 * bInterfaceNumber = 00 403 * bAlternateSetting = 00 404 * bNumEndpoints = 03 405 * bInterface Class:SubClass:Protocol = 00:00:00 406 * iInterface = 00 407 * Endpoint: 408 * bLength = 7 409 * bDescriptorType = 05 410 * bEndpointAddress = 81 (in) 411 * bmAttributes = 03 (Interrupt) 412 * wMaxPacketSize = 0040 413 * bInterval = 02 414 * Endpoint: 415 * bLength = 7 416 * bDescriptorType = 05 417 * bEndpointAddress = 01 (out) 418 * bmAttributes = 02 (Bulk) 419 * wMaxPacketSize = 0040 420 * bInterval = 00 421 * Endpoint: 422 * bLength = 7 423 * bDescriptorType = 05 424 * bEndpointAddress = 83 (in) 425 * bmAttributes = 03 (Interrupt) 426 * wMaxPacketSize = 0002 427 * bInterval = 02 428 * 429 * 430 * Hardware details (added by Martin Hamilton, 2001/12/06) 431 * ----------------------------------------------------------------- 432 * 433 * This info was gleaned from opening a Belkin F5U109 DB9 USB serial 434 * adaptor, which turns out to simply be a re-badged U232-P9. We 435 * know this because there is a sticky label on the circuit board 436 * which says "U232-P9" ;-) 437 * 438 * The circuit board inside the adaptor contains a Philips PDIUSBD12 439 * USB endpoint chip and a Phillips P87C52UBAA microcontroller with 440 * embedded UART. Exhaustive documentation for these is available at: 441 * 442 * http://www.semiconductors.philips.com/pip/p87c52ubaa 443 * http://www.semiconductors.philips.com/pip/pdiusbd12 444 * 445 * Thanks to Julian Highfield for the pointer to the Philips database. 446 * 447 */ 448 449 #endif /* __LINUX_USB_SERIAL_MCT_U232_H */ 450 451