1 /*
2  *  This program is free software; you can redistribute it and/or modify it
3  *  under the terms of the GNU General Public License version 2 as published
4  *  by the Free Software Foundation.
5  *
6  *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
7  */
8 
9 #ifndef _LANTIQ_XWAY_IRQ_H__
10 #define _LANTIQ_XWAY_IRQ_H__
11 
12 #define INT_NUM_IRQ0		8
13 #define INT_NUM_IM0_IRL0	(INT_NUM_IRQ0 + 0)
14 #define INT_NUM_IM1_IRL0	(INT_NUM_IRQ0 + 32)
15 #define INT_NUM_IM2_IRL0	(INT_NUM_IRQ0 + 64)
16 #define INT_NUM_IM3_IRL0	(INT_NUM_IRQ0 + 96)
17 #define INT_NUM_IM4_IRL0	(INT_NUM_IRQ0 + 128)
18 #define INT_NUM_IM_OFFSET	(INT_NUM_IM1_IRL0 - INT_NUM_IM0_IRL0)
19 
20 #define LTQ_ASC_TIR(x)		(INT_NUM_IM3_IRL0 + (x * 8))
21 #define LTQ_ASC_RIR(x)		(INT_NUM_IM3_IRL0 + (x * 8) + 1)
22 #define LTQ_ASC_EIR(x)		(INT_NUM_IM3_IRL0 + (x * 8) + 2)
23 
24 #define LTQ_ASC_ASE_TIR		INT_NUM_IM2_IRL0
25 #define LTQ_ASC_ASE_RIR		(INT_NUM_IM2_IRL0 + 2)
26 #define LTQ_ASC_ASE_EIR		(INT_NUM_IM2_IRL0 + 3)
27 
28 #define LTQ_SSC_TIR		(INT_NUM_IM0_IRL0 + 15)
29 #define LTQ_SSC_RIR		(INT_NUM_IM0_IRL0 + 14)
30 #define LTQ_SSC_EIR		(INT_NUM_IM0_IRL0 + 16)
31 
32 #define LTQ_MEI_DYING_GASP_INT	(INT_NUM_IM1_IRL0 + 21)
33 #define LTQ_MEI_INT		(INT_NUM_IM1_IRL0 + 23)
34 
35 #define LTQ_TIMER6_INT		(INT_NUM_IM1_IRL0 + 23)
36 #define LTQ_USB_INT		(INT_NUM_IM1_IRL0 + 22)
37 #define LTQ_USB_OC_INT		(INT_NUM_IM4_IRL0 + 23)
38 
39 #define MIPS_CPU_TIMER_IRQ		7
40 
41 #define LTQ_DMA_CH0_INT		(INT_NUM_IM2_IRL0)
42 #define LTQ_DMA_CH1_INT		(INT_NUM_IM2_IRL0 + 1)
43 #define LTQ_DMA_CH2_INT		(INT_NUM_IM2_IRL0 + 2)
44 #define LTQ_DMA_CH3_INT		(INT_NUM_IM2_IRL0 + 3)
45 #define LTQ_DMA_CH4_INT		(INT_NUM_IM2_IRL0 + 4)
46 #define LTQ_DMA_CH5_INT		(INT_NUM_IM2_IRL0 + 5)
47 #define LTQ_DMA_CH6_INT		(INT_NUM_IM2_IRL0 + 6)
48 #define LTQ_DMA_CH7_INT		(INT_NUM_IM2_IRL0 + 7)
49 #define LTQ_DMA_CH8_INT		(INT_NUM_IM2_IRL0 + 8)
50 #define LTQ_DMA_CH9_INT		(INT_NUM_IM2_IRL0 + 9)
51 #define LTQ_DMA_CH10_INT	(INT_NUM_IM2_IRL0 + 10)
52 #define LTQ_DMA_CH11_INT	(INT_NUM_IM2_IRL0 + 11)
53 #define LTQ_DMA_CH12_INT	(INT_NUM_IM2_IRL0 + 25)
54 #define LTQ_DMA_CH13_INT	(INT_NUM_IM2_IRL0 + 26)
55 #define LTQ_DMA_CH14_INT	(INT_NUM_IM2_IRL0 + 27)
56 #define LTQ_DMA_CH15_INT	(INT_NUM_IM2_IRL0 + 28)
57 #define LTQ_DMA_CH16_INT	(INT_NUM_IM2_IRL0 + 29)
58 #define LTQ_DMA_CH17_INT	(INT_NUM_IM2_IRL0 + 30)
59 #define LTQ_DMA_CH18_INT	(INT_NUM_IM2_IRL0 + 16)
60 #define LTQ_DMA_CH19_INT	(INT_NUM_IM2_IRL0 + 21)
61 
62 #define LTQ_PPE_MBOX_INT	(INT_NUM_IM2_IRL0 + 24)
63 
64 #define INT_NUM_IM4_IRL14	(INT_NUM_IM4_IRL0 + 14)
65 
66 #endif
67