1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * Intel Linux Wireless <ilw@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26 /*
27 * Please use this file (iwl-dev.h) for driver implementation definitions.
28 * Please use iwl-commands.h for uCode API definitions.
29 * Please use iwl-4965-hw.h for hardware-related definitions.
30 */
31
32 #ifndef __iwl_dev_h__
33 #define __iwl_dev_h__
34
35 #include <linux/pci.h> /* for struct pci_device_id */
36 #include <linux/kernel.h>
37 #include <linux/wait.h>
38 #include <linux/leds.h>
39 #include <net/ieee80211_radiotap.h>
40
41 #include "iwl-eeprom.h"
42 #include "iwl-csr.h"
43 #include "iwl-prph.h"
44 #include "iwl-fh.h"
45 #include "iwl-debug.h"
46 #include "iwl-agn-hw.h"
47 #include "iwl-led.h"
48 #include "iwl-power.h"
49 #include "iwl-agn-rs.h"
50 #include "iwl-agn-tt.h"
51
52 #define U32_PAD(n) ((4-(n))&0x3)
53
54 struct iwl_tx_queue;
55
56 /* CT-KILL constants */
57 #define CT_KILL_THRESHOLD_LEGACY 110 /* in Celsius */
58 #define CT_KILL_THRESHOLD 114 /* in Celsius */
59 #define CT_KILL_EXIT_THRESHOLD 95 /* in Celsius */
60
61 /* Default noise level to report when noise measurement is not available.
62 * This may be because we're:
63 * 1) Not associated (4965, no beacon statistics being sent to driver)
64 * 2) Scanning (noise measurement does not apply to associated channel)
65 * 3) Receiving CCK (3945 delivers noise info only for OFDM frames)
66 * Use default noise value of -127 ... this is below the range of measurable
67 * Rx dBm for either 3945 or 4965, so it can indicate "unmeasurable" to user.
68 * Also, -127 works better than 0 when averaging frames with/without
69 * noise info (e.g. averaging might be done in app); measured dBm values are
70 * always negative ... using a negative value as the default keeps all
71 * averages within an s8's (used in some apps) range of negative values. */
72 #define IWL_NOISE_MEAS_NOT_AVAILABLE (-127)
73
74 /*
75 * RTS threshold here is total size [2347] minus 4 FCS bytes
76 * Per spec:
77 * a value of 0 means RTS on all data/management packets
78 * a value > max MSDU size means no RTS
79 * else RTS for data/management frames where MPDU is larger
80 * than RTS value.
81 */
82 #define DEFAULT_RTS_THRESHOLD 2347U
83 #define MIN_RTS_THRESHOLD 0U
84 #define MAX_RTS_THRESHOLD 2347U
85 #define MAX_MSDU_SIZE 2304U
86 #define MAX_MPDU_SIZE 2346U
87 #define DEFAULT_BEACON_INTERVAL 100U
88 #define DEFAULT_SHORT_RETRY_LIMIT 7U
89 #define DEFAULT_LONG_RETRY_LIMIT 4U
90
91 struct iwl_rx_mem_buffer {
92 dma_addr_t page_dma;
93 struct page *page;
94 struct list_head list;
95 };
96
97 #define rxb_addr(r) page_address(r->page)
98
99 /* defined below */
100 struct iwl_device_cmd;
101
102 struct iwl_cmd_meta {
103 /* only for SYNC commands, iff the reply skb is wanted */
104 struct iwl_host_cmd *source;
105 /*
106 * only for ASYNC commands
107 * (which is somewhat stupid -- look at iwl-sta.c for instance
108 * which duplicates a bunch of code because the callback isn't
109 * invoked for SYNC commands, if it were and its result passed
110 * through it would be simpler...)
111 */
112 void (*callback)(struct iwl_priv *priv,
113 struct iwl_device_cmd *cmd,
114 struct iwl_rx_packet *pkt);
115
116 /* The CMD_SIZE_HUGE flag bit indicates that the command
117 * structure is stored at the end of the shared queue memory. */
118 u32 flags;
119
120 DEFINE_DMA_UNMAP_ADDR(mapping);
121 DEFINE_DMA_UNMAP_LEN(len);
122 };
123
124 /*
125 * Generic queue structure
126 *
127 * Contains common data for Rx and Tx queues
128 */
129 struct iwl_queue {
130 int n_bd; /* number of BDs in this queue */
131 int write_ptr; /* 1-st empty entry (index) host_w*/
132 int read_ptr; /* last used entry (index) host_r*/
133 /* use for monitoring and recovering the stuck queue */
134 dma_addr_t dma_addr; /* physical addr for BD's */
135 int n_window; /* safe queue window */
136 u32 id;
137 int low_mark; /* low watermark, resume queue if free
138 * space more than this */
139 int high_mark; /* high watermark, stop queue if free
140 * space less than this */
141 };
142
143 /* One for each TFD */
144 struct iwl_tx_info {
145 struct sk_buff *skb;
146 struct iwl_rxon_context *ctx;
147 };
148
149 /**
150 * struct iwl_tx_queue - Tx Queue for DMA
151 * @q: generic Rx/Tx queue descriptor
152 * @bd: base of circular buffer of TFDs
153 * @cmd: array of command/TX buffer pointers
154 * @meta: array of meta data for each command/tx buffer
155 * @dma_addr_cmd: physical address of cmd/tx buffer array
156 * @txb: array of per-TFD driver data
157 * @time_stamp: time (in jiffies) of last read_ptr change
158 * @need_update: indicates need to update read/write index
159 * @sched_retry: indicates queue is high-throughput aggregation (HT AGG) enabled
160 *
161 * A Tx queue consists of circular buffer of BDs (a.k.a. TFDs, transmit frame
162 * descriptors) and required locking structures.
163 */
164 #define TFD_TX_CMD_SLOTS 256
165 #define TFD_CMD_SLOTS 32
166
167 struct iwl_tx_queue {
168 struct iwl_queue q;
169 void *tfds;
170 struct iwl_device_cmd **cmd;
171 struct iwl_cmd_meta *meta;
172 struct iwl_tx_info *txb;
173 unsigned long time_stamp;
174 u8 need_update;
175 u8 sched_retry;
176 u8 active;
177 u8 swq_id;
178 };
179
180 #define IWL_NUM_SCAN_RATES (2)
181
182 struct iwl4965_channel_tgd_info {
183 u8 type;
184 s8 max_power;
185 };
186
187 struct iwl4965_channel_tgh_info {
188 s64 last_radar_time;
189 };
190
191 #define IWL4965_MAX_RATE (33)
192
193 struct iwl3945_clip_group {
194 /* maximum power level to prevent clipping for each rate, derived by
195 * us from this band's saturation power in EEPROM */
196 const s8 clip_powers[IWL_MAX_RATES];
197 };
198
199 /* current Tx power values to use, one for each rate for each channel.
200 * requested power is limited by:
201 * -- regulatory EEPROM limits for this channel
202 * -- hardware capabilities (clip-powers)
203 * -- spectrum management
204 * -- user preference (e.g. iwconfig)
205 * when requested power is set, base power index must also be set. */
206 struct iwl3945_channel_power_info {
207 struct iwl3945_tx_power tpc; /* actual radio and DSP gain settings */
208 s8 power_table_index; /* actual (compenst'd) index into gain table */
209 s8 base_power_index; /* gain index for power at factory temp. */
210 s8 requested_power; /* power (dBm) requested for this chnl/rate */
211 };
212
213 /* current scan Tx power values to use, one for each scan rate for each
214 * channel. */
215 struct iwl3945_scan_power_info {
216 struct iwl3945_tx_power tpc; /* actual radio and DSP gain settings */
217 s8 power_table_index; /* actual (compenst'd) index into gain table */
218 s8 requested_power; /* scan pwr (dBm) requested for chnl/rate */
219 };
220
221 /*
222 * One for each channel, holds all channel setup data
223 * Some of the fields (e.g. eeprom and flags/max_power_avg) are redundant
224 * with one another!
225 */
226 struct iwl_channel_info {
227 struct iwl4965_channel_tgd_info tgd;
228 struct iwl4965_channel_tgh_info tgh;
229 struct iwl_eeprom_channel eeprom; /* EEPROM regulatory limit */
230 struct iwl_eeprom_channel ht40_eeprom; /* EEPROM regulatory limit for
231 * HT40 channel */
232
233 u8 channel; /* channel number */
234 u8 flags; /* flags copied from EEPROM */
235 s8 max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
236 s8 curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) limit */
237 s8 min_power; /* always 0 */
238 s8 scan_power; /* (dBm) regul. eeprom, direct scans, any rate */
239
240 u8 group_index; /* 0-4, maps channel to group1/2/3/4/5 */
241 u8 band_index; /* 0-4, maps channel to band1/2/3/4/5 */
242 enum ieee80211_band band;
243
244 /* HT40 channel info */
245 s8 ht40_max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
246 u8 ht40_flags; /* flags copied from EEPROM */
247 u8 ht40_extension_channel; /* HT_IE_EXT_CHANNEL_* */
248
249 /* Radio/DSP gain settings for each "normal" data Tx rate.
250 * These include, in addition to RF and DSP gain, a few fields for
251 * remembering/modifying gain settings (indexes). */
252 struct iwl3945_channel_power_info power_info[IWL4965_MAX_RATE];
253
254 /* Radio/DSP gain settings for each scan rate, for directed scans. */
255 struct iwl3945_scan_power_info scan_pwr_info[IWL_NUM_SCAN_RATES];
256 };
257
258 #define IWL_TX_FIFO_BK 0 /* shared */
259 #define IWL_TX_FIFO_BE 1
260 #define IWL_TX_FIFO_VI 2 /* shared */
261 #define IWL_TX_FIFO_VO 3
262 #define IWL_TX_FIFO_BK_IPAN IWL_TX_FIFO_BK
263 #define IWL_TX_FIFO_BE_IPAN 4
264 #define IWL_TX_FIFO_VI_IPAN IWL_TX_FIFO_VI
265 #define IWL_TX_FIFO_VO_IPAN 5
266 #define IWL_TX_FIFO_UNUSED -1
267
268 /* Minimum number of queues. MAX_NUM is defined in hw specific files.
269 * Set the minimum to accommodate the 4 standard TX queues, 1 command
270 * queue, 2 (unused) HCCA queues, and 4 HT queues (one for each AC) */
271 #define IWL_MIN_NUM_QUEUES 10
272
273 /*
274 * Command queue depends on iPAN support.
275 */
276 #define IWL_DEFAULT_CMD_QUEUE_NUM 4
277 #define IWL_IPAN_CMD_QUEUE_NUM 9
278
279 /*
280 * This queue number is required for proper operation
281 * because the ucode will stop/start the scheduler as
282 * required.
283 */
284 #define IWL_IPAN_MCAST_QUEUE 8
285
286 #define IEEE80211_DATA_LEN 2304
287 #define IEEE80211_4ADDR_LEN 30
288 #define IEEE80211_HLEN (IEEE80211_4ADDR_LEN)
289 #define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN)
290
291 struct iwl_frame {
292 union {
293 struct ieee80211_hdr frame;
294 struct iwl_tx_beacon_cmd beacon;
295 u8 raw[IEEE80211_FRAME_LEN];
296 u8 cmd[360];
297 } u;
298 struct list_head list;
299 };
300
301 #define SEQ_TO_SN(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4)
302 #define SN_TO_SEQ(ssn) (((ssn) << 4) & IEEE80211_SCTL_SEQ)
303 #define MAX_SN ((IEEE80211_SCTL_SEQ) >> 4)
304
305 enum {
306 CMD_SYNC = 0,
307 CMD_SIZE_NORMAL = 0,
308 CMD_NO_SKB = 0,
309 CMD_SIZE_HUGE = (1 << 0),
310 CMD_ASYNC = (1 << 1),
311 CMD_WANT_SKB = (1 << 2),
312 };
313
314 #define DEF_CMD_PAYLOAD_SIZE 320
315
316 /**
317 * struct iwl_device_cmd
318 *
319 * For allocation of the command and tx queues, this establishes the overall
320 * size of the largest command we send to uCode, except for a scan command
321 * (which is relatively huge; space is allocated separately).
322 */
323 struct iwl_device_cmd {
324 struct iwl_cmd_header hdr; /* uCode API */
325 union {
326 u32 flags;
327 u8 val8;
328 u16 val16;
329 u32 val32;
330 struct iwl_tx_cmd tx;
331 struct iwl6000_channel_switch_cmd chswitch;
332 u8 payload[DEF_CMD_PAYLOAD_SIZE];
333 } __packed cmd;
334 } __packed;
335
336 #define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl_device_cmd))
337
338
339 struct iwl_host_cmd {
340 const void *data;
341 unsigned long reply_page;
342 void (*callback)(struct iwl_priv *priv,
343 struct iwl_device_cmd *cmd,
344 struct iwl_rx_packet *pkt);
345 u32 flags;
346 u16 len;
347 u8 id;
348 };
349
350 #define SUP_RATE_11A_MAX_NUM_CHANNELS 8
351 #define SUP_RATE_11B_MAX_NUM_CHANNELS 4
352 #define SUP_RATE_11G_MAX_NUM_CHANNELS 12
353
354 /**
355 * struct iwl_rx_queue - Rx queue
356 * @bd: driver's pointer to buffer of receive buffer descriptors (rbd)
357 * @bd_dma: bus address of buffer of receive buffer descriptors (rbd)
358 * @read: Shared index to newest available Rx buffer
359 * @write: Shared index to oldest written Rx packet
360 * @free_count: Number of pre-allocated buffers in rx_free
361 * @rx_free: list of free SKBs for use
362 * @rx_used: List of Rx buffers with no SKB
363 * @need_update: flag to indicate we need to update read/write index
364 * @rb_stts: driver's pointer to receive buffer status
365 * @rb_stts_dma: bus address of receive buffer status
366 *
367 * NOTE: rx_free and rx_used are used as a FIFO for iwl_rx_mem_buffers
368 */
369 struct iwl_rx_queue {
370 __le32 *bd;
371 dma_addr_t bd_dma;
372 struct iwl_rx_mem_buffer pool[RX_QUEUE_SIZE + RX_FREE_BUFFERS];
373 struct iwl_rx_mem_buffer *queue[RX_QUEUE_SIZE];
374 u32 read;
375 u32 write;
376 u32 free_count;
377 u32 write_actual;
378 struct list_head rx_free;
379 struct list_head rx_used;
380 int need_update;
381 struct iwl_rb_status *rb_stts;
382 dma_addr_t rb_stts_dma;
383 spinlock_t lock;
384 };
385
386 #define IWL_SUPPORTED_RATES_IE_LEN 8
387
388 #define MAX_TID_COUNT 9
389
390 #define IWL_INVALID_RATE 0xFF
391 #define IWL_INVALID_VALUE -1
392
393 /**
394 * struct iwl_ht_agg -- aggregation status while waiting for block-ack
395 * @txq_id: Tx queue used for Tx attempt
396 * @frame_count: # frames attempted by Tx command
397 * @wait_for_ba: Expect block-ack before next Tx reply
398 * @start_idx: Index of 1st Transmit Frame Descriptor (TFD) in Tx window
399 * @bitmap0: Low order bitmap, one bit for each frame pending ACK in Tx window
400 * @bitmap1: High order, one bit for each frame pending ACK in Tx window
401 * @rate_n_flags: Rate at which Tx was attempted
402 *
403 * If REPLY_TX indicates that aggregation was attempted, driver must wait
404 * for block ack (REPLY_COMPRESSED_BA). This struct stores tx reply info
405 * until block ack arrives.
406 */
407 struct iwl_ht_agg {
408 u16 txq_id;
409 u16 frame_count;
410 u16 wait_for_ba;
411 u16 start_idx;
412 u64 bitmap;
413 u32 rate_n_flags;
414 #define IWL_AGG_OFF 0
415 #define IWL_AGG_ON 1
416 #define IWL_EMPTYING_HW_QUEUE_ADDBA 2
417 #define IWL_EMPTYING_HW_QUEUE_DELBA 3
418 u8 state;
419 };
420
421
422 struct iwl_tid_data {
423 u16 seq_number; /* agn only */
424 u16 tfds_in_queue;
425 struct iwl_ht_agg agg;
426 };
427
428 struct iwl_hw_key {
429 u32 cipher;
430 int keylen;
431 u8 keyidx;
432 u8 key[32];
433 };
434
435 union iwl_ht_rate_supp {
436 u16 rates;
437 struct {
438 u8 siso_rate;
439 u8 mimo_rate;
440 };
441 };
442
443 #define CFG_HT_RX_AMPDU_FACTOR_8K (0x0)
444 #define CFG_HT_RX_AMPDU_FACTOR_16K (0x1)
445 #define CFG_HT_RX_AMPDU_FACTOR_32K (0x2)
446 #define CFG_HT_RX_AMPDU_FACTOR_64K (0x3)
447 #define CFG_HT_RX_AMPDU_FACTOR_DEF CFG_HT_RX_AMPDU_FACTOR_64K
448 #define CFG_HT_RX_AMPDU_FACTOR_MAX CFG_HT_RX_AMPDU_FACTOR_64K
449 #define CFG_HT_RX_AMPDU_FACTOR_MIN CFG_HT_RX_AMPDU_FACTOR_8K
450
451 /*
452 * Maximal MPDU density for TX aggregation
453 * 4 - 2us density
454 * 5 - 4us density
455 * 6 - 8us density
456 * 7 - 16us density
457 */
458 #define CFG_HT_MPDU_DENSITY_2USEC (0x4)
459 #define CFG_HT_MPDU_DENSITY_4USEC (0x5)
460 #define CFG_HT_MPDU_DENSITY_8USEC (0x6)
461 #define CFG_HT_MPDU_DENSITY_16USEC (0x7)
462 #define CFG_HT_MPDU_DENSITY_DEF CFG_HT_MPDU_DENSITY_4USEC
463 #define CFG_HT_MPDU_DENSITY_MAX CFG_HT_MPDU_DENSITY_16USEC
464 #define CFG_HT_MPDU_DENSITY_MIN (0x1)
465
466 struct iwl_ht_config {
467 bool single_chain_sufficient;
468 enum ieee80211_smps_mode smps; /* current smps mode */
469 };
470
471 /* QoS structures */
472 struct iwl_qos_info {
473 int qos_active;
474 struct iwl_qosparam_cmd def_qos_parm;
475 };
476
477 /*
478 * Structure should be accessed with sta_lock held. When station addition
479 * is in progress (IWL_STA_UCODE_INPROGRESS) it is possible to access only
480 * the commands (iwl_addsta_cmd and iwl_link_quality_cmd) without sta_lock
481 * held.
482 */
483 struct iwl_station_entry {
484 struct iwl_addsta_cmd sta;
485 struct iwl_tid_data tid[MAX_TID_COUNT];
486 u8 used, ctxid;
487 struct iwl_hw_key keyinfo;
488 struct iwl_link_quality_cmd *lq;
489 };
490
491 struct iwl_station_priv_common {
492 struct iwl_rxon_context *ctx;
493 u8 sta_id;
494 };
495
496 /*
497 * iwl_station_priv: Driver's private station information
498 *
499 * When mac80211 creates a station it reserves some space (hw->sta_data_size)
500 * in the structure for use by driver. This structure is places in that
501 * space.
502 *
503 * The common struct MUST be first because it is shared between
504 * 3945 and agn!
505 */
506 struct iwl_station_priv {
507 struct iwl_station_priv_common common;
508 struct iwl_lq_sta lq_sta;
509 atomic_t pending_frames;
510 bool client;
511 bool asleep;
512 u8 max_agg_bufsize;
513 };
514
515 /**
516 * struct iwl_vif_priv - driver's private per-interface information
517 *
518 * When mac80211 allocates a virtual interface, it can allocate
519 * space for us to put data into.
520 */
521 struct iwl_vif_priv {
522 struct iwl_rxon_context *ctx;
523 u8 ibss_bssid_sta_id;
524 };
525
526 /* one for each uCode image (inst/data, boot/init/runtime) */
527 struct fw_desc {
528 void *v_addr; /* access by driver */
529 dma_addr_t p_addr; /* access by card's busmaster DMA */
530 u32 len; /* bytes */
531 };
532
533 /* v1/v2 uCode file layout */
534 struct iwl_ucode_header {
535 __le32 ver; /* major/minor/API/serial */
536 union {
537 struct {
538 __le32 inst_size; /* bytes of runtime code */
539 __le32 data_size; /* bytes of runtime data */
540 __le32 init_size; /* bytes of init code */
541 __le32 init_data_size; /* bytes of init data */
542 __le32 boot_size; /* bytes of bootstrap code */
543 u8 data[0]; /* in same order as sizes */
544 } v1;
545 struct {
546 __le32 build; /* build number */
547 __le32 inst_size; /* bytes of runtime code */
548 __le32 data_size; /* bytes of runtime data */
549 __le32 init_size; /* bytes of init code */
550 __le32 init_data_size; /* bytes of init data */
551 __le32 boot_size; /* bytes of bootstrap code */
552 u8 data[0]; /* in same order as sizes */
553 } v2;
554 } u;
555 };
556
557 /*
558 * new TLV uCode file layout
559 *
560 * The new TLV file format contains TLVs, that each specify
561 * some piece of data. To facilitate "groups", for example
562 * different instruction image with different capabilities,
563 * bundled with the same init image, an alternative mechanism
564 * is provided:
565 * When the alternative field is 0, that means that the item
566 * is always valid. When it is non-zero, then it is only
567 * valid in conjunction with items of the same alternative,
568 * in which case the driver (user) selects one alternative
569 * to use.
570 */
571
572 enum iwl_ucode_tlv_type {
573 IWL_UCODE_TLV_INVALID = 0, /* unused */
574 IWL_UCODE_TLV_INST = 1,
575 IWL_UCODE_TLV_DATA = 2,
576 IWL_UCODE_TLV_INIT = 3,
577 IWL_UCODE_TLV_INIT_DATA = 4,
578 IWL_UCODE_TLV_BOOT = 5,
579 IWL_UCODE_TLV_PROBE_MAX_LEN = 6, /* a u32 value */
580 IWL_UCODE_TLV_PAN = 7,
581 IWL_UCODE_TLV_RUNT_EVTLOG_PTR = 8,
582 IWL_UCODE_TLV_RUNT_EVTLOG_SIZE = 9,
583 IWL_UCODE_TLV_RUNT_ERRLOG_PTR = 10,
584 IWL_UCODE_TLV_INIT_EVTLOG_PTR = 11,
585 IWL_UCODE_TLV_INIT_EVTLOG_SIZE = 12,
586 IWL_UCODE_TLV_INIT_ERRLOG_PTR = 13,
587 IWL_UCODE_TLV_ENHANCE_SENS_TBL = 14,
588 IWL_UCODE_TLV_PHY_CALIBRATION_SIZE = 15,
589 };
590
591 struct iwl_ucode_tlv {
592 __le16 type; /* see above */
593 __le16 alternative; /* see comment */
594 __le32 length; /* not including type/length fields */
595 u8 data[0];
596 } __packed;
597
598 #define IWL_TLV_UCODE_MAGIC 0x0a4c5749
599
600 struct iwl_tlv_ucode_header {
601 /*
602 * The TLV style ucode header is distinguished from
603 * the v1/v2 style header by first four bytes being
604 * zero, as such is an invalid combination of
605 * major/minor/API/serial versions.
606 */
607 __le32 zero;
608 __le32 magic;
609 u8 human_readable[64];
610 __le32 ver; /* major/minor/API/serial */
611 __le32 build;
612 __le64 alternatives; /* bitmask of valid alternatives */
613 /*
614 * The data contained herein has a TLV layout,
615 * see above for the TLV header and types.
616 * Note that each TLV is padded to a length
617 * that is a multiple of 4 for alignment.
618 */
619 u8 data[0];
620 };
621
622 struct iwl4965_ibss_seq {
623 u8 mac[ETH_ALEN];
624 u16 seq_num;
625 u16 frag_num;
626 unsigned long packet_time;
627 struct list_head list;
628 };
629
630 struct iwl_sensitivity_ranges {
631 u16 min_nrg_cck;
632 u16 max_nrg_cck;
633
634 u16 nrg_th_cck;
635 u16 nrg_th_ofdm;
636
637 u16 auto_corr_min_ofdm;
638 u16 auto_corr_min_ofdm_mrc;
639 u16 auto_corr_min_ofdm_x1;
640 u16 auto_corr_min_ofdm_mrc_x1;
641
642 u16 auto_corr_max_ofdm;
643 u16 auto_corr_max_ofdm_mrc;
644 u16 auto_corr_max_ofdm_x1;
645 u16 auto_corr_max_ofdm_mrc_x1;
646
647 u16 auto_corr_max_cck;
648 u16 auto_corr_max_cck_mrc;
649 u16 auto_corr_min_cck;
650 u16 auto_corr_min_cck_mrc;
651
652 u16 barker_corr_th_min;
653 u16 barker_corr_th_min_mrc;
654 u16 nrg_th_cca;
655 };
656
657
658 #define KELVIN_TO_CELSIUS(x) ((x)-273)
659 #define CELSIUS_TO_KELVIN(x) ((x)+273)
660
661
662 /**
663 * struct iwl_hw_params
664 * @max_txq_num: Max # Tx queues supported
665 * @dma_chnl_num: Number of Tx DMA/FIFO channels
666 * @scd_bc_tbls_size: size of scheduler byte count tables
667 * @tfd_size: TFD size
668 * @tx/rx_chains_num: Number of TX/RX chains
669 * @valid_tx/rx_ant: usable antennas
670 * @max_rxq_size: Max # Rx frames in Rx queue (must be power-of-2)
671 * @max_rxq_log: Log-base-2 of max_rxq_size
672 * @rx_page_order: Rx buffer page order
673 * @rx_wrt_ptr_reg: FH{39}_RSCSR_CHNL0_WPTR
674 * @max_stations:
675 * @ht40_channel: is 40MHz width possible in band 2.4
676 * BIT(IEEE80211_BAND_5GHZ) BIT(IEEE80211_BAND_5GHZ)
677 * @sw_crypto: 0 for hw, 1 for sw
678 * @max_xxx_size: for ucode uses
679 * @ct_kill_threshold: temperature threshold
680 * @beacon_time_tsf_bits: number of valid tsf bits for beacon time
681 * @calib_init_cfg: setup initial calibrations for the hw
682 * @calib_rt_cfg: setup runtime calibrations for the hw
683 * @struct iwl_sensitivity_ranges: range of sensitivity values
684 */
685 struct iwl_hw_params {
686 u8 max_txq_num;
687 u8 dma_chnl_num;
688 u16 scd_bc_tbls_size;
689 u32 tfd_size;
690 u8 tx_chains_num;
691 u8 rx_chains_num;
692 u8 valid_tx_ant;
693 u8 valid_rx_ant;
694 u16 max_rxq_size;
695 u16 max_rxq_log;
696 u32 rx_page_order;
697 u32 rx_wrt_ptr_reg;
698 u8 max_stations;
699 u8 ht40_channel;
700 u8 max_beacon_itrvl; /* in 1024 ms */
701 u32 max_inst_size;
702 u32 max_data_size;
703 u32 max_bsm_size;
704 u32 ct_kill_threshold; /* value in hw-dependent units */
705 u32 ct_kill_exit_threshold; /* value in hw-dependent units */
706 /* for 1000, 6000 series and up */
707 u16 beacon_time_tsf_bits;
708 u32 calib_init_cfg;
709 u32 calib_rt_cfg;
710 const struct iwl_sensitivity_ranges *sens;
711 };
712
713
714 /******************************************************************************
715 *
716 * Functions implemented in core module which are forward declared here
717 * for use by iwl-[4-5].c
718 *
719 * NOTE: The implementation of these functions are not hardware specific
720 * which is why they are in the core module files.
721 *
722 * Naming convention --
723 * iwl_ <-- Is part of iwlwifi
724 * iwlXXXX_ <-- Hardware specific (implemented in iwl-XXXX.c for XXXX)
725 * iwl4965_bg_ <-- Called from work queue context
726 * iwl4965_mac_ <-- mac80211 callback
727 *
728 ****************************************************************************/
729 extern void iwl_update_chain_flags(struct iwl_priv *priv);
730 extern const u8 iwl_bcast_addr[ETH_ALEN];
731 extern int iwl_rxq_stop(struct iwl_priv *priv);
732 extern void iwl_txq_ctx_stop(struct iwl_priv *priv);
733 extern int iwl_queue_space(const struct iwl_queue *q);
iwl_queue_used(const struct iwl_queue * q,int i)734 static inline int iwl_queue_used(const struct iwl_queue *q, int i)
735 {
736 return q->write_ptr >= q->read_ptr ?
737 (i >= q->read_ptr && i < q->write_ptr) :
738 !(i < q->read_ptr && i >= q->write_ptr);
739 }
740
741
get_cmd_index(struct iwl_queue * q,u32 index,int is_huge)742 static inline u8 get_cmd_index(struct iwl_queue *q, u32 index, int is_huge)
743 {
744 /*
745 * This is for init calibration result and scan command which
746 * required buffer > TFD_MAX_PAYLOAD_SIZE,
747 * the big buffer at end of command array
748 */
749 if (is_huge)
750 return q->n_window; /* must be power of 2 */
751
752 /* Otherwise, use normal size buffers */
753 return index & (q->n_window - 1);
754 }
755
756
757 struct iwl_dma_ptr {
758 dma_addr_t dma;
759 void *addr;
760 size_t size;
761 };
762
763 #define IWL_OPERATION_MODE_AUTO 0
764 #define IWL_OPERATION_MODE_HT_ONLY 1
765 #define IWL_OPERATION_MODE_MIXED 2
766 #define IWL_OPERATION_MODE_20MHZ 3
767
768 #define IWL_TX_CRC_SIZE 4
769 #define IWL_TX_DELIMITER_SIZE 4
770
771 #define TX_POWER_IWL_ILLEGAL_VOLTAGE -10000
772
773 /* Sensitivity and chain noise calibration */
774 #define INITIALIZATION_VALUE 0xFFFF
775 #define IWL4965_CAL_NUM_BEACONS 20
776 #define IWL_CAL_NUM_BEACONS 16
777 #define MAXIMUM_ALLOWED_PATHLOSS 15
778
779 #define CHAIN_NOISE_MAX_DELTA_GAIN_CODE 3
780
781 #define MAX_FA_OFDM 50
782 #define MIN_FA_OFDM 5
783 #define MAX_FA_CCK 50
784 #define MIN_FA_CCK 5
785
786 #define AUTO_CORR_STEP_OFDM 1
787
788 #define AUTO_CORR_STEP_CCK 3
789 #define AUTO_CORR_MAX_TH_CCK 160
790
791 #define NRG_DIFF 2
792 #define NRG_STEP_CCK 2
793 #define NRG_MARGIN 8
794 #define MAX_NUMBER_CCK_NO_FA 100
795
796 #define AUTO_CORR_CCK_MIN_VAL_DEF (125)
797
798 #define CHAIN_A 0
799 #define CHAIN_B 1
800 #define CHAIN_C 2
801 #define CHAIN_NOISE_DELTA_GAIN_INIT_VAL 4
802 #define ALL_BAND_FILTER 0xFF00
803 #define IN_BAND_FILTER 0xFF
804 #define MIN_AVERAGE_NOISE_MAX_VALUE 0xFFFFFFFF
805
806 #define NRG_NUM_PREV_STAT_L 20
807 #define NUM_RX_CHAINS 3
808
809 enum iwl4965_false_alarm_state {
810 IWL_FA_TOO_MANY = 0,
811 IWL_FA_TOO_FEW = 1,
812 IWL_FA_GOOD_RANGE = 2,
813 };
814
815 enum iwl4965_chain_noise_state {
816 IWL_CHAIN_NOISE_ALIVE = 0, /* must be 0 */
817 IWL_CHAIN_NOISE_ACCUMULATE,
818 IWL_CHAIN_NOISE_CALIBRATED,
819 IWL_CHAIN_NOISE_DONE,
820 };
821
822 enum iwl4965_calib_enabled_state {
823 IWL_CALIB_DISABLED = 0, /* must be 0 */
824 IWL_CALIB_ENABLED = 1,
825 };
826
827
828 /*
829 * enum iwl_calib
830 * defines the order in which results of initial calibrations
831 * should be sent to the runtime uCode
832 */
833 enum iwl_calib {
834 IWL_CALIB_XTAL,
835 IWL_CALIB_DC,
836 IWL_CALIB_LO,
837 IWL_CALIB_TX_IQ,
838 IWL_CALIB_TX_IQ_PERD,
839 IWL_CALIB_BASE_BAND,
840 IWL_CALIB_TEMP_OFFSET,
841 IWL_CALIB_MAX
842 };
843
844 /* Opaque calibration results */
845 struct iwl_calib_result {
846 void *buf;
847 size_t buf_len;
848 };
849
850 enum ucode_type {
851 UCODE_NONE = 0,
852 UCODE_INIT,
853 UCODE_RT
854 };
855
856 /* Sensitivity calib data */
857 struct iwl_sensitivity_data {
858 u32 auto_corr_ofdm;
859 u32 auto_corr_ofdm_mrc;
860 u32 auto_corr_ofdm_x1;
861 u32 auto_corr_ofdm_mrc_x1;
862 u32 auto_corr_cck;
863 u32 auto_corr_cck_mrc;
864
865 u32 last_bad_plcp_cnt_ofdm;
866 u32 last_fa_cnt_ofdm;
867 u32 last_bad_plcp_cnt_cck;
868 u32 last_fa_cnt_cck;
869
870 u32 nrg_curr_state;
871 u32 nrg_prev_state;
872 u32 nrg_value[10];
873 u8 nrg_silence_rssi[NRG_NUM_PREV_STAT_L];
874 u32 nrg_silence_ref;
875 u32 nrg_energy_idx;
876 u32 nrg_silence_idx;
877 u32 nrg_th_cck;
878 s32 nrg_auto_corr_silence_diff;
879 u32 num_in_cck_no_fa;
880 u32 nrg_th_ofdm;
881
882 u16 barker_corr_th_min;
883 u16 barker_corr_th_min_mrc;
884 u16 nrg_th_cca;
885 };
886
887 /* Chain noise (differential Rx gain) calib data */
888 struct iwl_chain_noise_data {
889 u32 active_chains;
890 u32 chain_noise_a;
891 u32 chain_noise_b;
892 u32 chain_noise_c;
893 u32 chain_signal_a;
894 u32 chain_signal_b;
895 u32 chain_signal_c;
896 u16 beacon_count;
897 u8 disconn_array[NUM_RX_CHAINS];
898 u8 delta_gain_code[NUM_RX_CHAINS];
899 u8 radio_write;
900 u8 state;
901 };
902
903 #define EEPROM_SEM_TIMEOUT 10 /* milliseconds */
904 #define EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */
905
906 #define IWL_TRAFFIC_ENTRIES (256)
907 #define IWL_TRAFFIC_ENTRY_SIZE (64)
908
909 enum {
910 MEASUREMENT_READY = (1 << 0),
911 MEASUREMENT_ACTIVE = (1 << 1),
912 };
913
914 enum iwl_nvm_type {
915 NVM_DEVICE_TYPE_EEPROM = 0,
916 NVM_DEVICE_TYPE_OTP,
917 };
918
919 /*
920 * Two types of OTP memory access modes
921 * IWL_OTP_ACCESS_ABSOLUTE - absolute address mode,
922 * based on physical memory addressing
923 * IWL_OTP_ACCESS_RELATIVE - relative address mode,
924 * based on logical memory addressing
925 */
926 enum iwl_access_mode {
927 IWL_OTP_ACCESS_ABSOLUTE,
928 IWL_OTP_ACCESS_RELATIVE,
929 };
930
931 /**
932 * enum iwl_pa_type - Power Amplifier type
933 * @IWL_PA_SYSTEM: based on uCode configuration
934 * @IWL_PA_INTERNAL: use Internal only
935 */
936 enum iwl_pa_type {
937 IWL_PA_SYSTEM = 0,
938 IWL_PA_INTERNAL = 1,
939 };
940
941 /* interrupt statistics */
942 struct isr_statistics {
943 u32 hw;
944 u32 sw;
945 u32 err_code;
946 u32 sch;
947 u32 alive;
948 u32 rfkill;
949 u32 ctkill;
950 u32 wakeup;
951 u32 rx;
952 u32 rx_handlers[REPLY_MAX];
953 u32 tx;
954 u32 unhandled;
955 };
956
957 /* reply_tx_statistics (for _agn devices) */
958 struct reply_tx_error_statistics {
959 u32 pp_delay;
960 u32 pp_few_bytes;
961 u32 pp_bt_prio;
962 u32 pp_quiet_period;
963 u32 pp_calc_ttak;
964 u32 int_crossed_retry;
965 u32 short_limit;
966 u32 long_limit;
967 u32 fifo_underrun;
968 u32 drain_flow;
969 u32 rfkill_flush;
970 u32 life_expire;
971 u32 dest_ps;
972 u32 host_abort;
973 u32 bt_retry;
974 u32 sta_invalid;
975 u32 frag_drop;
976 u32 tid_disable;
977 u32 fifo_flush;
978 u32 insuff_cf_poll;
979 u32 fail_hw_drop;
980 u32 sta_color_mismatch;
981 u32 unknown;
982 };
983
984 /* reply_agg_tx_statistics (for _agn devices) */
985 struct reply_agg_tx_error_statistics {
986 u32 underrun;
987 u32 bt_prio;
988 u32 few_bytes;
989 u32 abort;
990 u32 last_sent_ttl;
991 u32 last_sent_try;
992 u32 last_sent_bt_kill;
993 u32 scd_query;
994 u32 bad_crc32;
995 u32 response;
996 u32 dump_tx;
997 u32 delay_tx;
998 u32 unknown;
999 };
1000
1001 /* management statistics */
1002 enum iwl_mgmt_stats {
1003 MANAGEMENT_ASSOC_REQ = 0,
1004 MANAGEMENT_ASSOC_RESP,
1005 MANAGEMENT_REASSOC_REQ,
1006 MANAGEMENT_REASSOC_RESP,
1007 MANAGEMENT_PROBE_REQ,
1008 MANAGEMENT_PROBE_RESP,
1009 MANAGEMENT_BEACON,
1010 MANAGEMENT_ATIM,
1011 MANAGEMENT_DISASSOC,
1012 MANAGEMENT_AUTH,
1013 MANAGEMENT_DEAUTH,
1014 MANAGEMENT_ACTION,
1015 MANAGEMENT_MAX,
1016 };
1017 /* control statistics */
1018 enum iwl_ctrl_stats {
1019 CONTROL_BACK_REQ = 0,
1020 CONTROL_BACK,
1021 CONTROL_PSPOLL,
1022 CONTROL_RTS,
1023 CONTROL_CTS,
1024 CONTROL_ACK,
1025 CONTROL_CFEND,
1026 CONTROL_CFENDACK,
1027 CONTROL_MAX,
1028 };
1029
1030 struct traffic_stats {
1031 #ifdef CONFIG_IWLWIFI_DEBUGFS
1032 u32 mgmt[MANAGEMENT_MAX];
1033 u32 ctrl[CONTROL_MAX];
1034 u32 data_cnt;
1035 u64 data_bytes;
1036 #endif
1037 };
1038
1039 /*
1040 * iwl_switch_rxon: "channel switch" structure
1041 *
1042 * @ switch_in_progress: channel switch in progress
1043 * @ channel: new channel
1044 */
1045 struct iwl_switch_rxon {
1046 bool switch_in_progress;
1047 __le16 channel;
1048 };
1049
1050 /*
1051 * schedule the timer to wake up every UCODE_TRACE_PERIOD milliseconds
1052 * to perform continuous uCode event logging operation if enabled
1053 */
1054 #define UCODE_TRACE_PERIOD (100)
1055
1056 /*
1057 * iwl_event_log: current uCode event log position
1058 *
1059 * @ucode_trace: enable/disable ucode continuous trace timer
1060 * @num_wraps: how many times the event buffer wraps
1061 * @next_entry: the entry just before the next one that uCode would fill
1062 * @non_wraps_count: counter for no wrap detected when dump ucode events
1063 * @wraps_once_count: counter for wrap once detected when dump ucode events
1064 * @wraps_more_count: counter for wrap more than once detected
1065 * when dump ucode events
1066 */
1067 struct iwl_event_log {
1068 bool ucode_trace;
1069 u32 num_wraps;
1070 u32 next_entry;
1071 int non_wraps_count;
1072 int wraps_once_count;
1073 int wraps_more_count;
1074 };
1075
1076 /*
1077 * host interrupt timeout value
1078 * used with setting interrupt coalescing timer
1079 * the CSR_INT_COALESCING is an 8 bit register in 32-usec unit
1080 *
1081 * default interrupt coalescing timer is 64 x 32 = 2048 usecs
1082 * default interrupt coalescing calibration timer is 16 x 32 = 512 usecs
1083 */
1084 #define IWL_HOST_INT_TIMEOUT_MAX (0xFF)
1085 #define IWL_HOST_INT_TIMEOUT_DEF (0x40)
1086 #define IWL_HOST_INT_TIMEOUT_MIN (0x0)
1087 #define IWL_HOST_INT_CALIB_TIMEOUT_MAX (0xFF)
1088 #define IWL_HOST_INT_CALIB_TIMEOUT_DEF (0x10)
1089 #define IWL_HOST_INT_CALIB_TIMEOUT_MIN (0x0)
1090
1091 /*
1092 * This is the threshold value of plcp error rate per 100mSecs. It is
1093 * used to set and check for the validity of plcp_delta.
1094 */
1095 #define IWL_MAX_PLCP_ERR_THRESHOLD_MIN (1)
1096 #define IWL_MAX_PLCP_ERR_THRESHOLD_DEF (50)
1097 #define IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF (100)
1098 #define IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF (200)
1099 #define IWL_MAX_PLCP_ERR_THRESHOLD_MAX (255)
1100 #define IWL_MAX_PLCP_ERR_THRESHOLD_DISABLE (0)
1101
1102 #define IWL_DELAY_NEXT_FORCE_RF_RESET (HZ*3)
1103 #define IWL_DELAY_NEXT_FORCE_FW_RELOAD (HZ*5)
1104
1105 /* TX queue watchdog timeouts in mSecs */
1106 #define IWL_DEF_WD_TIMEOUT (2000)
1107 #define IWL_LONG_WD_TIMEOUT (10000)
1108 #define IWL_MAX_WD_TIMEOUT (120000)
1109
1110 /* BT Antenna Coupling Threshold (dB) */
1111 #define IWL_BT_ANTENNA_COUPLING_THRESHOLD (35)
1112
1113 /* Firmware reload counter and Timestamp */
1114 #define IWL_MIN_RELOAD_DURATION 1000 /* 1000 ms */
1115 #define IWL_MAX_CONTINUE_RELOAD_CNT 4
1116
1117
1118 enum iwl_reset {
1119 IWL_RF_RESET = 0,
1120 IWL_FW_RESET,
1121 IWL_MAX_FORCE_RESET,
1122 };
1123
1124 struct iwl_force_reset {
1125 int reset_request_count;
1126 int reset_success_count;
1127 int reset_reject_count;
1128 unsigned long reset_duration;
1129 unsigned long last_force_reset_jiffies;
1130 };
1131
1132 /* extend beacon time format bit shifting */
1133 /*
1134 * for _3945 devices
1135 * bits 31:24 - extended
1136 * bits 23:0 - interval
1137 */
1138 #define IWL3945_EXT_BEACON_TIME_POS 24
1139 /*
1140 * for _agn devices
1141 * bits 31:22 - extended
1142 * bits 21:0 - interval
1143 */
1144 #define IWLAGN_EXT_BEACON_TIME_POS 22
1145
1146 /**
1147 * struct iwl_notification_wait - notification wait entry
1148 * @list: list head for global list
1149 * @fn: function called with the notification
1150 * @cmd: command ID
1151 *
1152 * This structure is not used directly, to wait for a
1153 * notification declare it on the stack, and call
1154 * iwlagn_init_notification_wait() with appropriate
1155 * parameters. Then do whatever will cause the ucode
1156 * to notify the driver, and to wait for that then
1157 * call iwlagn_wait_notification().
1158 *
1159 * Each notification is one-shot. If at some point we
1160 * need to support multi-shot notifications (which
1161 * can't be allocated on the stack) we need to modify
1162 * the code for them.
1163 */
1164 struct iwl_notification_wait {
1165 struct list_head list;
1166
1167 void (*fn)(struct iwl_priv *priv, struct iwl_rx_packet *pkt);
1168
1169 u8 cmd;
1170 bool triggered;
1171 };
1172
1173 enum iwl_rxon_context_id {
1174 IWL_RXON_CTX_BSS,
1175 IWL_RXON_CTX_PAN,
1176
1177 NUM_IWL_RXON_CTX
1178 };
1179
1180 struct iwl_rxon_context {
1181 struct ieee80211_vif *vif;
1182
1183 const u8 *ac_to_fifo;
1184 const u8 *ac_to_queue;
1185 u8 mcast_queue;
1186
1187 /*
1188 * We could use the vif to indicate active, but we
1189 * also need it to be active during disabling when
1190 * we already removed the vif for type setting.
1191 */
1192 bool always_active, is_active;
1193
1194 bool ht_need_multiple_chains;
1195
1196 enum iwl_rxon_context_id ctxid;
1197
1198 u32 interface_modes, exclusive_interface_modes;
1199 u8 unused_devtype, ap_devtype, ibss_devtype, station_devtype;
1200
1201 /*
1202 * We declare this const so it can only be
1203 * changed via explicit cast within the
1204 * routines that actually update the physical
1205 * hardware.
1206 */
1207 const struct iwl_rxon_cmd active;
1208 struct iwl_rxon_cmd staging;
1209
1210 struct iwl_rxon_time_cmd timing;
1211
1212 struct iwl_qos_info qos_data;
1213
1214 u8 bcast_sta_id, ap_sta_id;
1215
1216 u8 rxon_cmd, rxon_assoc_cmd, rxon_timing_cmd;
1217 u8 qos_cmd;
1218 u8 wep_key_cmd;
1219
1220 struct iwl_wep_key wep_keys[WEP_KEYS_MAX];
1221 u8 key_mapping_keys;
1222
1223 __le32 station_flags;
1224
1225 struct {
1226 bool non_gf_sta_present;
1227 u8 protection;
1228 bool enabled, is_40mhz;
1229 u8 extension_chan_offset;
1230 } ht;
1231 };
1232
1233 enum iwl_scan_type {
1234 IWL_SCAN_NORMAL,
1235 IWL_SCAN_RADIO_RESET,
1236 IWL_SCAN_OFFCH_TX,
1237 };
1238
1239 struct iwl_priv {
1240
1241 /* ieee device used by generic ieee processing code */
1242 struct ieee80211_hw *hw;
1243 struct ieee80211_channel *ieee_channels;
1244 struct ieee80211_rate *ieee_rates;
1245 struct iwl_cfg *cfg;
1246
1247 /* temporary frame storage list */
1248 struct list_head free_frames;
1249 int frames_count;
1250
1251 enum ieee80211_band band;
1252 int alloc_rxb_page;
1253
1254 void (*rx_handlers[REPLY_MAX])(struct iwl_priv *priv,
1255 struct iwl_rx_mem_buffer *rxb);
1256
1257 struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS];
1258
1259 /* spectrum measurement report caching */
1260 struct iwl_spectrum_notification measure_report;
1261 u8 measurement_status;
1262
1263 /* ucode beacon time */
1264 u32 ucode_beacon_time;
1265 int missed_beacon_threshold;
1266
1267 /* track IBSS manager (last beacon) status */
1268 u32 ibss_manager;
1269
1270 /* jiffies when last recovery from statistics was performed */
1271 unsigned long rx_statistics_jiffies;
1272
1273 /* force reset */
1274 struct iwl_force_reset force_reset[IWL_MAX_FORCE_RESET];
1275
1276 /* firmware reload counter and timestamp */
1277 unsigned long reload_jiffies;
1278 int reload_count;
1279
1280 /* we allocate array of iwl_channel_info for NIC's valid channels.
1281 * Access via channel # using indirect index array */
1282 struct iwl_channel_info *channel_info; /* channel info array */
1283 u8 channel_count; /* # of channels */
1284
1285 /* thermal calibration */
1286 s32 temperature; /* degrees Kelvin */
1287 s32 last_temperature;
1288
1289 /* init calibration results */
1290 struct iwl_calib_result calib_results[IWL_CALIB_MAX];
1291
1292 /* Scan related variables */
1293 unsigned long scan_start;
1294 unsigned long scan_start_tsf;
1295 void *scan_cmd;
1296 enum ieee80211_band scan_band;
1297 struct cfg80211_scan_request *scan_request;
1298 struct ieee80211_vif *scan_vif;
1299 enum iwl_scan_type scan_type;
1300 u8 scan_tx_ant[IEEE80211_NUM_BANDS];
1301 u8 mgmt_tx_ant;
1302
1303 /* spinlock */
1304 spinlock_t lock; /* protect general shared data */
1305 spinlock_t hcmd_lock; /* protect hcmd */
1306 spinlock_t reg_lock; /* protect hw register access */
1307 struct mutex mutex;
1308 struct mutex sync_cmd_mutex; /* enable serialization of sync commands */
1309
1310 /* basic pci-network driver stuff */
1311 struct pci_dev *pci_dev;
1312
1313 /* pci hardware address support */
1314 void __iomem *hw_base;
1315 u32 hw_rev;
1316 u32 hw_wa_rev;
1317 u8 rev_id;
1318
1319 /* microcode/device supports multiple contexts */
1320 u8 valid_contexts;
1321
1322 /* command queue number */
1323 u8 cmd_queue;
1324
1325 /* max number of station keys */
1326 u8 sta_key_max_num;
1327
1328 /* EEPROM MAC addresses */
1329 struct mac_address addresses[2];
1330
1331 /* uCode images, save to reload in case of failure */
1332 int fw_index; /* firmware we're trying to load */
1333 u32 ucode_ver; /* version of ucode, copy of
1334 iwl_ucode.ver */
1335 struct fw_desc ucode_code; /* runtime inst */
1336 struct fw_desc ucode_data; /* runtime data original */
1337 struct fw_desc ucode_data_backup; /* runtime data save/restore */
1338 struct fw_desc ucode_init; /* initialization inst */
1339 struct fw_desc ucode_init_data; /* initialization data */
1340 struct fw_desc ucode_boot; /* bootstrap inst */
1341 enum ucode_type ucode_type;
1342 u8 ucode_write_complete; /* the image write is complete */
1343 char firmware_name[25];
1344
1345 struct iwl_rxon_context contexts[NUM_IWL_RXON_CTX];
1346
1347 struct iwl_switch_rxon switch_rxon;
1348
1349 /* 1st responses from initialize and runtime uCode images.
1350 * _agn's initialize alive response contains some calibration data. */
1351 struct iwl_init_alive_resp card_alive_init;
1352 struct iwl_alive_resp card_alive;
1353
1354 u16 active_rate;
1355
1356 u8 start_calib;
1357 struct iwl_sensitivity_data sensitivity_data;
1358 struct iwl_chain_noise_data chain_noise_data;
1359 bool enhance_sensitivity_table;
1360 __le16 sensitivity_tbl[HD_TABLE_SIZE];
1361 __le16 enhance_sensitivity_tbl[ENHANCE_HD_TABLE_ENTRIES];
1362
1363 struct iwl_ht_config current_ht_config;
1364
1365 /* Rate scaling data */
1366 u8 retry_rate;
1367
1368 wait_queue_head_t wait_command_queue;
1369
1370 int activity_timer_active;
1371
1372 /* Rx and Tx DMA processing queues */
1373 struct iwl_rx_queue rxq;
1374 struct iwl_tx_queue *txq;
1375 unsigned long txq_ctx_active_msk;
1376 struct iwl_dma_ptr kw; /* keep warm address */
1377 struct iwl_dma_ptr scd_bc_tbls;
1378
1379 u32 scd_base_addr; /* scheduler sram base address */
1380
1381 unsigned long status;
1382
1383 /* counts mgmt, ctl, and data packets */
1384 struct traffic_stats tx_stats;
1385 struct traffic_stats rx_stats;
1386
1387 /* counts interrupts */
1388 struct isr_statistics isr_stats;
1389
1390 struct iwl_power_mgr power_data;
1391 struct iwl_tt_mgmt thermal_throttle;
1392
1393 /* context information */
1394 u8 bssid[ETH_ALEN]; /* used only on 3945 but filled by core */
1395
1396 /* station table variables */
1397
1398 /* Note: if lock and sta_lock are needed, lock must be acquired first */
1399 spinlock_t sta_lock;
1400 int num_stations;
1401 struct iwl_station_entry stations[IWL_STATION_COUNT];
1402 unsigned long ucode_key_table;
1403
1404 /* queue refcounts */
1405 #define IWL_MAX_HW_QUEUES 32
1406 unsigned long queue_stopped[BITS_TO_LONGS(IWL_MAX_HW_QUEUES)];
1407 /* for each AC */
1408 atomic_t queue_stop_count[4];
1409
1410 /* Indication if ieee80211_ops->open has been called */
1411 u8 is_open;
1412
1413 u8 mac80211_registered;
1414
1415 /* eeprom -- this is in the card's little endian byte order */
1416 u8 *eeprom;
1417 int nvm_device_type;
1418 struct iwl_eeprom_calib_info *calib_info;
1419
1420 enum nl80211_iftype iw_mode;
1421
1422 /* Last Rx'd beacon timestamp */
1423 u64 timestamp;
1424
1425 union {
1426 #if defined(CONFIG_IWL3945) || defined(CONFIG_IWL3945_MODULE)
1427 struct {
1428 void *shared_virt;
1429 dma_addr_t shared_phys;
1430
1431 struct delayed_work thermal_periodic;
1432 struct delayed_work rfkill_poll;
1433
1434 struct iwl3945_notif_statistics statistics;
1435 #ifdef CONFIG_IWLWIFI_DEBUGFS
1436 struct iwl3945_notif_statistics accum_statistics;
1437 struct iwl3945_notif_statistics delta_statistics;
1438 struct iwl3945_notif_statistics max_delta;
1439 #endif
1440
1441 u32 sta_supp_rates;
1442 int last_rx_rssi; /* From Rx packet statistics */
1443
1444 /* Rx'd packet timing information */
1445 u32 last_beacon_time;
1446 u64 last_tsf;
1447
1448 /*
1449 * each calibration channel group in the
1450 * EEPROM has a derived clip setting for
1451 * each rate.
1452 */
1453 const struct iwl3945_clip_group clip_groups[5];
1454
1455 } _3945;
1456 #endif
1457 #if defined(CONFIG_IWLAGN) || defined(CONFIG_IWLAGN_MODULE)
1458 struct {
1459 /* INT ICT Table */
1460 __le32 *ict_tbl;
1461 void *ict_tbl_vir;
1462 dma_addr_t ict_tbl_dma;
1463 dma_addr_t aligned_ict_tbl_dma;
1464 int ict_index;
1465 u32 inta;
1466 bool use_ict;
1467 /*
1468 * reporting the number of tids has AGG on. 0 means
1469 * no AGGREGATION
1470 */
1471 u8 agg_tids_count;
1472
1473 struct iwl_rx_phy_res last_phy_res;
1474 bool last_phy_res_valid;
1475
1476 struct completion firmware_loading_complete;
1477
1478 u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr;
1479 u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr;
1480
1481 /*
1482 * chain noise reset and gain commands are the
1483 * two extra calibration commands follows the standard
1484 * phy calibration commands
1485 */
1486 u8 phy_calib_chain_noise_reset_cmd;
1487 u8 phy_calib_chain_noise_gain_cmd;
1488
1489 struct iwl_notif_statistics statistics;
1490 struct iwl_bt_notif_statistics statistics_bt;
1491 /* counts reply_tx error */
1492 struct reply_tx_error_statistics reply_tx_stats;
1493 struct reply_agg_tx_error_statistics reply_agg_tx_stats;
1494 #ifdef CONFIG_IWLWIFI_DEBUGFS
1495 struct iwl_notif_statistics accum_statistics;
1496 struct iwl_notif_statistics delta_statistics;
1497 struct iwl_notif_statistics max_delta;
1498 struct iwl_bt_notif_statistics accum_statistics_bt;
1499 struct iwl_bt_notif_statistics delta_statistics_bt;
1500 struct iwl_bt_notif_statistics max_delta_bt;
1501 #endif
1502
1503 /* notification wait support */
1504 struct list_head notif_waits;
1505 spinlock_t notif_wait_lock;
1506 wait_queue_head_t notif_waitq;
1507
1508 /* remain-on-channel offload support */
1509 struct ieee80211_channel *hw_roc_channel;
1510 struct delayed_work hw_roc_work;
1511 enum nl80211_channel_type hw_roc_chantype;
1512 int hw_roc_duration;
1513
1514 struct sk_buff *offchan_tx_skb;
1515 int offchan_tx_timeout;
1516 struct ieee80211_channel *offchan_tx_chan;
1517 } _agn;
1518 #endif
1519 };
1520
1521 /* bt coex */
1522 u8 bt_enable_flag;
1523 u8 bt_status;
1524 u8 bt_traffic_load, last_bt_traffic_load;
1525 bool bt_ch_announce;
1526 bool bt_full_concurrent;
1527 bool bt_ant_couple_ok;
1528 __le32 kill_ack_mask;
1529 __le32 kill_cts_mask;
1530 __le16 bt_valid;
1531 u16 bt_on_thresh;
1532 u16 bt_duration;
1533 u16 dynamic_frag_thresh;
1534 u8 bt_ci_compliance;
1535 struct work_struct bt_traffic_change_work;
1536
1537 struct iwl_hw_params hw_params;
1538
1539 u32 inta_mask;
1540
1541 struct workqueue_struct *workqueue;
1542
1543 struct work_struct restart;
1544 struct work_struct scan_completed;
1545 struct work_struct rx_replenish;
1546 struct work_struct abort_scan;
1547
1548 struct work_struct beacon_update;
1549 struct iwl_rxon_context *beacon_ctx;
1550 struct sk_buff *beacon_skb;
1551
1552 struct work_struct tt_work;
1553 struct work_struct ct_enter;
1554 struct work_struct ct_exit;
1555 struct work_struct start_internal_scan;
1556 struct work_struct tx_flush;
1557 struct work_struct bt_full_concurrency;
1558 struct work_struct bt_runtime_config;
1559
1560 struct tasklet_struct irq_tasklet;
1561
1562 struct delayed_work init_alive_start;
1563 struct delayed_work alive_start;
1564 struct delayed_work scan_check;
1565
1566 /* TX Power */
1567 s8 tx_power_user_lmt;
1568 s8 tx_power_device_lmt;
1569 s8 tx_power_lmt_in_half_dbm; /* max tx power in half-dBm format */
1570 s8 tx_power_next;
1571
1572
1573 #ifdef CONFIG_IWLWIFI_DEBUG
1574 /* debugging info */
1575 u32 debug_level; /* per device debugging will override global
1576 iwl_debug_level if set */
1577 #endif /* CONFIG_IWLWIFI_DEBUG */
1578 #ifdef CONFIG_IWLWIFI_DEBUGFS
1579 /* debugfs */
1580 u16 tx_traffic_idx;
1581 u16 rx_traffic_idx;
1582 u8 *tx_traffic;
1583 u8 *rx_traffic;
1584 struct dentry *debugfs_dir;
1585 u32 dbgfs_sram_offset, dbgfs_sram_len;
1586 bool disable_ht40;
1587 #endif /* CONFIG_IWLWIFI_DEBUGFS */
1588
1589 struct work_struct txpower_work;
1590 u32 disable_sens_cal;
1591 u32 disable_chain_noise_cal;
1592 u32 disable_tx_power_cal;
1593 struct work_struct run_time_calib_work;
1594 struct timer_list statistics_periodic;
1595 struct timer_list ucode_trace;
1596 struct timer_list watchdog;
1597 bool hw_ready;
1598
1599 struct iwl_event_log event_log;
1600
1601 struct led_classdev led;
1602 unsigned long blink_on, blink_off;
1603 bool led_registered;
1604 }; /*iwl_priv */
1605
iwl_txq_ctx_activate(struct iwl_priv * priv,int txq_id)1606 static inline void iwl_txq_ctx_activate(struct iwl_priv *priv, int txq_id)
1607 {
1608 set_bit(txq_id, &priv->txq_ctx_active_msk);
1609 }
1610
iwl_txq_ctx_deactivate(struct iwl_priv * priv,int txq_id)1611 static inline void iwl_txq_ctx_deactivate(struct iwl_priv *priv, int txq_id)
1612 {
1613 clear_bit(txq_id, &priv->txq_ctx_active_msk);
1614 }
1615
1616 #ifdef CONFIG_IWLWIFI_DEBUG
1617 /*
1618 * iwl_get_debug_level: Return active debug level for device
1619 *
1620 * Using sysfs it is possible to set per device debug level. This debug
1621 * level will be used if set, otherwise the global debug level which can be
1622 * set via module parameter is used.
1623 */
iwl_get_debug_level(struct iwl_priv * priv)1624 static inline u32 iwl_get_debug_level(struct iwl_priv *priv)
1625 {
1626 if (priv->debug_level)
1627 return priv->debug_level;
1628 else
1629 return iwl_debug_level;
1630 }
1631 #else
iwl_get_debug_level(struct iwl_priv * priv)1632 static inline u32 iwl_get_debug_level(struct iwl_priv *priv)
1633 {
1634 return iwl_debug_level;
1635 }
1636 #endif
1637
1638
iwl_tx_queue_get_hdr(struct iwl_priv * priv,int txq_id,int idx)1639 static inline struct ieee80211_hdr *iwl_tx_queue_get_hdr(struct iwl_priv *priv,
1640 int txq_id, int idx)
1641 {
1642 if (priv->txq[txq_id].txb[idx].skb)
1643 return (struct ieee80211_hdr *)priv->txq[txq_id].
1644 txb[idx].skb->data;
1645 return NULL;
1646 }
1647
1648 static inline struct iwl_rxon_context *
iwl_rxon_ctx_from_vif(struct ieee80211_vif * vif)1649 iwl_rxon_ctx_from_vif(struct ieee80211_vif *vif)
1650 {
1651 struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
1652
1653 return vif_priv->ctx;
1654 }
1655
1656 #define for_each_context(priv, ctx) \
1657 for (ctx = &priv->contexts[IWL_RXON_CTX_BSS]; \
1658 ctx < &priv->contexts[NUM_IWL_RXON_CTX]; ctx++) \
1659 if (priv->valid_contexts & BIT(ctx->ctxid))
1660
iwl_is_associated(struct iwl_priv * priv,enum iwl_rxon_context_id ctxid)1661 static inline int iwl_is_associated(struct iwl_priv *priv,
1662 enum iwl_rxon_context_id ctxid)
1663 {
1664 return (priv->contexts[ctxid].active.filter_flags &
1665 RXON_FILTER_ASSOC_MSK) ? 1 : 0;
1666 }
1667
iwl_is_any_associated(struct iwl_priv * priv)1668 static inline int iwl_is_any_associated(struct iwl_priv *priv)
1669 {
1670 return iwl_is_associated(priv, IWL_RXON_CTX_BSS);
1671 }
1672
iwl_is_associated_ctx(struct iwl_rxon_context * ctx)1673 static inline int iwl_is_associated_ctx(struct iwl_rxon_context *ctx)
1674 {
1675 return (ctx->active.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0;
1676 }
1677
is_channel_valid(const struct iwl_channel_info * ch_info)1678 static inline int is_channel_valid(const struct iwl_channel_info *ch_info)
1679 {
1680 if (ch_info == NULL)
1681 return 0;
1682 return (ch_info->flags & EEPROM_CHANNEL_VALID) ? 1 : 0;
1683 }
1684
is_channel_radar(const struct iwl_channel_info * ch_info)1685 static inline int is_channel_radar(const struct iwl_channel_info *ch_info)
1686 {
1687 return (ch_info->flags & EEPROM_CHANNEL_RADAR) ? 1 : 0;
1688 }
1689
is_channel_a_band(const struct iwl_channel_info * ch_info)1690 static inline u8 is_channel_a_band(const struct iwl_channel_info *ch_info)
1691 {
1692 return ch_info->band == IEEE80211_BAND_5GHZ;
1693 }
1694
is_channel_bg_band(const struct iwl_channel_info * ch_info)1695 static inline u8 is_channel_bg_band(const struct iwl_channel_info *ch_info)
1696 {
1697 return ch_info->band == IEEE80211_BAND_2GHZ;
1698 }
1699
is_channel_passive(const struct iwl_channel_info * ch)1700 static inline int is_channel_passive(const struct iwl_channel_info *ch)
1701 {
1702 return (!(ch->flags & EEPROM_CHANNEL_ACTIVE)) ? 1 : 0;
1703 }
1704
is_channel_ibss(const struct iwl_channel_info * ch)1705 static inline int is_channel_ibss(const struct iwl_channel_info *ch)
1706 {
1707 return ((ch->flags & EEPROM_CHANNEL_IBSS)) ? 1 : 0;
1708 }
1709
__iwl_free_pages(struct iwl_priv * priv,struct page * page)1710 static inline void __iwl_free_pages(struct iwl_priv *priv, struct page *page)
1711 {
1712 __free_pages(page, priv->hw_params.rx_page_order);
1713 priv->alloc_rxb_page--;
1714 }
1715
iwl_free_pages(struct iwl_priv * priv,unsigned long page)1716 static inline void iwl_free_pages(struct iwl_priv *priv, unsigned long page)
1717 {
1718 free_pages(page, priv->hw_params.rx_page_order);
1719 priv->alloc_rxb_page--;
1720 }
1721 #endif /* __iwl_dev_h__ */
1722