1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  *
4  * isar.h   ISAR (Siemens PSB 7110) specific defines
5  *
6  * Author Karsten Keil (keil@isdn4linux.de)
7  *
8  * Copyright 2009  by Karsten Keil <keil@isdn4linux.de>
9  */
10 
11 #include "iohelper.h"
12 
13 struct isar_hw;
14 
15 struct isar_ch {
16 	struct bchannel		bch;
17 	struct isar_hw		*is;
18 	struct timer_list	ftimer;
19 	u8			nr;
20 	u8			dpath;
21 	u8			mml;
22 	u8			state;
23 	u8			cmd;
24 	u8			mod;
25 	u8			newcmd;
26 	u8			newmod;
27 	u8			try_mod;
28 	u8			conmsg[16];
29 };
30 
31 struct isar_hw {
32 	struct	isar_ch	ch[2];
33 	void		*hw;
34 	spinlock_t	*hwlock;	/* lock HW access */
35 	char		*name;
36 	struct module	*owner;
37 	read_reg_func	*read_reg;
38 	write_reg_func	*write_reg;
39 	fifo_func	*read_fifo;
40 	fifo_func	*write_fifo;
41 	int		(*ctrl)(void *, u32, u_long);
42 	void		(*release)(struct isar_hw *);
43 	int		(*init)(struct isar_hw *);
44 	int		(*open)(struct isar_hw *, struct channel_req *);
45 	int		(*firmware)(struct isar_hw *, const u8 *, int);
46 	unsigned long	Flags;
47 	int		version;
48 	u8		bstat;
49 	u8		iis;
50 	u8		cmsb;
51 	u8		clsb;
52 	u8		buf[256];
53 	u8		log[256];
54 };
55 
56 #define ISAR_IRQMSK	0x04
57 #define ISAR_IRQSTA	0x04
58 #define ISAR_IRQBIT	0x75
59 #define ISAR_CTRL_H	0x61
60 #define ISAR_CTRL_L	0x60
61 #define ISAR_IIS	0x58
62 #define ISAR_IIA	0x58
63 #define ISAR_HIS	0x50
64 #define ISAR_HIA	0x50
65 #define ISAR_MBOX	0x4c
66 #define ISAR_WADR	0x4a
67 #define ISAR_RADR	0x48
68 
69 #define ISAR_HIS_VNR		0x14
70 #define ISAR_HIS_DKEY		0x02
71 #define ISAR_HIS_FIRM		0x1e
72 #define ISAR_HIS_STDSP		0x08
73 #define ISAR_HIS_DIAG		0x05
74 #define ISAR_HIS_P0CFG		0x3c
75 #define ISAR_HIS_P12CFG		0x24
76 #define ISAR_HIS_SARTCFG	0x25
77 #define ISAR_HIS_PUMPCFG	0x26
78 #define ISAR_HIS_PUMPCTRL	0x2a
79 #define ISAR_HIS_IOM2CFG	0x27
80 #define ISAR_HIS_IOM2REQ	0x07
81 #define ISAR_HIS_IOM2CTRL	0x2b
82 #define ISAR_HIS_BSTREQ		0x0c
83 #define ISAR_HIS_PSTREQ		0x0e
84 #define ISAR_HIS_SDATA		0x20
85 #define ISAR_HIS_DPS1		0x40
86 #define ISAR_HIS_DPS2		0x80
87 #define SET_DPS(x)		((x << 6) & 0xc0)
88 
89 #define ISAR_IIS_MSCMSD		0x3f
90 #define ISAR_IIS_VNR		0x15
91 #define ISAR_IIS_DKEY		0x03
92 #define ISAR_IIS_FIRM		0x1f
93 #define ISAR_IIS_STDSP		0x09
94 #define ISAR_IIS_DIAG		0x25
95 #define ISAR_IIS_GSTEV		0x00
96 #define ISAR_IIS_BSTEV		0x28
97 #define ISAR_IIS_BSTRSP		0x2c
98 #define ISAR_IIS_PSTRSP		0x2e
99 #define ISAR_IIS_PSTEV		0x2a
100 #define ISAR_IIS_IOM2RSP	0x27
101 #define ISAR_IIS_RDATA		0x20
102 #define ISAR_IIS_INVMSG		0x3f
103 
104 #define ISAR_CTRL_SWVER	0x10
105 #define ISAR_CTRL_STST	0x40
106 
107 #define ISAR_MSG_HWVER	0x20
108 
109 #define ISAR_DP1_USE	1
110 #define ISAR_DP2_USE	2
111 #define ISAR_RATE_REQ	3
112 
113 #define PMOD_DISABLE	0
114 #define PMOD_FAX	1
115 #define PMOD_DATAMODEM	2
116 #define PMOD_HALFDUPLEX	3
117 #define PMOD_V110	4
118 #define PMOD_DTMF	5
119 #define PMOD_DTMF_TRANS	6
120 #define PMOD_BYPASS	7
121 
122 #define PCTRL_ORIG	0x80
123 #define PV32P2_V23R	0x40
124 #define PV32P2_V22A	0x20
125 #define PV32P2_V22B	0x10
126 #define PV32P2_V22C	0x08
127 #define PV32P2_V21	0x02
128 #define PV32P2_BEL	0x01
129 
130 /* LSB MSB in ISAR doc wrong !!! Arghhh */
131 #define PV32P3_AMOD	0x80
132 #define PV32P3_V32B	0x02
133 #define PV32P3_V23B	0x01
134 #define PV32P4_48	0x11
135 #define PV32P5_48	0x05
136 #define PV32P4_UT48	0x11
137 #define PV32P5_UT48	0x0d
138 #define PV32P4_96	0x11
139 #define PV32P5_96	0x03
140 #define PV32P4_UT96	0x11
141 #define PV32P5_UT96	0x0f
142 #define PV32P4_B96	0x91
143 #define PV32P5_B96	0x0b
144 #define PV32P4_UTB96	0xd1
145 #define PV32P5_UTB96	0x0f
146 #define PV32P4_120	0xb1
147 #define PV32P5_120	0x09
148 #define PV32P4_UT120	0xf1
149 #define PV32P5_UT120	0x0f
150 #define PV32P4_144	0x99
151 #define PV32P5_144	0x09
152 #define PV32P4_UT144	0xf9
153 #define PV32P5_UT144	0x0f
154 #define PV32P6_CTN	0x01
155 #define PV32P6_ATN	0x02
156 
157 #define PFAXP2_CTN	0x01
158 #define PFAXP2_ATN	0x04
159 
160 #define PSEV_10MS_TIMER	0x02
161 #define PSEV_CON_ON	0x18
162 #define PSEV_CON_OFF	0x19
163 #define PSEV_V24_OFF	0x20
164 #define PSEV_CTS_ON	0x21
165 #define PSEV_CTS_OFF	0x22
166 #define PSEV_DCD_ON	0x23
167 #define PSEV_DCD_OFF	0x24
168 #define PSEV_DSR_ON	0x25
169 #define PSEV_DSR_OFF	0x26
170 #define PSEV_REM_RET	0xcc
171 #define PSEV_REM_REN	0xcd
172 #define PSEV_GSTN_CLR	0xd4
173 
174 #define PSEV_RSP_READY	0xbc
175 #define PSEV_LINE_TX_H	0xb3
176 #define PSEV_LINE_TX_B	0xb2
177 #define PSEV_LINE_RX_H	0xb1
178 #define PSEV_LINE_RX_B	0xb0
179 #define PSEV_RSP_CONN	0xb5
180 #define PSEV_RSP_DISC	0xb7
181 #define PSEV_RSP_FCERR	0xb9
182 #define PSEV_RSP_SILDET	0xbe
183 #define PSEV_RSP_SILOFF	0xab
184 #define PSEV_FLAGS_DET	0xba
185 
186 #define PCTRL_CMD_TDTMF	0x5a
187 
188 #define PCTRL_CMD_FTH	0xa7
189 #define PCTRL_CMD_FRH	0xa5
190 #define PCTRL_CMD_FTM	0xa8
191 #define PCTRL_CMD_FRM	0xa6
192 #define PCTRL_CMD_SILON	0xac
193 #define PCTRL_CMD_CONT	0xa2
194 #define PCTRL_CMD_ESC	0xa4
195 #define PCTRL_CMD_SILOFF 0xab
196 #define PCTRL_CMD_HALT	0xa9
197 
198 #define PCTRL_LOC_RET	0xcf
199 #define PCTRL_LOC_REN	0xce
200 
201 #define SMODE_DISABLE	0
202 #define SMODE_V14	2
203 #define SMODE_HDLC	3
204 #define SMODE_BINARY	4
205 #define SMODE_FSK_V14	5
206 
207 #define SCTRL_HDMC_BOTH	0x00
208 #define SCTRL_HDMC_DTX	0x80
209 #define SCTRL_HDMC_DRX	0x40
210 #define S_P1_OVSP	0x40
211 #define S_P1_SNP	0x20
212 #define S_P1_EOP	0x10
213 #define S_P1_EDP	0x08
214 #define S_P1_NSB	0x04
215 #define S_P1_CHS_8	0x03
216 #define S_P1_CHS_7	0x02
217 #define S_P1_CHS_6	0x01
218 #define S_P1_CHS_5	0x00
219 
220 #define S_P2_BFT_DEF	0x10
221 
222 #define IOM_CTRL_ENA	0x80
223 #define IOM_CTRL_NOPCM	0x00
224 #define IOM_CTRL_ALAW	0x02
225 #define IOM_CTRL_ULAW	0x04
226 #define IOM_CTRL_RCV	0x01
227 
228 #define IOM_P1_TXD	0x10
229 
230 #define HDLC_FED	0x40
231 #define HDLC_FSD	0x20
232 #define HDLC_FST	0x20
233 #define HDLC_ERROR	0x1c
234 #define HDLC_ERR_FAD	0x10
235 #define HDLC_ERR_RER	0x08
236 #define HDLC_ERR_CER	0x04
237 #define SART_NMD	0x01
238 
239 #define BSTAT_RDM0	0x1
240 #define BSTAT_RDM1	0x2
241 #define BSTAT_RDM2	0x4
242 #define BSTAT_RDM3	0x8
243 #define BSTEV_TBO	0x1f
244 #define BSTEV_RBO	0x2f
245 
246 /* FAX State Machine */
247 #define STFAX_NULL	0
248 #define STFAX_READY	1
249 #define STFAX_LINE	2
250 #define STFAX_CONT	3
251 #define STFAX_ACTIV	4
252 #define STFAX_ESCAPE	5
253 #define STFAX_SILDET	6
254 
255 extern u32 mISDNisar_init(struct isar_hw *, void *);
256 extern void mISDNisar_irq(struct isar_hw *);
257