1 /* $Id: isar.c,v 1.1.4.1 2001/11/20 14:19:36 kai Exp $
2 *
3 * isar.c ISAR (Siemens PSB 7110) specific routines
4 *
5 * Author Karsten Keil (keil@isdn4linux.de)
6 *
7 * This file is (c) under GNU General Public License
8 *
9 */
10
11 #define __NO_VERSION__
12 #include <linux/init.h>
13 #include "hisax.h"
14 #include "isar.h"
15 #include "isdnl1.h"
16 #include <linux/interrupt.h>
17
18 #define DBG_LOADFIRM 0
19 #define DUMP_MBOXFRAME 2
20
21 #define DLE 0x10
22 #define ETX 0x03
23
24 #define FAXMODCNT 13
25 const u_char faxmodulation[] = {3,24,48,72,73,74,96,97,98,121,122,145,146};
26 static u_int modmask = 0x1fff;
27 static int frm_extra_delay = 2;
28 static int para_TOA = 6;
29 const u_char *FC1_CMD[] = {"FAE", "FTS", "FRS", "FTM", "FRM", "FTH", "FRH", "CTRL" };
30
31 void isar_setup(struct IsdnCardState *cs);
32 static void isar_pump_cmd(struct BCState *bcs, u_char cmd, u_char para);
33 static inline void ll_deliver_faxstat(struct BCState *bcs, u_char status);
34
35 static inline int
waitforHIA(struct IsdnCardState * cs,int timeout)36 waitforHIA(struct IsdnCardState *cs, int timeout)
37 {
38
39 while ((cs->BC_Read_Reg(cs, 0, ISAR_HIA) & 1) && timeout) {
40 udelay(1);
41 timeout--;
42 }
43 if (!timeout)
44 printk(KERN_WARNING "HiSax: ISAR waitforHIA timeout\n");
45 return(timeout);
46 }
47
48
49 int
sendmsg(struct IsdnCardState * cs,u_char his,u_char creg,u_char len,u_char * msg)50 sendmsg(struct IsdnCardState *cs, u_char his, u_char creg, u_char len,
51 u_char *msg)
52 {
53 long flags;
54 int i;
55
56 if (!waitforHIA(cs, 4000))
57 return(0);
58 #if DUMP_MBOXFRAME
59 if (cs->debug & L1_DEB_HSCX)
60 debugl1(cs, "sendmsg(%02x,%02x,%d)", his, creg, len);
61 #endif
62 save_flags(flags);
63 cli();
64 cs->BC_Write_Reg(cs, 0, ISAR_CTRL_H, creg);
65 cs->BC_Write_Reg(cs, 0, ISAR_CTRL_L, len);
66 cs->BC_Write_Reg(cs, 0, ISAR_WADR, 0);
67 if (msg && len) {
68 cs->BC_Write_Reg(cs, 1, ISAR_MBOX, msg[0]);
69 for (i=1; i<len; i++)
70 cs->BC_Write_Reg(cs, 2, ISAR_MBOX, msg[i]);
71 #if DUMP_MBOXFRAME>1
72 if (cs->debug & L1_DEB_HSCX_FIFO) {
73 char tmp[256], *t;
74
75 i = len;
76 while (i>0) {
77 t = tmp;
78 t += sprintf(t, "sendmbox cnt %d", len);
79 QuickHex(t, &msg[len-i], (i>64) ? 64:i);
80 debugl1(cs, tmp);
81 i -= 64;
82 }
83 }
84 #endif
85 }
86 cs->BC_Write_Reg(cs, 1, ISAR_HIS, his);
87 restore_flags(flags);
88 waitforHIA(cs, 10000);
89 return(1);
90 }
91
92 /* Call only with IRQ disabled !!! */
93 inline void
rcv_mbox(struct IsdnCardState * cs,struct isar_reg * ireg,u_char * msg)94 rcv_mbox(struct IsdnCardState *cs, struct isar_reg *ireg, u_char *msg)
95 {
96 int i;
97
98 cs->BC_Write_Reg(cs, 1, ISAR_RADR, 0);
99 if (msg && ireg->clsb) {
100 msg[0] = cs->BC_Read_Reg(cs, 1, ISAR_MBOX);
101 for (i=1; i < ireg->clsb; i++)
102 msg[i] = cs->BC_Read_Reg(cs, 2, ISAR_MBOX);
103 #if DUMP_MBOXFRAME>1
104 if (cs->debug & L1_DEB_HSCX_FIFO) {
105 char tmp[256], *t;
106
107 i = ireg->clsb;
108 while (i>0) {
109 t = tmp;
110 t += sprintf(t, "rcv_mbox cnt %d", ireg->clsb);
111 QuickHex(t, &msg[ireg->clsb-i], (i>64) ? 64:i);
112 debugl1(cs, tmp);
113 i -= 64;
114 }
115 }
116 #endif
117 }
118 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
119 }
120
121 /* Call only with IRQ disabled !!! */
122 inline void
get_irq_infos(struct IsdnCardState * cs,struct isar_reg * ireg)123 get_irq_infos(struct IsdnCardState *cs, struct isar_reg *ireg)
124 {
125 ireg->iis = cs->BC_Read_Reg(cs, 1, ISAR_IIS);
126 ireg->cmsb = cs->BC_Read_Reg(cs, 1, ISAR_CTRL_H);
127 ireg->clsb = cs->BC_Read_Reg(cs, 1, ISAR_CTRL_L);
128 #if DUMP_MBOXFRAME
129 if (cs->debug & L1_DEB_HSCX)
130 debugl1(cs, "irq_stat(%02x,%02x,%d)", ireg->iis, ireg->cmsb,
131 ireg->clsb);
132 #endif
133 }
134
135 int
waitrecmsg(struct IsdnCardState * cs,u_char * len,u_char * msg,int maxdelay)136 waitrecmsg(struct IsdnCardState *cs, u_char *len,
137 u_char *msg, int maxdelay)
138 {
139 int timeout = 0;
140 long flags;
141 struct isar_reg *ir = cs->bcs[0].hw.isar.reg;
142
143
144 while((!(cs->BC_Read_Reg(cs, 0, ISAR_IRQBIT) & ISAR_IRQSTA)) &&
145 (timeout++ < maxdelay))
146 udelay(1);
147 if (timeout >= maxdelay) {
148 printk(KERN_WARNING"isar recmsg IRQSTA timeout\n");
149 return(0);
150 }
151 save_flags(flags);
152 cli();
153 get_irq_infos(cs, ir);
154 rcv_mbox(cs, ir, msg);
155 *len = ir->clsb;
156 restore_flags(flags);
157 return(1);
158 }
159
160 int
ISARVersion(struct IsdnCardState * cs,char * s)161 ISARVersion(struct IsdnCardState *cs, char *s)
162 {
163 int ver;
164 u_char msg[] = ISAR_MSG_HWVER;
165 u_char tmp[64];
166 u_char len;
167 int debug;
168
169 cs->cardmsg(cs, CARD_RESET, NULL);
170 /* disable ISAR IRQ */
171 cs->BC_Write_Reg(cs, 0, ISAR_IRQBIT, 0);
172 debug = cs->debug;
173 cs->debug &= ~(L1_DEB_HSCX | L1_DEB_HSCX_FIFO);
174 if (!sendmsg(cs, ISAR_HIS_VNR, 0, 3, msg))
175 return(-1);
176 if (!waitrecmsg(cs, &len, tmp, 100000))
177 return(-2);
178 cs->debug = debug;
179 if (cs->bcs[0].hw.isar.reg->iis == ISAR_IIS_VNR) {
180 if (len == 1) {
181 ver = tmp[0] & 0xf;
182 printk(KERN_INFO "%s ISAR version %d\n", s, ver);
183 return(ver);
184 }
185 return(-3);
186 }
187 return(-4);
188 }
189
190 int
isar_load_firmware(struct IsdnCardState * cs,u_char * buf)191 isar_load_firmware(struct IsdnCardState *cs, u_char *buf)
192 {
193 int ret, size, cnt, debug;
194 u_char len, nom, noc;
195 u_short sadr, left, *sp;
196 u_char *p = buf;
197 u_char *msg, *tmpmsg, *mp, tmp[64];
198 long flags;
199 struct isar_reg *ireg = cs->bcs[0].hw.isar.reg;
200
201 struct {u_short sadr;
202 u_short len;
203 u_short d_key;
204 } blk_head;
205
206 #define BLK_HEAD_SIZE 6
207 if (1 != (ret = ISARVersion(cs, "Testing"))) {
208 printk(KERN_ERR"isar_load_firmware wrong isar version %d\n", ret);
209 return(1);
210 }
211 debug = cs->debug;
212 #if DBG_LOADFIRM<2
213 cs->debug &= ~(L1_DEB_HSCX | L1_DEB_HSCX_FIFO);
214 #endif
215 printk(KERN_DEBUG"isar_load_firmware buf %#lx\n", (u_long)buf);
216 if ((ret = verify_area(VERIFY_READ, (void *) p, sizeof(int)))) {
217 printk(KERN_ERR"isar_load_firmware verify_area ret %d\n", ret);
218 return ret;
219 }
220 if ((ret = copy_from_user(&size, p, sizeof(int)))) {
221 printk(KERN_ERR"isar_load_firmware copy_from_user ret %d\n", ret);
222 return ret;
223 }
224 p += sizeof(int);
225 printk(KERN_DEBUG"isar_load_firmware size: %d\n", size);
226 if ((ret = verify_area(VERIFY_READ, (void *) p, size))) {
227 printk(KERN_ERR"isar_load_firmware verify_area ret %d\n", ret);
228 return ret;
229 }
230 cnt = 0;
231 /* disable ISAR IRQ */
232 cs->BC_Write_Reg(cs, 0, ISAR_IRQBIT, 0);
233 if (!(msg = kmalloc(256, GFP_KERNEL))) {
234 printk(KERN_ERR"isar_load_firmware no buffer\n");
235 return (1);
236 }
237 if (!(tmpmsg = kmalloc(256, GFP_KERNEL))) {
238 printk(KERN_ERR"isar_load_firmware no tmp buffer\n");
239 kfree(msg);
240 return (1);
241 }
242 while (cnt < size) {
243 if ((ret = copy_from_user(&blk_head, p, BLK_HEAD_SIZE))) {
244 printk(KERN_ERR"isar_load_firmware copy_from_user ret %d\n", ret);
245 goto reterror;
246 }
247 #ifdef __BIG_ENDIAN
248 sadr = (blk_head.sadr & 0xff)*256 + blk_head.sadr/256;
249 blk_head.sadr = sadr;
250 sadr = (blk_head.len & 0xff)*256 + blk_head.len/256;
251 blk_head.len = sadr;
252 sadr = (blk_head.d_key & 0xff)*256 + blk_head.d_key/256;
253 blk_head.d_key = sadr;
254 #endif /* __BIG_ENDIAN */
255 cnt += BLK_HEAD_SIZE;
256 p += BLK_HEAD_SIZE;
257 printk(KERN_DEBUG"isar firmware block (%#x,%5d,%#x)\n",
258 blk_head.sadr, blk_head.len, blk_head.d_key & 0xff);
259 sadr = blk_head.sadr;
260 left = blk_head.len;
261 if (!sendmsg(cs, ISAR_HIS_DKEY, blk_head.d_key & 0xff, 0, NULL)) {
262 printk(KERN_ERR"isar sendmsg dkey failed\n");
263 ret = 1;goto reterror;
264 }
265 if (!waitrecmsg(cs, &len, tmp, 100000)) {
266 printk(KERN_ERR"isar waitrecmsg dkey failed\n");
267 ret = 1;goto reterror;
268 }
269 if ((ireg->iis != ISAR_IIS_DKEY) || ireg->cmsb || len) {
270 printk(KERN_ERR"isar wrong dkey response (%x,%x,%x)\n",
271 ireg->iis, ireg->cmsb, len);
272 ret = 1;goto reterror;
273 }
274 while (left>0) {
275 if (left > 126)
276 noc = 126;
277 else
278 noc = left;
279 nom = 2*noc;
280 mp = msg;
281 *mp++ = sadr / 256;
282 *mp++ = sadr % 256;
283 left -= noc;
284 *mp++ = noc;
285 if ((ret = copy_from_user(tmpmsg, p, nom))) {
286 printk(KERN_ERR"isar_load_firmware copy_from_user ret %d\n", ret);
287 goto reterror;
288 }
289 p += nom;
290 cnt += nom;
291 nom += 3;
292 sp = (u_short *)tmpmsg;
293 #if DBG_LOADFIRM
294 printk(KERN_DEBUG"isar: load %3d words at %04x left %d\n",
295 noc, sadr, left);
296 #endif
297 sadr += noc;
298 while(noc) {
299 #ifdef __BIG_ENDIAN
300 *mp++ = *sp % 256;
301 *mp++ = *sp / 256;
302 #else
303 *mp++ = *sp / 256;
304 *mp++ = *sp % 256;
305 #endif /* __BIG_ENDIAN */
306 sp++;
307 noc--;
308 }
309 if (!sendmsg(cs, ISAR_HIS_FIRM, 0, nom, msg)) {
310 printk(KERN_ERR"isar sendmsg prog failed\n");
311 ret = 1;goto reterror;
312 }
313 if (!waitrecmsg(cs, &len, tmp, 100000)) {
314 printk(KERN_ERR"isar waitrecmsg prog failed\n");
315 ret = 1;goto reterror;
316 }
317 if ((ireg->iis != ISAR_IIS_FIRM) || ireg->cmsb || len) {
318 printk(KERN_ERR"isar wrong prog response (%x,%x,%x)\n",
319 ireg->iis, ireg->cmsb, len);
320 ret = 1;goto reterror;
321 }
322 }
323 printk(KERN_DEBUG"isar firmware block %5d words loaded\n",
324 blk_head.len);
325 }
326 /* 10ms delay */
327 cnt = 10;
328 while (cnt--)
329 udelay(1000);
330 msg[0] = 0xff;
331 msg[1] = 0xfe;
332 ireg->bstat = 0;
333 if (!sendmsg(cs, ISAR_HIS_STDSP, 0, 2, msg)) {
334 printk(KERN_ERR"isar sendmsg start dsp failed\n");
335 ret = 1;goto reterror;
336 }
337 if (!waitrecmsg(cs, &len, tmp, 100000)) {
338 printk(KERN_ERR"isar waitrecmsg start dsp failed\n");
339 ret = 1;goto reterror;
340 }
341 if ((ireg->iis != ISAR_IIS_STDSP) || ireg->cmsb || len) {
342 printk(KERN_ERR"isar wrong start dsp response (%x,%x,%x)\n",
343 ireg->iis, ireg->cmsb, len);
344 ret = 1;goto reterror;
345 } else
346 printk(KERN_DEBUG"isar start dsp success\n");
347 /* NORMAL mode entered */
348 /* Enable IRQs of ISAR */
349 cs->BC_Write_Reg(cs, 0, ISAR_IRQBIT, ISAR_IRQSTA);
350 save_flags(flags);
351 sti();
352 cnt = 1000; /* max 1s */
353 while ((!ireg->bstat) && cnt) {
354 udelay(1000);
355 cnt--;
356 }
357 if (!cnt) {
358 printk(KERN_ERR"isar no general status event received\n");
359 ret = 1;goto reterrflg;
360 } else {
361 printk(KERN_DEBUG"isar general status event %x\n",
362 ireg->bstat);
363 }
364 /* 10ms delay */
365 cnt = 10;
366 while (cnt--)
367 udelay(1000);
368 ireg->iis = 0;
369 if (!sendmsg(cs, ISAR_HIS_DIAG, ISAR_CTRL_STST, 0, NULL)) {
370 printk(KERN_ERR"isar sendmsg self tst failed\n");
371 ret = 1;goto reterrflg;
372 }
373 cnt = 10000; /* max 100 ms */
374 while ((ireg->iis != ISAR_IIS_DIAG) && cnt) {
375 udelay(10);
376 cnt--;
377 }
378 udelay(1000);
379 if (!cnt) {
380 printk(KERN_ERR"isar no self tst response\n");
381 ret = 1;goto reterrflg;
382 }
383 if ((ireg->cmsb == ISAR_CTRL_STST) && (ireg->clsb == 1)
384 && (ireg->par[0] == 0)) {
385 printk(KERN_DEBUG"isar selftest OK\n");
386 } else {
387 printk(KERN_DEBUG"isar selftest not OK %x/%x/%x\n",
388 ireg->cmsb, ireg->clsb, ireg->par[0]);
389 ret = 1;goto reterrflg;
390 }
391 ireg->iis = 0;
392 if (!sendmsg(cs, ISAR_HIS_DIAG, ISAR_CTRL_SWVER, 0, NULL)) {
393 printk(KERN_ERR"isar RQST SVN failed\n");
394 ret = 1;goto reterrflg;
395 }
396 cnt = 30000; /* max 300 ms */
397 while ((ireg->iis != ISAR_IIS_DIAG) && cnt) {
398 udelay(10);
399 cnt--;
400 }
401 udelay(1000);
402 if (!cnt) {
403 printk(KERN_ERR"isar no SVN response\n");
404 ret = 1;goto reterrflg;
405 } else {
406 if ((ireg->cmsb == ISAR_CTRL_SWVER) && (ireg->clsb == 1))
407 printk(KERN_DEBUG"isar software version %#x\n",
408 ireg->par[0]);
409 else {
410 printk(KERN_ERR"isar wrong swver response (%x,%x) cnt(%d)\n",
411 ireg->cmsb, ireg->clsb, cnt);
412 ret = 1;goto reterrflg;
413 }
414 }
415 cs->debug = debug;
416 isar_setup(cs);
417
418 ret = 0;
419 reterrflg:
420 restore_flags(flags);
421 reterror:
422 cs->debug = debug;
423 if (ret)
424 /* disable ISAR IRQ */
425 cs->BC_Write_Reg(cs, 0, ISAR_IRQBIT, 0);
426 kfree(msg);
427 kfree(tmpmsg);
428 return(ret);
429 }
430
431 static inline void
ll_deliver_faxstat(struct BCState * bcs,u_char status)432 ll_deliver_faxstat(struct BCState *bcs, u_char status)
433 {
434 isdn_ctrl ic;
435 struct Channel *chanp = (struct Channel *) bcs->st->lli.userdata;
436
437 if (bcs->cs->debug & L1_DEB_HSCX)
438 debugl1(bcs->cs, "HL->LL FAXIND %x", status);
439 ic.driver = bcs->cs->myid;
440 ic.command = ISDN_STAT_FAXIND;
441 ic.arg = chanp->chan;
442 ic.parm.aux.cmd = status;
443 bcs->cs->iif.statcallb(&ic);
444 }
445
446 extern void BChannel_bh(struct BCState *);
447 #define B_LL_NOCARRIER 8
448 #define B_LL_CONNECT 9
449 #define B_LL_OK 10
450
451 static void
isar_bh(struct BCState * bcs)452 isar_bh(struct BCState *bcs)
453 {
454 BChannel_bh(bcs);
455 if (test_and_clear_bit(B_LL_NOCARRIER, &bcs->event))
456 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_NOCARR);
457 if (test_and_clear_bit(B_LL_CONNECT, &bcs->event))
458 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_CONNECT);
459 if (test_and_clear_bit(B_LL_OK, &bcs->event))
460 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_OK);
461 }
462
463 static void
isar_sched_event(struct BCState * bcs,int event)464 isar_sched_event(struct BCState *bcs, int event)
465 {
466 bcs->event |= 1 << event;
467 queue_task(&bcs->tqueue, &tq_immediate);
468 mark_bh(IMMEDIATE_BH);
469 }
470
471 static inline void
send_DLE_ETX(struct BCState * bcs)472 send_DLE_ETX(struct BCState *bcs)
473 {
474 u_char dleetx[2] = {DLE,ETX};
475 struct sk_buff *skb;
476
477 if ((skb = dev_alloc_skb(2))) {
478 memcpy(skb_put(skb, 2), dleetx, 2);
479 skb_queue_tail(&bcs->rqueue, skb);
480 isar_sched_event(bcs, B_RCVBUFREADY);
481 } else {
482 printk(KERN_WARNING "HiSax: skb out of memory\n");
483 }
484 }
485
486 static inline int
dle_count(unsigned char * buf,int len)487 dle_count(unsigned char *buf, int len)
488 {
489 int count = 0;
490
491 while (len--)
492 if (*buf++ == DLE)
493 count++;
494 return count;
495 }
496
497 static inline void
insert_dle(unsigned char * dest,unsigned char * src,int count)498 insert_dle(unsigned char *dest, unsigned char *src, int count) {
499 /* <DLE> in input stream have to be flagged as <DLE><DLE> */
500 while (count--) {
501 *dest++ = *src;
502 if (*src++ == DLE)
503 *dest++ = DLE;
504 }
505 }
506
507 static inline void
isar_rcv_frame(struct IsdnCardState * cs,struct BCState * bcs)508 isar_rcv_frame(struct IsdnCardState *cs, struct BCState *bcs)
509 {
510 u_char *ptr;
511 struct sk_buff *skb;
512 struct isar_reg *ireg = bcs->hw.isar.reg;
513
514 if (!ireg->clsb) {
515 debugl1(cs, "isar zero len frame");
516 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
517 return;
518 }
519 switch (bcs->mode) {
520 case L1_MODE_NULL:
521 debugl1(cs, "isar mode 0 spurious IIS_RDATA %x/%x/%x",
522 ireg->iis, ireg->cmsb, ireg->clsb);
523 printk(KERN_WARNING"isar mode 0 spurious IIS_RDATA %x/%x/%x\n",
524 ireg->iis, ireg->cmsb, ireg->clsb);
525 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
526 break;
527 case L1_MODE_TRANS:
528 case L1_MODE_V32:
529 if ((skb = dev_alloc_skb(ireg->clsb))) {
530 rcv_mbox(cs, ireg, (u_char *)skb_put(skb, ireg->clsb));
531 skb_queue_tail(&bcs->rqueue, skb);
532 isar_sched_event(bcs, B_RCVBUFREADY);
533 } else {
534 printk(KERN_WARNING "HiSax: skb out of memory\n");
535 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
536 }
537 break;
538 case L1_MODE_HDLC:
539 if ((bcs->hw.isar.rcvidx + ireg->clsb) > HSCX_BUFMAX) {
540 if (cs->debug & L1_DEB_WARN)
541 debugl1(cs, "isar_rcv_frame: incoming packet too large");
542 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
543 bcs->hw.isar.rcvidx = 0;
544 } else if (ireg->cmsb & HDLC_ERROR) {
545 if (cs->debug & L1_DEB_WARN)
546 debugl1(cs, "isar frame error %x len %d",
547 ireg->cmsb, ireg->clsb);
548 #ifdef ERROR_STATISTIC
549 if (ireg->cmsb & HDLC_ERR_RER)
550 bcs->err_inv++;
551 if (ireg->cmsb & HDLC_ERR_CER)
552 bcs->err_crc++;
553 #endif
554 bcs->hw.isar.rcvidx = 0;
555 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
556 } else {
557 if (ireg->cmsb & HDLC_FSD)
558 bcs->hw.isar.rcvidx = 0;
559 ptr = bcs->hw.isar.rcvbuf + bcs->hw.isar.rcvidx;
560 bcs->hw.isar.rcvidx += ireg->clsb;
561 rcv_mbox(cs, ireg, ptr);
562 if (ireg->cmsb & HDLC_FED) {
563 if (bcs->hw.isar.rcvidx < 3) { /* last 2 bytes are the FCS */
564 if (cs->debug & L1_DEB_WARN)
565 debugl1(cs, "isar frame to short %d",
566 bcs->hw.isar.rcvidx);
567 } else if (!(skb = dev_alloc_skb(bcs->hw.isar.rcvidx-2))) {
568 printk(KERN_WARNING "ISAR: receive out of memory\n");
569 } else {
570 memcpy(skb_put(skb, bcs->hw.isar.rcvidx-2),
571 bcs->hw.isar.rcvbuf, bcs->hw.isar.rcvidx-2);
572 skb_queue_tail(&bcs->rqueue, skb);
573 isar_sched_event(bcs, B_RCVBUFREADY);
574 }
575 bcs->hw.isar.rcvidx = 0;
576 }
577 }
578 break;
579 case L1_MODE_FAX:
580 if (bcs->hw.isar.state != STFAX_ACTIV) {
581 if (cs->debug & L1_DEB_WARN)
582 debugl1(cs, "isar_rcv_frame: not ACTIV");
583 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
584 bcs->hw.isar.rcvidx = 0;
585 break;
586 }
587 if (bcs->hw.isar.cmd == PCTRL_CMD_FRM) {
588 rcv_mbox(cs, ireg, bcs->hw.isar.rcvbuf);
589 bcs->hw.isar.rcvidx = ireg->clsb +
590 dle_count(bcs->hw.isar.rcvbuf, ireg->clsb);
591 if (cs->debug & L1_DEB_HSCX)
592 debugl1(cs, "isar_rcv_frame: raw(%d) dle(%d)",
593 ireg->clsb, bcs->hw.isar.rcvidx);
594 if ((skb = dev_alloc_skb(bcs->hw.isar.rcvidx))) {
595 insert_dle((u_char *)skb_put(skb, bcs->hw.isar.rcvidx),
596 bcs->hw.isar.rcvbuf, ireg->clsb);
597 skb_queue_tail(&bcs->rqueue, skb);
598 isar_sched_event(bcs, B_RCVBUFREADY);
599 if (ireg->cmsb & SART_NMD) { /* ABORT */
600 if (cs->debug & L1_DEB_WARN)
601 debugl1(cs, "isar_rcv_frame: no more data");
602 bcs->hw.isar.rcvidx = 0;
603 send_DLE_ETX(bcs);
604 sendmsg(cs, SET_DPS(bcs->hw.isar.dpath) |
605 ISAR_HIS_PUMPCTRL, PCTRL_CMD_ESC,
606 0, NULL);
607 bcs->hw.isar.state = STFAX_ESCAPE;
608 isar_sched_event(bcs, B_LL_NOCARRIER);
609 }
610 } else {
611 printk(KERN_WARNING "HiSax: skb out of memory\n");
612 }
613 break;
614 }
615 if (bcs->hw.isar.cmd != PCTRL_CMD_FRH) {
616 if (cs->debug & L1_DEB_WARN)
617 debugl1(cs, "isar_rcv_frame: unknown fax mode %x",
618 bcs->hw.isar.cmd);
619 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
620 bcs->hw.isar.rcvidx = 0;
621 break;
622 }
623 /* PCTRL_CMD_FRH */
624 if ((bcs->hw.isar.rcvidx + ireg->clsb) > HSCX_BUFMAX) {
625 if (cs->debug & L1_DEB_WARN)
626 debugl1(cs, "isar_rcv_frame: incoming packet too large");
627 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
628 bcs->hw.isar.rcvidx = 0;
629 } else if (ireg->cmsb & HDLC_ERROR) {
630 if (cs->debug & L1_DEB_WARN)
631 debugl1(cs, "isar frame error %x len %d",
632 ireg->cmsb, ireg->clsb);
633 bcs->hw.isar.rcvidx = 0;
634 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
635 } else {
636 if (ireg->cmsb & HDLC_FSD) {
637 bcs->hw.isar.rcvidx = 0;
638 }
639 ptr = bcs->hw.isar.rcvbuf + bcs->hw.isar.rcvidx;
640 bcs->hw.isar.rcvidx += ireg->clsb;
641 rcv_mbox(cs, ireg, ptr);
642 if (ireg->cmsb & HDLC_FED) {
643 int len = bcs->hw.isar.rcvidx +
644 dle_count(bcs->hw.isar.rcvbuf, bcs->hw.isar.rcvidx);
645 if (bcs->hw.isar.rcvidx < 3) { /* last 2 bytes are the FCS */
646 if (cs->debug & L1_DEB_WARN)
647 debugl1(cs, "isar frame to short %d",
648 bcs->hw.isar.rcvidx);
649 printk(KERN_WARNING "ISAR: frame to short %d\n",
650 bcs->hw.isar.rcvidx);
651 } else if (!(skb = dev_alloc_skb(bcs->hw.isar.rcvidx))) {
652 printk(KERN_WARNING "ISAR: receive out of memory\n");
653 } else {
654 insert_dle((u_char *)skb_put(skb, len),
655 bcs->hw.isar.rcvbuf,
656 bcs->hw.isar.rcvidx);
657 skb_queue_tail(&bcs->rqueue, skb);
658 isar_sched_event(bcs, B_RCVBUFREADY);
659 send_DLE_ETX(bcs);
660 isar_sched_event(bcs, B_LL_OK);
661 test_and_clear_bit(BC_FLG_FRH_WAIT, &bcs->Flag);
662 }
663 bcs->hw.isar.rcvidx = 0;
664 }
665 }
666 if (ireg->cmsb & SART_NMD) { /* ABORT */
667 if (cs->debug & L1_DEB_WARN)
668 debugl1(cs, "isar_rcv_frame: no more data");
669 bcs->hw.isar.rcvidx = 0;
670 sendmsg(cs, SET_DPS(bcs->hw.isar.dpath) |
671 ISAR_HIS_PUMPCTRL, PCTRL_CMD_ESC, 0, NULL);
672 bcs->hw.isar.state = STFAX_ESCAPE;
673 if (test_and_clear_bit(BC_FLG_FRH_WAIT, &bcs->Flag)) {
674 send_DLE_ETX(bcs);
675 isar_sched_event(bcs, B_LL_NOCARRIER);
676 }
677 }
678 break;
679 default:
680 printk(KERN_ERR"isar_rcv_frame mode (%x)error\n", bcs->mode);
681 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
682 break;
683 }
684 }
685
686 void
isar_fill_fifo(struct BCState * bcs)687 isar_fill_fifo(struct BCState *bcs)
688 {
689 struct IsdnCardState *cs = bcs->cs;
690 int count;
691 u_char msb;
692 u_char *ptr;
693 long flags;
694
695 if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO))
696 debugl1(cs, "isar_fill_fifo");
697 if (!bcs->tx_skb)
698 return;
699 if (bcs->tx_skb->len <= 0)
700 return;
701 if (!(bcs->hw.isar.reg->bstat &
702 (bcs->hw.isar.dpath == 1 ? BSTAT_RDM1 : BSTAT_RDM2)))
703 return;
704 if (bcs->tx_skb->len > bcs->hw.isar.mml) {
705 msb = 0;
706 count = bcs->hw.isar.mml;
707 } else {
708 count = bcs->tx_skb->len;
709 msb = HDLC_FED;
710 }
711 save_flags(flags);
712 cli();
713 ptr = bcs->tx_skb->data;
714 if (!bcs->hw.isar.txcnt) {
715 msb |= HDLC_FST;
716 if ((bcs->mode == L1_MODE_FAX) &&
717 (bcs->hw.isar.cmd == PCTRL_CMD_FTH)) {
718 if (bcs->tx_skb->len > 1) {
719 if ((ptr[0]== 0xff) && (ptr[1] == 0x13))
720 /* last frame */
721 test_and_set_bit(BC_FLG_LASTDATA,
722 &bcs->Flag);
723 }
724 }
725 }
726 skb_pull(bcs->tx_skb, count);
727 bcs->tx_cnt -= count;
728 bcs->hw.isar.txcnt += count;
729 switch (bcs->mode) {
730 case L1_MODE_NULL:
731 printk(KERN_ERR"isar_fill_fifo wrong mode 0\n");
732 break;
733 case L1_MODE_TRANS:
734 case L1_MODE_V32:
735 sendmsg(cs, SET_DPS(bcs->hw.isar.dpath) | ISAR_HIS_SDATA,
736 0, count, ptr);
737 break;
738 case L1_MODE_HDLC:
739 sendmsg(cs, SET_DPS(bcs->hw.isar.dpath) | ISAR_HIS_SDATA,
740 msb, count, ptr);
741 break;
742 case L1_MODE_FAX:
743 if (bcs->hw.isar.state != STFAX_ACTIV) {
744 if (cs->debug & L1_DEB_WARN)
745 debugl1(cs, "isar_fill_fifo: not ACTIV");
746 } else if (bcs->hw.isar.cmd == PCTRL_CMD_FTH) {
747 sendmsg(cs, SET_DPS(bcs->hw.isar.dpath) | ISAR_HIS_SDATA,
748 msb, count, ptr);
749 } else if (bcs->hw.isar.cmd == PCTRL_CMD_FTM) {
750 sendmsg(cs, SET_DPS(bcs->hw.isar.dpath) | ISAR_HIS_SDATA,
751 0, count, ptr);
752 } else {
753 if (cs->debug & L1_DEB_WARN)
754 debugl1(cs, "isar_fill_fifo: not FTH/FTM");
755 }
756 break;
757 default:
758 if (cs->debug)
759 debugl1(cs, "isar_fill_fifo mode(%x) error", bcs->mode);
760 printk(KERN_ERR"isar_fill_fifo mode(%x) error\n", bcs->mode);
761 break;
762 }
763 restore_flags(flags);
764 }
765
766 inline
sel_bcs_isar(struct IsdnCardState * cs,u_char dpath)767 struct BCState *sel_bcs_isar(struct IsdnCardState *cs, u_char dpath)
768 {
769 if ((!dpath) || (dpath == 3))
770 return(NULL);
771 if (cs->bcs[0].hw.isar.dpath == dpath)
772 return(&cs->bcs[0]);
773 if (cs->bcs[1].hw.isar.dpath == dpath)
774 return(&cs->bcs[1]);
775 return(NULL);
776 }
777
778 inline void
send_frames(struct BCState * bcs)779 send_frames(struct BCState *bcs)
780 {
781 if (bcs->tx_skb) {
782 if (bcs->tx_skb->len) {
783 isar_fill_fifo(bcs);
784 return;
785 } else {
786 if (bcs->st->lli.l1writewakeup &&
787 (PACKET_NOACK != bcs->tx_skb->pkt_type))
788 bcs->st->lli.l1writewakeup(bcs->st, bcs->hw.isar.txcnt);
789 if (bcs->mode == L1_MODE_FAX) {
790 if (bcs->hw.isar.cmd == PCTRL_CMD_FTH) {
791 if (test_bit(BC_FLG_LASTDATA, &bcs->Flag)) {
792 test_and_set_bit(BC_FLG_NMD_DATA, &bcs->Flag);
793 }
794 } else if (bcs->hw.isar.cmd == PCTRL_CMD_FTM) {
795 if (test_bit(BC_FLG_DLEETX, &bcs->Flag)) {
796 test_and_set_bit(BC_FLG_LASTDATA, &bcs->Flag);
797 test_and_set_bit(BC_FLG_NMD_DATA, &bcs->Flag);
798 }
799 }
800 }
801 dev_kfree_skb_any(bcs->tx_skb);
802 bcs->hw.isar.txcnt = 0;
803 bcs->tx_skb = NULL;
804 }
805 }
806 if ((bcs->tx_skb = skb_dequeue(&bcs->squeue))) {
807 bcs->hw.isar.txcnt = 0;
808 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
809 isar_fill_fifo(bcs);
810 } else {
811 if (test_and_clear_bit(BC_FLG_DLEETX, &bcs->Flag)) {
812 if (test_and_clear_bit(BC_FLG_LASTDATA, &bcs->Flag)) {
813 if (test_and_clear_bit(BC_FLG_NMD_DATA, &bcs->Flag)) {
814 u_char dummy = 0;
815 sendmsg(bcs->cs, SET_DPS(bcs->hw.isar.dpath) |
816 ISAR_HIS_SDATA, 0x01, 1, &dummy);
817 }
818 test_and_set_bit(BC_FLG_LL_OK, &bcs->Flag);
819 } else {
820 isar_sched_event(bcs, B_LL_CONNECT);
821 }
822 }
823 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
824 isar_sched_event(bcs, B_XMTBUFREADY);
825 }
826 }
827
828 inline void
check_send(struct IsdnCardState * cs,u_char rdm)829 check_send(struct IsdnCardState *cs, u_char rdm)
830 {
831 struct BCState *bcs;
832
833 if (rdm & BSTAT_RDM1) {
834 if ((bcs = sel_bcs_isar(cs, 1))) {
835 if (bcs->mode) {
836 send_frames(bcs);
837 }
838 }
839 }
840 if (rdm & BSTAT_RDM2) {
841 if ((bcs = sel_bcs_isar(cs, 2))) {
842 if (bcs->mode) {
843 send_frames(bcs);
844 }
845 }
846 }
847
848 }
849
850 const char *dmril[] = {"NO SPEED", "1200/75", "NODEF2", "75/1200", "NODEF4",
851 "300", "600", "1200", "2400", "4800", "7200",
852 "9600nt", "9600t", "12000", "14400", "WRONG"};
853 const char *dmrim[] = {"NO MOD", "NO DEF", "V32/V32b", "V22", "V21",
854 "Bell103", "V23", "Bell202", "V17", "V29", "V27ter"};
855
856 static void
isar_pump_status_rsp(struct BCState * bcs,struct isar_reg * ireg)857 isar_pump_status_rsp(struct BCState *bcs, struct isar_reg *ireg) {
858 struct IsdnCardState *cs = bcs->cs;
859 u_char ril = ireg->par[0];
860 u_char rim;
861
862 if (!test_and_clear_bit(ISAR_RATE_REQ, &bcs->hw.isar.reg->Flags))
863 return;
864 if (ril > 14) {
865 if (cs->debug & L1_DEB_WARN)
866 debugl1(cs, "wrong pstrsp ril=%d",ril);
867 ril = 15;
868 }
869 switch(ireg->par[1]) {
870 case 0:
871 rim = 0;
872 break;
873 case 0x20:
874 rim = 2;
875 break;
876 case 0x40:
877 rim = 3;
878 break;
879 case 0x41:
880 rim = 4;
881 break;
882 case 0x51:
883 rim = 5;
884 break;
885 case 0x61:
886 rim = 6;
887 break;
888 case 0x71:
889 rim = 7;
890 break;
891 case 0x82:
892 rim = 8;
893 break;
894 case 0x92:
895 rim = 9;
896 break;
897 case 0xa2:
898 rim = 10;
899 break;
900 default:
901 rim = 1;
902 break;
903 }
904 sprintf(bcs->hw.isar.conmsg,"%s %s", dmril[ril], dmrim[rim]);
905 bcs->conmsg = bcs->hw.isar.conmsg;
906 if (cs->debug & L1_DEB_HSCX)
907 debugl1(cs, "pump strsp %s", bcs->conmsg);
908 }
909
910 static void
isar_pump_statev_modem(struct BCState * bcs,u_char devt)911 isar_pump_statev_modem(struct BCState *bcs, u_char devt) {
912 struct IsdnCardState *cs = bcs->cs;
913 u_char dps = SET_DPS(bcs->hw.isar.dpath);
914
915 switch(devt) {
916 case PSEV_10MS_TIMER:
917 if (cs->debug & L1_DEB_HSCX)
918 debugl1(cs, "pump stev TIMER");
919 break;
920 case PSEV_CON_ON:
921 if (cs->debug & L1_DEB_HSCX)
922 debugl1(cs, "pump stev CONNECT");
923 l1_msg_b(bcs->st, PH_ACTIVATE | REQUEST, NULL);
924 break;
925 case PSEV_CON_OFF:
926 if (cs->debug & L1_DEB_HSCX)
927 debugl1(cs, "pump stev NO CONNECT");
928 sendmsg(cs, dps | ISAR_HIS_PSTREQ, 0, 0, NULL);
929 l1_msg_b(bcs->st, PH_DEACTIVATE | REQUEST, NULL);
930 break;
931 case PSEV_V24_OFF:
932 if (cs->debug & L1_DEB_HSCX)
933 debugl1(cs, "pump stev V24 OFF");
934 break;
935 case PSEV_CTS_ON:
936 if (cs->debug & L1_DEB_HSCX)
937 debugl1(cs, "pump stev CTS ON");
938 break;
939 case PSEV_CTS_OFF:
940 if (cs->debug & L1_DEB_HSCX)
941 debugl1(cs, "pump stev CTS OFF");
942 break;
943 case PSEV_DCD_ON:
944 if (cs->debug & L1_DEB_HSCX)
945 debugl1(cs, "pump stev CARRIER ON");
946 test_and_set_bit(ISAR_RATE_REQ, &bcs->hw.isar.reg->Flags);
947 sendmsg(cs, dps | ISAR_HIS_PSTREQ, 0, 0, NULL);
948 break;
949 case PSEV_DCD_OFF:
950 if (cs->debug & L1_DEB_HSCX)
951 debugl1(cs, "pump stev CARRIER OFF");
952 break;
953 case PSEV_DSR_ON:
954 if (cs->debug & L1_DEB_HSCX)
955 debugl1(cs, "pump stev DSR ON");
956 break;
957 case PSEV_DSR_OFF:
958 if (cs->debug & L1_DEB_HSCX)
959 debugl1(cs, "pump stev DSR_OFF");
960 break;
961 case PSEV_REM_RET:
962 if (cs->debug & L1_DEB_HSCX)
963 debugl1(cs, "pump stev REMOTE RETRAIN");
964 break;
965 case PSEV_REM_REN:
966 if (cs->debug & L1_DEB_HSCX)
967 debugl1(cs, "pump stev REMOTE RENEGOTIATE");
968 break;
969 case PSEV_GSTN_CLR:
970 if (cs->debug & L1_DEB_HSCX)
971 debugl1(cs, "pump stev GSTN CLEAR", devt);
972 break;
973 default:
974 if (cs->debug & L1_DEB_HSCX)
975 debugl1(cs, "unknown pump stev %x", devt);
976 break;
977 }
978 }
979
980 static void
isar_pump_statev_fax(struct BCState * bcs,u_char devt)981 isar_pump_statev_fax(struct BCState *bcs, u_char devt) {
982 struct IsdnCardState *cs = bcs->cs;
983 u_char dps = SET_DPS(bcs->hw.isar.dpath);
984 u_char p1;
985
986 switch(devt) {
987 case PSEV_10MS_TIMER:
988 if (cs->debug & L1_DEB_HSCX)
989 debugl1(cs, "pump stev TIMER");
990 break;
991 case PSEV_RSP_READY:
992 if (cs->debug & L1_DEB_HSCX)
993 debugl1(cs, "pump stev RSP_READY");
994 bcs->hw.isar.state = STFAX_READY;
995 l1_msg_b(bcs->st, PH_ACTIVATE | REQUEST, NULL);
996 if (test_bit(BC_FLG_ORIG, &bcs->Flag)) {
997 isar_pump_cmd(bcs, ISDN_FAX_CLASS1_FRH, 3);
998 } else {
999 isar_pump_cmd(bcs, ISDN_FAX_CLASS1_FTH, 3);
1000 }
1001 break;
1002 case PSEV_LINE_TX_H:
1003 if (bcs->hw.isar.state == STFAX_LINE) {
1004 if (cs->debug & L1_DEB_HSCX)
1005 debugl1(cs, "pump stev LINE_TX_H");
1006 bcs->hw.isar.state = STFAX_CONT;
1007 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, PCTRL_CMD_CONT, 0, NULL);
1008 } else {
1009 if (cs->debug & L1_DEB_WARN)
1010 debugl1(cs, "pump stev LINE_TX_H wrong st %x",
1011 bcs->hw.isar.state);
1012 }
1013 break;
1014 case PSEV_LINE_RX_H:
1015 if (bcs->hw.isar.state == STFAX_LINE) {
1016 if (cs->debug & L1_DEB_HSCX)
1017 debugl1(cs, "pump stev LINE_RX_H");
1018 bcs->hw.isar.state = STFAX_CONT;
1019 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, PCTRL_CMD_CONT, 0, NULL);
1020 } else {
1021 if (cs->debug & L1_DEB_WARN)
1022 debugl1(cs, "pump stev LINE_RX_H wrong st %x",
1023 bcs->hw.isar.state);
1024 }
1025 break;
1026 case PSEV_LINE_TX_B:
1027 if (bcs->hw.isar.state == STFAX_LINE) {
1028 if (cs->debug & L1_DEB_HSCX)
1029 debugl1(cs, "pump stev LINE_TX_B");
1030 bcs->hw.isar.state = STFAX_CONT;
1031 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, PCTRL_CMD_CONT, 0, NULL);
1032 } else {
1033 if (cs->debug & L1_DEB_WARN)
1034 debugl1(cs, "pump stev LINE_TX_B wrong st %x",
1035 bcs->hw.isar.state);
1036 }
1037 break;
1038 case PSEV_LINE_RX_B:
1039 if (bcs->hw.isar.state == STFAX_LINE) {
1040 if (cs->debug & L1_DEB_HSCX)
1041 debugl1(cs, "pump stev LINE_RX_B");
1042 bcs->hw.isar.state = STFAX_CONT;
1043 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, PCTRL_CMD_CONT, 0, NULL);
1044 } else {
1045 if (cs->debug & L1_DEB_WARN)
1046 debugl1(cs, "pump stev LINE_RX_B wrong st %x",
1047 bcs->hw.isar.state);
1048 }
1049 break;
1050 case PSEV_RSP_CONN:
1051 if (bcs->hw.isar.state == STFAX_CONT) {
1052 if (cs->debug & L1_DEB_HSCX)
1053 debugl1(cs, "pump stev RSP_CONN");
1054 bcs->hw.isar.state = STFAX_ACTIV;
1055 test_and_set_bit(ISAR_RATE_REQ, &bcs->hw.isar.reg->Flags);
1056 sendmsg(cs, dps | ISAR_HIS_PSTREQ, 0, 0, NULL);
1057 if (bcs->hw.isar.cmd == PCTRL_CMD_FTH) {
1058 /* 1s Flags before data */
1059 if (test_and_set_bit(BC_FLG_FTI_RUN, &bcs->Flag))
1060 del_timer(&bcs->hw.isar.ftimer);
1061 /* 1000 ms */
1062 bcs->hw.isar.ftimer.expires =
1063 jiffies + ((1000 * HZ)/1000);
1064 test_and_set_bit(BC_FLG_LL_CONN,
1065 &bcs->Flag);
1066 add_timer(&bcs->hw.isar.ftimer);
1067 } else {
1068 isar_sched_event(bcs, B_LL_CONNECT);
1069 }
1070 } else {
1071 if (cs->debug & L1_DEB_WARN)
1072 debugl1(cs, "pump stev RSP_CONN wrong st %x",
1073 bcs->hw.isar.state);
1074 }
1075 break;
1076 case PSEV_FLAGS_DET:
1077 if (cs->debug & L1_DEB_HSCX)
1078 debugl1(cs, "pump stev FLAGS_DET");
1079 break;
1080 case PSEV_RSP_DISC:
1081 if (cs->debug & L1_DEB_HSCX)
1082 debugl1(cs, "pump stev RSP_DISC");
1083 if (bcs->hw.isar.state == STFAX_ESCAPE) {
1084 p1 = 5;
1085 switch(bcs->hw.isar.newcmd) {
1086 case 0:
1087 bcs->hw.isar.state = STFAX_READY;
1088 break;
1089 case PCTRL_CMD_FTM:
1090 p1 = 2;
1091 case PCTRL_CMD_FTH:
1092 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL,
1093 PCTRL_CMD_SILON, 1, &p1);
1094 bcs->hw.isar.state = STFAX_SILDET;
1095 break;
1096 case PCTRL_CMD_FRM:
1097 if (frm_extra_delay)
1098 mdelay(frm_extra_delay);
1099 case PCTRL_CMD_FRH:
1100 p1 = bcs->hw.isar.mod = bcs->hw.isar.newmod;
1101 bcs->hw.isar.newmod = 0;
1102 bcs->hw.isar.cmd = bcs->hw.isar.newcmd;
1103 bcs->hw.isar.newcmd = 0;
1104 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL,
1105 bcs->hw.isar.cmd, 1, &p1);
1106 bcs->hw.isar.state = STFAX_LINE;
1107 bcs->hw.isar.try_mod = 3;
1108 break;
1109 default:
1110 if (cs->debug & L1_DEB_HSCX)
1111 debugl1(cs, "RSP_DISC unknown newcmd %x", bcs->hw.isar.newcmd);
1112 break;
1113 }
1114 } else if (bcs->hw.isar.state == STFAX_ACTIV) {
1115 if (test_and_clear_bit(BC_FLG_LL_OK, &bcs->Flag)) {
1116 isar_sched_event(bcs, B_LL_OK);
1117 } else if (bcs->hw.isar.cmd == PCTRL_CMD_FRM) {
1118 send_DLE_ETX(bcs);
1119 isar_sched_event(bcs, B_LL_NOCARRIER);
1120 } else {
1121 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_FCERROR);
1122 }
1123 bcs->hw.isar.state = STFAX_READY;
1124 } else {
1125 bcs->hw.isar.state = STFAX_READY;
1126 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_FCERROR);
1127 }
1128 break;
1129 case PSEV_RSP_SILDET:
1130 if (cs->debug & L1_DEB_HSCX)
1131 debugl1(cs, "pump stev RSP_SILDET");
1132 if (bcs->hw.isar.state == STFAX_SILDET) {
1133 p1 = bcs->hw.isar.mod = bcs->hw.isar.newmod;
1134 bcs->hw.isar.newmod = 0;
1135 bcs->hw.isar.cmd = bcs->hw.isar.newcmd;
1136 bcs->hw.isar.newcmd = 0;
1137 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL,
1138 bcs->hw.isar.cmd, 1, &p1);
1139 bcs->hw.isar.state = STFAX_LINE;
1140 bcs->hw.isar.try_mod = 3;
1141 }
1142 break;
1143 case PSEV_RSP_SILOFF:
1144 if (cs->debug & L1_DEB_HSCX)
1145 debugl1(cs, "pump stev RSP_SILOFF");
1146 break;
1147 case PSEV_RSP_FCERR:
1148 if (bcs->hw.isar.state == STFAX_LINE) {
1149 if (cs->debug & L1_DEB_HSCX)
1150 debugl1(cs, "pump stev RSP_FCERR try %d",
1151 bcs->hw.isar.try_mod);
1152 if (bcs->hw.isar.try_mod--) {
1153 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL,
1154 bcs->hw.isar.cmd, 1,
1155 &bcs->hw.isar.mod);
1156 break;
1157 }
1158 }
1159 if (cs->debug & L1_DEB_HSCX)
1160 debugl1(cs, "pump stev RSP_FCERR");
1161 bcs->hw.isar.state = STFAX_ESCAPE;
1162 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, PCTRL_CMD_ESC, 0, NULL);
1163 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_FCERROR);
1164 break;
1165 default:
1166 break;
1167 }
1168 }
1169
1170 static char debbuf[128];
1171
1172 void
isar_int_main(struct IsdnCardState * cs)1173 isar_int_main(struct IsdnCardState *cs)
1174 {
1175 long flags;
1176 struct isar_reg *ireg = cs->bcs[0].hw.isar.reg;
1177 struct BCState *bcs;
1178
1179 save_flags(flags);
1180 cli();
1181 get_irq_infos(cs, ireg);
1182 switch (ireg->iis & ISAR_IIS_MSCMSD) {
1183 case ISAR_IIS_RDATA:
1184 if ((bcs = sel_bcs_isar(cs, ireg->iis >> 6))) {
1185 isar_rcv_frame(cs, bcs);
1186 } else {
1187 debugl1(cs, "isar spurious IIS_RDATA %x/%x/%x",
1188 ireg->iis, ireg->cmsb, ireg->clsb);
1189 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
1190 }
1191 break;
1192 case ISAR_IIS_GSTEV:
1193 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
1194 ireg->bstat |= ireg->cmsb;
1195 check_send(cs, ireg->cmsb);
1196 break;
1197 case ISAR_IIS_BSTEV:
1198 #ifdef ERROR_STATISTIC
1199 if ((bcs = sel_bcs_isar(cs, ireg->iis >> 6))) {
1200 if (ireg->cmsb == BSTEV_TBO)
1201 bcs->err_tx++;
1202 if (ireg->cmsb == BSTEV_RBO)
1203 bcs->err_rdo++;
1204 }
1205 #endif
1206 if (cs->debug & L1_DEB_WARN)
1207 debugl1(cs, "Buffer STEV dpath%d msb(%x)",
1208 ireg->iis>>6, ireg->cmsb);
1209 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
1210 break;
1211 case ISAR_IIS_PSTEV:
1212 if ((bcs = sel_bcs_isar(cs, ireg->iis >> 6))) {
1213 rcv_mbox(cs, ireg, (u_char *)ireg->par);
1214 if (bcs->mode == L1_MODE_V32) {
1215 isar_pump_statev_modem(bcs, ireg->cmsb);
1216 } else if (bcs->mode == L1_MODE_FAX) {
1217 isar_pump_statev_fax(bcs, ireg->cmsb);
1218 } else if (ireg->cmsb == PSEV_10MS_TIMER) {
1219 if (cs->debug & L1_DEB_HSCX)
1220 debugl1(cs, "pump stev TIMER");
1221 } else {
1222 if (cs->debug & L1_DEB_WARN)
1223 debugl1(cs, "isar IIS_PSTEV pmode %d stat %x",
1224 bcs->mode, ireg->cmsb);
1225 }
1226 } else {
1227 debugl1(cs, "isar spurious IIS_PSTEV %x/%x/%x",
1228 ireg->iis, ireg->cmsb, ireg->clsb);
1229 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
1230 }
1231 break;
1232 case ISAR_IIS_PSTRSP:
1233 if ((bcs = sel_bcs_isar(cs, ireg->iis >> 6))) {
1234 rcv_mbox(cs, ireg, (u_char *)ireg->par);
1235 isar_pump_status_rsp(bcs, ireg);
1236 } else {
1237 debugl1(cs, "isar spurious IIS_PSTRSP %x/%x/%x",
1238 ireg->iis, ireg->cmsb, ireg->clsb);
1239 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
1240 }
1241 break;
1242 case ISAR_IIS_DIAG:
1243 case ISAR_IIS_BSTRSP:
1244 case ISAR_IIS_IOM2RSP:
1245 rcv_mbox(cs, ireg, (u_char *)ireg->par);
1246 if ((cs->debug & (L1_DEB_HSCX | L1_DEB_HSCX_FIFO))
1247 == L1_DEB_HSCX) {
1248 u_char *tp=debbuf;
1249
1250 tp += sprintf(debbuf, "msg iis(%x) msb(%x)",
1251 ireg->iis, ireg->cmsb);
1252 QuickHex(tp, (u_char *)ireg->par, ireg->clsb);
1253 debugl1(cs, debbuf);
1254 }
1255 break;
1256 case ISAR_IIS_INVMSG:
1257 rcv_mbox(cs, ireg, debbuf);
1258 if (cs->debug & L1_DEB_WARN)
1259 debugl1(cs, "invalid msg his:%x",
1260 ireg->cmsb);
1261 break;
1262 default:
1263 rcv_mbox(cs, ireg, debbuf);
1264 if (cs->debug & L1_DEB_WARN)
1265 debugl1(cs, "unhandled msg iis(%x) ctrl(%x/%x)",
1266 ireg->iis, ireg->cmsb, ireg->clsb);
1267 break;
1268 }
1269 restore_flags(flags);
1270 }
1271
1272 static void
ftimer_handler(struct BCState * bcs)1273 ftimer_handler(struct BCState *bcs) {
1274 if (bcs->cs->debug)
1275 debugl1(bcs->cs, "ftimer flags %04x",
1276 bcs->Flag);
1277 test_and_clear_bit(BC_FLG_FTI_RUN, &bcs->Flag);
1278 if (test_and_clear_bit(BC_FLG_LL_CONN, &bcs->Flag)) {
1279 isar_sched_event(bcs, B_LL_CONNECT);
1280 }
1281 if (test_and_clear_bit(BC_FLG_FTI_FTS, &bcs->Flag)) {
1282 isar_sched_event(bcs, B_LL_OK);
1283 }
1284 }
1285
1286 static void
setup_pump(struct BCState * bcs)1287 setup_pump(struct BCState *bcs) {
1288 struct IsdnCardState *cs = bcs->cs;
1289 u_char dps = SET_DPS(bcs->hw.isar.dpath);
1290 u_char ctrl, param[6];
1291
1292 switch (bcs->mode) {
1293 case L1_MODE_NULL:
1294 case L1_MODE_TRANS:
1295 case L1_MODE_HDLC:
1296 sendmsg(cs, dps | ISAR_HIS_PUMPCFG, PMOD_BYPASS, 0, NULL);
1297 break;
1298 case L1_MODE_V32:
1299 ctrl = PMOD_DATAMODEM;
1300 if (test_bit(BC_FLG_ORIG, &bcs->Flag)) {
1301 ctrl |= PCTRL_ORIG;
1302 param[5] = PV32P6_CTN;
1303 } else {
1304 param[5] = PV32P6_ATN;
1305 }
1306 param[0] = para_TOA; /* 6 db */
1307 param[1] = PV32P2_V23R | PV32P2_V22A | PV32P2_V22B |
1308 PV32P2_V22C | PV32P2_V21 | PV32P2_BEL;
1309 param[2] = PV32P3_AMOD | PV32P3_V32B | PV32P3_V23B;
1310 param[3] = PV32P4_UT144;
1311 param[4] = PV32P5_UT144;
1312 sendmsg(cs, dps | ISAR_HIS_PUMPCFG, ctrl, 6, param);
1313 break;
1314 case L1_MODE_FAX:
1315 ctrl = PMOD_FAX;
1316 if (test_bit(BC_FLG_ORIG, &bcs->Flag)) {
1317 ctrl |= PCTRL_ORIG;
1318 param[1] = PFAXP2_CTN;
1319 } else {
1320 param[1] = PFAXP2_ATN;
1321 }
1322 param[0] = para_TOA; /* 6 db */
1323 sendmsg(cs, dps | ISAR_HIS_PUMPCFG, ctrl, 2, param);
1324 bcs->hw.isar.state = STFAX_NULL;
1325 bcs->hw.isar.newcmd = 0;
1326 bcs->hw.isar.newmod = 0;
1327 test_and_set_bit(BC_FLG_FTI_RUN, &bcs->Flag);
1328 break;
1329 }
1330 udelay(1000);
1331 sendmsg(cs, dps | ISAR_HIS_PSTREQ, 0, 0, NULL);
1332 udelay(1000);
1333 }
1334
1335 static void
setup_sart(struct BCState * bcs)1336 setup_sart(struct BCState *bcs) {
1337 struct IsdnCardState *cs = bcs->cs;
1338 u_char dps = SET_DPS(bcs->hw.isar.dpath);
1339 u_char ctrl, param[2];
1340
1341 switch (bcs->mode) {
1342 case L1_MODE_NULL:
1343 sendmsg(cs, dps | ISAR_HIS_SARTCFG, SMODE_DISABLE, 0,
1344 NULL);
1345 break;
1346 case L1_MODE_TRANS:
1347 sendmsg(cs, dps | ISAR_HIS_SARTCFG, SMODE_BINARY, 2,
1348 "\0\0");
1349 break;
1350 case L1_MODE_HDLC:
1351 param[0] = 0;
1352 sendmsg(cs, dps | ISAR_HIS_SARTCFG, SMODE_HDLC, 1,
1353 param);
1354 break;
1355 case L1_MODE_V32:
1356 ctrl = SMODE_V14 | SCTRL_HDMC_BOTH;
1357 param[0] = S_P1_CHS_8;
1358 param[1] = S_P2_BFT_DEF;
1359 sendmsg(cs, dps | ISAR_HIS_SARTCFG, ctrl, 2,
1360 param);
1361 break;
1362 case L1_MODE_FAX:
1363 /* SART must not configured with FAX */
1364 break;
1365 }
1366 udelay(1000);
1367 sendmsg(cs, dps | ISAR_HIS_BSTREQ, 0, 0, NULL);
1368 udelay(1000);
1369 }
1370
1371 static void
setup_iom2(struct BCState * bcs)1372 setup_iom2(struct BCState *bcs) {
1373 struct IsdnCardState *cs = bcs->cs;
1374 u_char dps = SET_DPS(bcs->hw.isar.dpath);
1375 u_char cmsb = IOM_CTRL_ENA, msg[5] = {IOM_P1_TXD,0,0,0,0};
1376
1377 if (bcs->channel)
1378 msg[1] = msg[3] = 1;
1379 switch (bcs->mode) {
1380 case L1_MODE_NULL:
1381 cmsb = 0;
1382 /* dummy slot */
1383 msg[1] = msg[3] = bcs->hw.isar.dpath + 2;
1384 break;
1385 case L1_MODE_TRANS:
1386 case L1_MODE_HDLC:
1387 break;
1388 case L1_MODE_V32:
1389 case L1_MODE_FAX:
1390 cmsb |= IOM_CTRL_ALAW | IOM_CTRL_RCV;
1391 break;
1392 }
1393 sendmsg(cs, dps | ISAR_HIS_IOM2CFG, cmsb, 5, msg);
1394 udelay(1000);
1395 sendmsg(cs, dps | ISAR_HIS_IOM2REQ, 0, 0, NULL);
1396 udelay(1000);
1397 }
1398
1399 int
modeisar(struct BCState * bcs,int mode,int bc)1400 modeisar(struct BCState *bcs, int mode, int bc)
1401 {
1402 struct IsdnCardState *cs = bcs->cs;
1403
1404 /* Here we are selecting the best datapath for requested mode */
1405 if(bcs->mode == L1_MODE_NULL) { /* New Setup */
1406 bcs->channel = bc;
1407 switch (mode) {
1408 case L1_MODE_NULL: /* init */
1409 if (!bcs->hw.isar.dpath)
1410 /* no init for dpath 0 */
1411 return(0);
1412 break;
1413 case L1_MODE_TRANS:
1414 case L1_MODE_HDLC:
1415 /* best is datapath 2 */
1416 if (!test_and_set_bit(ISAR_DP2_USE,
1417 &bcs->hw.isar.reg->Flags))
1418 bcs->hw.isar.dpath = 2;
1419 else if (!test_and_set_bit(ISAR_DP1_USE,
1420 &bcs->hw.isar.reg->Flags))
1421 bcs->hw.isar.dpath = 1;
1422 else {
1423 printk(KERN_WARNING"isar modeisar both pathes in use\n");
1424 return(1);
1425 }
1426 break;
1427 case L1_MODE_V32:
1428 case L1_MODE_FAX:
1429 /* only datapath 1 */
1430 if (!test_and_set_bit(ISAR_DP1_USE,
1431 &bcs->hw.isar.reg->Flags))
1432 bcs->hw.isar.dpath = 1;
1433 else {
1434 printk(KERN_WARNING"isar modeisar analog funktions only with DP1\n");
1435 debugl1(cs, "isar modeisar analog funktions only with DP1");
1436 return(1);
1437 }
1438 break;
1439 }
1440 }
1441 if (cs->debug & L1_DEB_HSCX)
1442 debugl1(cs, "isar dp%d mode %d->%d ichan %d",
1443 bcs->hw.isar.dpath, bcs->mode, mode, bc);
1444 bcs->mode = mode;
1445 setup_pump(bcs);
1446 setup_iom2(bcs);
1447 setup_sart(bcs);
1448 if (bcs->mode == L1_MODE_NULL) {
1449 /* Clear resources */
1450 if (bcs->hw.isar.dpath == 1)
1451 test_and_clear_bit(ISAR_DP1_USE, &bcs->hw.isar.reg->Flags);
1452 else if (bcs->hw.isar.dpath == 2)
1453 test_and_clear_bit(ISAR_DP2_USE, &bcs->hw.isar.reg->Flags);
1454 bcs->hw.isar.dpath = 0;
1455 }
1456 return(0);
1457 }
1458
1459 static void
isar_pump_cmd(struct BCState * bcs,u_char cmd,u_char para)1460 isar_pump_cmd(struct BCState *bcs, u_char cmd, u_char para)
1461 {
1462 struct IsdnCardState *cs = bcs->cs;
1463 u_char dps = SET_DPS(bcs->hw.isar.dpath);
1464 u_char ctrl = 0, nom = 0, p1 = 0;
1465
1466 switch(cmd) {
1467 case ISDN_FAX_CLASS1_FTM:
1468 test_and_clear_bit(BC_FLG_FRH_WAIT, &bcs->Flag);
1469 if (bcs->hw.isar.state == STFAX_READY) {
1470 p1 = para;
1471 ctrl = PCTRL_CMD_FTM;
1472 nom = 1;
1473 bcs->hw.isar.state = STFAX_LINE;
1474 bcs->hw.isar.cmd = ctrl;
1475 bcs->hw.isar.mod = para;
1476 bcs->hw.isar.newmod = 0;
1477 bcs->hw.isar.newcmd = 0;
1478 bcs->hw.isar.try_mod = 3;
1479 } else if ((bcs->hw.isar.state == STFAX_ACTIV) &&
1480 (bcs->hw.isar.cmd == PCTRL_CMD_FTM) &&
1481 (bcs->hw.isar.mod == para)) {
1482 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_CONNECT);
1483 } else {
1484 bcs->hw.isar.newmod = para;
1485 bcs->hw.isar.newcmd = PCTRL_CMD_FTM;
1486 nom = 0;
1487 ctrl = PCTRL_CMD_ESC;
1488 bcs->hw.isar.state = STFAX_ESCAPE;
1489 }
1490 break;
1491 case ISDN_FAX_CLASS1_FTH:
1492 test_and_clear_bit(BC_FLG_FRH_WAIT, &bcs->Flag);
1493 if (bcs->hw.isar.state == STFAX_READY) {
1494 p1 = para;
1495 ctrl = PCTRL_CMD_FTH;
1496 nom = 1;
1497 bcs->hw.isar.state = STFAX_LINE;
1498 bcs->hw.isar.cmd = ctrl;
1499 bcs->hw.isar.mod = para;
1500 bcs->hw.isar.newmod = 0;
1501 bcs->hw.isar.newcmd = 0;
1502 bcs->hw.isar.try_mod = 3;
1503 } else if ((bcs->hw.isar.state == STFAX_ACTIV) &&
1504 (bcs->hw.isar.cmd == PCTRL_CMD_FTH) &&
1505 (bcs->hw.isar.mod == para)) {
1506 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_CONNECT);
1507 } else {
1508 bcs->hw.isar.newmod = para;
1509 bcs->hw.isar.newcmd = PCTRL_CMD_FTH;
1510 nom = 0;
1511 ctrl = PCTRL_CMD_ESC;
1512 bcs->hw.isar.state = STFAX_ESCAPE;
1513 }
1514 break;
1515 case ISDN_FAX_CLASS1_FRM:
1516 test_and_clear_bit(BC_FLG_FRH_WAIT, &bcs->Flag);
1517 if (bcs->hw.isar.state == STFAX_READY) {
1518 p1 = para;
1519 ctrl = PCTRL_CMD_FRM;
1520 nom = 1;
1521 bcs->hw.isar.state = STFAX_LINE;
1522 bcs->hw.isar.cmd = ctrl;
1523 bcs->hw.isar.mod = para;
1524 bcs->hw.isar.newmod = 0;
1525 bcs->hw.isar.newcmd = 0;
1526 bcs->hw.isar.try_mod = 3;
1527 } else if ((bcs->hw.isar.state == STFAX_ACTIV) &&
1528 (bcs->hw.isar.cmd == PCTRL_CMD_FRM) &&
1529 (bcs->hw.isar.mod == para)) {
1530 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_CONNECT);
1531 } else {
1532 bcs->hw.isar.newmod = para;
1533 bcs->hw.isar.newcmd = PCTRL_CMD_FRM;
1534 nom = 0;
1535 ctrl = PCTRL_CMD_ESC;
1536 bcs->hw.isar.state = STFAX_ESCAPE;
1537 }
1538 break;
1539 case ISDN_FAX_CLASS1_FRH:
1540 test_and_set_bit(BC_FLG_FRH_WAIT, &bcs->Flag);
1541 if (bcs->hw.isar.state == STFAX_READY) {
1542 p1 = para;
1543 ctrl = PCTRL_CMD_FRH;
1544 nom = 1;
1545 bcs->hw.isar.state = STFAX_LINE;
1546 bcs->hw.isar.cmd = ctrl;
1547 bcs->hw.isar.mod = para;
1548 bcs->hw.isar.newmod = 0;
1549 bcs->hw.isar.newcmd = 0;
1550 bcs->hw.isar.try_mod = 3;
1551 } else if ((bcs->hw.isar.state == STFAX_ACTIV) &&
1552 (bcs->hw.isar.cmd == PCTRL_CMD_FRH) &&
1553 (bcs->hw.isar.mod == para)) {
1554 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_CONNECT);
1555 } else {
1556 bcs->hw.isar.newmod = para;
1557 bcs->hw.isar.newcmd = PCTRL_CMD_FRH;
1558 nom = 0;
1559 ctrl = PCTRL_CMD_ESC;
1560 bcs->hw.isar.state = STFAX_ESCAPE;
1561 }
1562 break;
1563 case ISDN_FAXPUMP_HALT:
1564 bcs->hw.isar.state = STFAX_NULL;
1565 nom = 0;
1566 ctrl = PCTRL_CMD_HALT;
1567 break;
1568 }
1569 if (ctrl)
1570 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, ctrl, nom, &p1);
1571 }
1572
1573 void
isar_setup(struct IsdnCardState * cs)1574 isar_setup(struct IsdnCardState *cs)
1575 {
1576 u_char msg;
1577 int i;
1578
1579 /* Dpath 1, 2 */
1580 msg = 61;
1581 for (i=0; i<2; i++) {
1582 /* Buffer Config */
1583 sendmsg(cs, (i ? ISAR_HIS_DPS2 : ISAR_HIS_DPS1) |
1584 ISAR_HIS_P12CFG, 4, 1, &msg);
1585 cs->bcs[i].hw.isar.mml = msg;
1586 cs->bcs[i].mode = 0;
1587 cs->bcs[i].hw.isar.dpath = i + 1;
1588 modeisar(&cs->bcs[i], 0, 0);
1589 cs->bcs[i].tqueue.routine = (void *) (void *) isar_bh;
1590 }
1591 }
1592
1593 void
isar_l2l1(struct PStack * st,int pr,void * arg)1594 isar_l2l1(struct PStack *st, int pr, void *arg)
1595 {
1596 struct sk_buff *skb = arg;
1597 long flags;
1598
1599 switch (pr) {
1600 case (PH_DATA | REQUEST):
1601 save_flags(flags);
1602 cli();
1603 if (st->l1.bcs->tx_skb) {
1604 skb_queue_tail(&st->l1.bcs->squeue, skb);
1605 restore_flags(flags);
1606 } else {
1607 st->l1.bcs->tx_skb = skb;
1608 test_and_set_bit(BC_FLG_BUSY, &st->l1.bcs->Flag);
1609 if (st->l1.bcs->cs->debug & L1_DEB_HSCX)
1610 debugl1(st->l1.bcs->cs, "DRQ set BC_FLG_BUSY");
1611 st->l1.bcs->hw.isar.txcnt = 0;
1612 restore_flags(flags);
1613 st->l1.bcs->cs->BC_Send_Data(st->l1.bcs);
1614 }
1615 break;
1616 case (PH_PULL | INDICATION):
1617 if (st->l1.bcs->tx_skb) {
1618 printk(KERN_WARNING "isar_l2l1: this shouldn't happen\n");
1619 break;
1620 }
1621 test_and_set_bit(BC_FLG_BUSY, &st->l1.bcs->Flag);
1622 if (st->l1.bcs->cs->debug & L1_DEB_HSCX)
1623 debugl1(st->l1.bcs->cs, "PUI set BC_FLG_BUSY");
1624 st->l1.bcs->tx_skb = skb;
1625 st->l1.bcs->hw.isar.txcnt = 0;
1626 st->l1.bcs->cs->BC_Send_Data(st->l1.bcs);
1627 break;
1628 case (PH_PULL | REQUEST):
1629 if (!st->l1.bcs->tx_skb) {
1630 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
1631 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
1632 } else
1633 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
1634 break;
1635 case (PH_ACTIVATE | REQUEST):
1636 test_and_set_bit(BC_FLG_ACTIV, &st->l1.bcs->Flag);
1637 st->l1.bcs->hw.isar.conmsg[0] = 0;
1638 if (test_bit(FLG_ORIG, &st->l2.flag))
1639 test_and_set_bit(BC_FLG_ORIG, &st->l1.bcs->Flag);
1640 else
1641 test_and_clear_bit(BC_FLG_ORIG, &st->l1.bcs->Flag);
1642 switch(st->l1.mode) {
1643 case L1_MODE_TRANS:
1644 case L1_MODE_HDLC:
1645 if (modeisar(st->l1.bcs, st->l1.mode, st->l1.bc))
1646 l1_msg_b(st, PH_DEACTIVATE | REQUEST, arg);
1647 else
1648 l1_msg_b(st, PH_ACTIVATE | REQUEST, arg);
1649 break;
1650 case L1_MODE_V32:
1651 case L1_MODE_FAX:
1652 if (modeisar(st->l1.bcs, st->l1.mode, st->l1.bc))
1653 l1_msg_b(st, PH_DEACTIVATE | REQUEST, arg);
1654 break;
1655 }
1656 break;
1657 case (PH_DEACTIVATE | REQUEST):
1658 l1_msg_b(st, pr, arg);
1659 break;
1660 case (PH_DEACTIVATE | CONFIRM):
1661 switch(st->l1.mode) {
1662 case L1_MODE_TRANS:
1663 case L1_MODE_HDLC:
1664 case L1_MODE_V32:
1665 break;
1666 case L1_MODE_FAX:
1667 isar_pump_cmd(st->l1.bcs, ISDN_FAXPUMP_HALT, 0);
1668 break;
1669 }
1670 test_and_clear_bit(BC_FLG_ACTIV, &st->l1.bcs->Flag);
1671 test_and_clear_bit(BC_FLG_BUSY, &st->l1.bcs->Flag);
1672 if (st->l1.bcs->cs->debug & L1_DEB_HSCX)
1673 debugl1(st->l1.bcs->cs, "PDAC clear BC_FLG_BUSY");
1674 modeisar(st->l1.bcs, 0, st->l1.bc);
1675 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
1676 break;
1677 }
1678 }
1679
1680 void
close_isarstate(struct BCState * bcs)1681 close_isarstate(struct BCState *bcs)
1682 {
1683 modeisar(bcs, 0, bcs->channel);
1684 if (test_and_clear_bit(BC_FLG_INIT, &bcs->Flag)) {
1685 if (bcs->hw.isar.rcvbuf) {
1686 kfree(bcs->hw.isar.rcvbuf);
1687 bcs->hw.isar.rcvbuf = NULL;
1688 }
1689 skb_queue_purge(&bcs->rqueue);
1690 skb_queue_purge(&bcs->squeue);
1691 if (bcs->tx_skb) {
1692 dev_kfree_skb_any(bcs->tx_skb);
1693 bcs->tx_skb = NULL;
1694 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
1695 if (bcs->cs->debug & L1_DEB_HSCX)
1696 debugl1(bcs->cs, "closeisar clear BC_FLG_BUSY");
1697 }
1698 }
1699 del_timer(&bcs->hw.isar.ftimer);
1700 }
1701
1702 int
open_isarstate(struct IsdnCardState * cs,struct BCState * bcs)1703 open_isarstate(struct IsdnCardState *cs, struct BCState *bcs)
1704 {
1705 if (!test_and_set_bit(BC_FLG_INIT, &bcs->Flag)) {
1706 if (!(bcs->hw.isar.rcvbuf = kmalloc(HSCX_BUFMAX, GFP_ATOMIC))) {
1707 printk(KERN_WARNING
1708 "HiSax: No memory for isar.rcvbuf\n");
1709 return (1);
1710 }
1711 skb_queue_head_init(&bcs->rqueue);
1712 skb_queue_head_init(&bcs->squeue);
1713 }
1714 bcs->tx_skb = NULL;
1715 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
1716 if (cs->debug & L1_DEB_HSCX)
1717 debugl1(cs, "openisar clear BC_FLG_BUSY");
1718 bcs->event = 0;
1719 bcs->hw.isar.rcvidx = 0;
1720 bcs->tx_cnt = 0;
1721 bcs->hw.isar.ftimer.function = (void *) ftimer_handler;
1722 bcs->hw.isar.ftimer.data = (long) bcs;
1723 init_timer(&bcs->hw.isar.ftimer);
1724 return (0);
1725 }
1726
1727 int
setstack_isar(struct PStack * st,struct BCState * bcs)1728 setstack_isar(struct PStack *st, struct BCState *bcs)
1729 {
1730 bcs->channel = st->l1.bc;
1731 if (open_isarstate(st->l1.hardware, bcs))
1732 return (-1);
1733 st->l1.bcs = bcs;
1734 st->l2.l2l1 = isar_l2l1;
1735 setstack_manager(st);
1736 bcs->st = st;
1737 setstack_l1_B(st);
1738 return (0);
1739 }
1740
1741 int
isar_auxcmd(struct IsdnCardState * cs,isdn_ctrl * ic)1742 isar_auxcmd(struct IsdnCardState *cs, isdn_ctrl *ic) {
1743 u_long adr;
1744 int features, i;
1745 struct BCState *bcs;
1746
1747 if (cs->debug & L1_DEB_HSCX)
1748 debugl1(cs, "isar_auxcmd cmd/ch %x/%d", ic->command, ic->arg);
1749 switch (ic->command) {
1750 case (ISDN_CMD_FAXCMD):
1751 bcs = cs->channel[ic->arg].bcs;
1752 if (cs->debug & L1_DEB_HSCX)
1753 debugl1(cs, "isar_auxcmd cmd/subcmd %d/%d",
1754 ic->parm.aux.cmd, ic->parm.aux.subcmd);
1755 switch(ic->parm.aux.cmd) {
1756 case ISDN_FAX_CLASS1_CTRL:
1757 if (ic->parm.aux.subcmd == ETX)
1758 test_and_set_bit(BC_FLG_DLEETX,
1759 &bcs->Flag);
1760 break;
1761 case ISDN_FAX_CLASS1_FTS:
1762 if (ic->parm.aux.subcmd == AT_QUERY) {
1763 ic->command = ISDN_STAT_FAXIND;
1764 ic->parm.aux.cmd = ISDN_FAX_CLASS1_OK;
1765 cs->iif.statcallb(ic);
1766 return(0);
1767 } else if (ic->parm.aux.subcmd == AT_EQ_QUERY) {
1768 strcpy(ic->parm.aux.para, "0-255");
1769 ic->command = ISDN_STAT_FAXIND;
1770 ic->parm.aux.cmd = ISDN_FAX_CLASS1_QUERY;
1771 cs->iif.statcallb(ic);
1772 return(0);
1773 } else if (ic->parm.aux.subcmd == AT_EQ_VALUE) {
1774 if (cs->debug & L1_DEB_HSCX)
1775 debugl1(cs, "isar_auxcmd %s=%d",
1776 FC1_CMD[ic->parm.aux.cmd], ic->parm.aux.para[0]);
1777 if (bcs->hw.isar.state == STFAX_READY) {
1778 if (! ic->parm.aux.para[0]) {
1779 ic->command = ISDN_STAT_FAXIND;
1780 ic->parm.aux.cmd = ISDN_FAX_CLASS1_OK;
1781 cs->iif.statcallb(ic);
1782 return(0);
1783 }
1784 if (! test_and_set_bit(BC_FLG_FTI_RUN, &bcs->Flag)) {
1785 /* n*10 ms */
1786 bcs->hw.isar.ftimer.expires =
1787 jiffies + ((ic->parm.aux.para[0] * 10 * HZ)/1000);
1788 test_and_set_bit(BC_FLG_FTI_FTS, &bcs->Flag);
1789 add_timer(&bcs->hw.isar.ftimer);
1790 return(0);
1791 } else {
1792 if (cs->debug)
1793 debugl1(cs, "isar FTS=%d and FTI busy",
1794 ic->parm.aux.para[0]);
1795 }
1796 } else {
1797 if (cs->debug)
1798 debugl1(cs, "isar FTS=%d and isar.state not ready(%x)",
1799 ic->parm.aux.para[0],bcs->hw.isar.state);
1800 }
1801 ic->command = ISDN_STAT_FAXIND;
1802 ic->parm.aux.cmd = ISDN_FAX_CLASS1_ERROR;
1803 cs->iif.statcallb(ic);
1804 }
1805 break;
1806 case ISDN_FAX_CLASS1_FRM:
1807 case ISDN_FAX_CLASS1_FRH:
1808 case ISDN_FAX_CLASS1_FTM:
1809 case ISDN_FAX_CLASS1_FTH:
1810 if (ic->parm.aux.subcmd == AT_QUERY) {
1811 sprintf(ic->parm.aux.para,
1812 "%d", bcs->hw.isar.mod);
1813 ic->command = ISDN_STAT_FAXIND;
1814 ic->parm.aux.cmd = ISDN_FAX_CLASS1_QUERY;
1815 cs->iif.statcallb(ic);
1816 return(0);
1817 } else if (ic->parm.aux.subcmd == AT_EQ_QUERY) {
1818 char *p = ic->parm.aux.para;
1819 for(i=0;i<FAXMODCNT;i++)
1820 if ((1<<i) & modmask)
1821 p += sprintf(p, "%d,", faxmodulation[i]);
1822 p--;
1823 *p=0;
1824 ic->command = ISDN_STAT_FAXIND;
1825 ic->parm.aux.cmd = ISDN_FAX_CLASS1_QUERY;
1826 cs->iif.statcallb(ic);
1827 return(0);
1828 } else if (ic->parm.aux.subcmd == AT_EQ_VALUE) {
1829 if (cs->debug & L1_DEB_HSCX)
1830 debugl1(cs, "isar_auxcmd %s=%d",
1831 FC1_CMD[ic->parm.aux.cmd], ic->parm.aux.para[0]);
1832 for(i=0;i<FAXMODCNT;i++)
1833 if (faxmodulation[i]==ic->parm.aux.para[0])
1834 break;
1835 if ((i < FAXMODCNT) && ((1<<i) & modmask) &&
1836 test_bit(BC_FLG_INIT, &bcs->Flag)) {
1837 isar_pump_cmd(bcs,
1838 ic->parm.aux.cmd,
1839 ic->parm.aux.para[0]);
1840 return(0);
1841 }
1842 }
1843 /* wrong modulation or not activ */
1844 /* fall through */
1845 default:
1846 ic->command = ISDN_STAT_FAXIND;
1847 ic->parm.aux.cmd = ISDN_FAX_CLASS1_ERROR;
1848 cs->iif.statcallb(ic);
1849 }
1850 break;
1851 case (ISDN_CMD_IOCTL):
1852 switch (ic->arg) {
1853 case 9: /* load firmware */
1854 features = ISDN_FEATURE_L2_MODEM |
1855 ISDN_FEATURE_L2_FAX |
1856 ISDN_FEATURE_L3_FCLASS1;
1857 memcpy(&adr, ic->parm.num, sizeof(ulong));
1858 if (isar_load_firmware(cs, (u_char *)adr))
1859 return(1);
1860 else
1861 ll_run(cs, features);
1862 break;
1863 case 20:
1864 features = *(unsigned int *) ic->parm.num;
1865 printk(KERN_DEBUG "HiSax: max modulation old(%04x) new(%04x)\n",
1866 modmask, features);
1867 modmask = features;
1868 break;
1869 case 21:
1870 features = *(unsigned int *) ic->parm.num;
1871 printk(KERN_DEBUG "HiSax: FRM extra delay old(%d) new(%d) ms\n",
1872 frm_extra_delay, features);
1873 if (features >= 0)
1874 frm_extra_delay = features;
1875 break;
1876 case 22:
1877 features = *(unsigned int *) ic->parm.num;
1878 printk(KERN_DEBUG "HiSax: TOA old(%d) new(%d) db\n",
1879 para_TOA, features);
1880 if (features >= 0 && features < 32)
1881 para_TOA = features;
1882 break;
1883 default:
1884 printk(KERN_DEBUG "HiSax: invalid ioctl %d\n",
1885 (int) ic->arg);
1886 return(-EINVAL);
1887 }
1888 break;
1889 default:
1890 return(-EINVAL);
1891 }
1892 return(0);
1893 }
1894
1895 void __devinit
initisar(struct IsdnCardState * cs)1896 initisar(struct IsdnCardState *cs)
1897 {
1898 cs->bcs[0].BC_SetStack = setstack_isar;
1899 cs->bcs[1].BC_SetStack = setstack_isar;
1900 cs->bcs[0].BC_Close = close_isarstate;
1901 cs->bcs[1].BC_Close = close_isarstate;
1902 }
1903