1 /*
2 * arch/arm/mach-tegra/include/mach/io.h
3 *
4 * Copyright (C) 2010 Google, Inc.
5 *
6 * Author:
7 * Colin Cross <ccross@google.com>
8 * Erik Gilling <konkers@google.com>
9 *
10 * This software is licensed under the terms of the GNU General Public
11 * License version 2, as published by the Free Software Foundation, and
12 * may be copied, distributed, and modified under those terms.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 */
20
21 #ifndef __MACH_TEGRA_IO_H
22 #define __MACH_TEGRA_IO_H
23
24 #define IO_SPACE_LIMIT 0xffff
25
26 /* On TEGRA, many peripherals are very closely packed in
27 * two 256MB io windows (that actually only use about 64KB
28 * at the start of each).
29 *
30 * We will just map the first 1MB of each window (to minimize
31 * pt entries needed) and provide a macro to transform physical
32 * io addresses to an appropriate void __iomem *.
33 *
34 */
35
36 #define IO_IRAM_PHYS 0x40000000
37 #define IO_IRAM_VIRT 0xFE400000
38 #define IO_IRAM_SIZE SZ_256K
39
40 #define IO_CPU_PHYS 0x50040000
41 #define IO_CPU_VIRT 0xFE000000
42 #define IO_CPU_SIZE SZ_16K
43
44 #define IO_PPSB_PHYS 0x60000000
45 #define IO_PPSB_VIRT 0xFE200000
46 #define IO_PPSB_SIZE SZ_1M
47
48 #define IO_APB_PHYS 0x70000000
49 #define IO_APB_VIRT 0xFE300000
50 #define IO_APB_SIZE SZ_1M
51
52 #define IO_TO_VIRT_BETWEEN(p, st, sz) ((p) >= (st) && (p) < ((st) + (sz)))
53 #define IO_TO_VIRT_XLATE(p, pst, vst) (((p) - (pst) + (vst)))
54
55 #define IO_TO_VIRT(n) ( \
56 IO_TO_VIRT_BETWEEN((n), IO_PPSB_PHYS, IO_PPSB_SIZE) ? \
57 IO_TO_VIRT_XLATE((n), IO_PPSB_PHYS, IO_PPSB_VIRT) : \
58 IO_TO_VIRT_BETWEEN((n), IO_APB_PHYS, IO_APB_SIZE) ? \
59 IO_TO_VIRT_XLATE((n), IO_APB_PHYS, IO_APB_VIRT) : \
60 IO_TO_VIRT_BETWEEN((n), IO_CPU_PHYS, IO_CPU_SIZE) ? \
61 IO_TO_VIRT_XLATE((n), IO_CPU_PHYS, IO_CPU_VIRT) : \
62 IO_TO_VIRT_BETWEEN((n), IO_IRAM_PHYS, IO_IRAM_SIZE) ? \
63 IO_TO_VIRT_XLATE((n), IO_IRAM_PHYS, IO_IRAM_VIRT) : \
64 0)
65
66 #ifndef __ASSEMBLER__
67
68 #define __arch_ioremap tegra_ioremap
69 #define __arch_iounmap tegra_iounmap
70
71 void __iomem *tegra_ioremap(unsigned long phys, size_t size, unsigned int type);
72 void tegra_iounmap(volatile void __iomem *addr);
73
74 #define IO_ADDRESS(n) ((void __iomem *) IO_TO_VIRT(n))
75
76 #ifdef CONFIG_TEGRA_PCI
77 extern void __iomem *tegra_pcie_io_base;
78
__io(unsigned long addr)79 static inline void __iomem *__io(unsigned long addr)
80 {
81 return tegra_pcie_io_base + (addr & IO_SPACE_LIMIT);
82 }
83 #else
__io(unsigned long addr)84 static inline void __iomem *__io(unsigned long addr)
85 {
86 return (void __iomem *)addr;
87 }
88 #endif
89
90 #define __io(a) __io(a)
91 #define __mem_pci(a) (a)
92
93 #endif
94
95 #endif
96