1 /* 2 * Copyright (c) 2000-2003 LSI Logic Corporation. 3 * 4 * 5 * Name: mpi_ioc.h 6 * Title: MPI IOC, Port, Event, FW Download, and FW Upload messages 7 * Creation Date: August 11, 2000 8 * 9 * mpi_ioc.h Version: 01.05.xx 10 * 11 * Version History 12 * --------------- 13 * 14 * Date Version Description 15 * -------- -------- ------------------------------------------------------ 16 * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000. 17 * 05-24-00 00.10.02 Added _MSG_IOC_INIT_REPLY structure. 18 * 06-06-00 01.00.01 Added CurReplyFrameSize field to _MSG_IOC_FACTS_REPLY. 19 * 06-12-00 01.00.02 Added _MSG_PORT_ENABLE_REPLY structure. 20 * Added _MSG_EVENT_ACK_REPLY structure. 21 * Added _MSG_FW_DOWNLOAD_REPLY structure. 22 * Added _MSG_TOOLBOX_REPLY structure. 23 * 06-30-00 01.00.03 Added MaxLanBuckets to _PORT_FACT_REPLY structure. 24 * 07-27-00 01.00.04 Added _EVENT_DATA structure definitions for _SCSI, 25 * _LINK_STATUS, _LOOP_STATE and _LOGOUT. 26 * 08-11-00 01.00.05 Switched positions of MsgLength and Function fields in 27 * _MSG_EVENT_ACK_REPLY structure to match specification. 28 * 11-02-00 01.01.01 Original release for post 1.0 work. 29 * Added a value for Manufacturer to WhoInit. 30 * 12-04-00 01.01.02 Modified IOCFacts reply, added FWUpload messages, and 31 * removed toolbox message. 32 * 01-09-01 01.01.03 Added event enabled and disabled defines. 33 * Added structures for FwHeader and DataHeader. 34 * Added ImageType to FwUpload reply. 35 * 02-20-01 01.01.04 Started using MPI_POINTER. 36 * 02-27-01 01.01.05 Added event for RAID status change and its event data. 37 * Added IocNumber field to MSG_IOC_FACTS_REPLY. 38 * 03-27-01 01.01.06 Added defines for ProductId field of MPI_FW_HEADER. 39 * Added structure offset comments. 40 * 04-09-01 01.01.07 Added structure EVENT_DATA_EVENT_CHANGE. 41 * 08-08-01 01.02.01 Original release for v1.2 work. 42 * New format for FWVersion and ProductId in 43 * MSG_IOC_FACTS_REPLY and MPI_FW_HEADER. 44 * 08-31-01 01.02.02 Addded event MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE and 45 * related structure and defines. 46 * Added event MPI_EVENT_ON_BUS_TIMER_EXPIRED. 47 * Added MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE. 48 * Replaced a reserved field in MSG_IOC_FACTS_REPLY with 49 * IOCExceptions and changed DataImageSize to reserved. 50 * Added MPI_FW_DOWNLOAD_ITYPE_NVSTORE_DATA and 51 * MPI_FW_UPLOAD_ITYPE_NVDATA. 52 * 09-28-01 01.02.03 Modified Event Data for Integrated RAID. 53 * 11-01-01 01.02.04 Added defines for MPI_EXT_IMAGE_HEADER ImageType field. 54 * 03-14-02 01.02.05 Added HeaderVersion field to MSG_IOC_FACTS_REPLY. 55 * 05-31-02 01.02.06 Added define for 56 * MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID. 57 * Added AliasIndex to EVENT_DATA_LOGOUT structure. 58 * 04-01-03 01.02.07 Added defines for MPI_FW_HEADER_SIGNATURE_. 59 * 06-26-03 01.02.08 Added new values to the product family defines. 60 * -------------------------------------------------------------------------- 61 */ 62 63 #ifndef MPI_IOC_H 64 #define MPI_IOC_H 65 66 67 /***************************************************************************** 68 * 69 * I O C M e s s a g e s 70 * 71 *****************************************************************************/ 72 73 /****************************************************************************/ 74 /* IOCInit message */ 75 /****************************************************************************/ 76 77 typedef struct _MSG_IOC_INIT 78 { 79 U8 WhoInit; /* 00h */ 80 U8 Reserved; /* 01h */ 81 U8 ChainOffset; /* 02h */ 82 U8 Function; /* 03h */ 83 U8 Flags; /* 04h */ 84 U8 MaxDevices; /* 05h */ 85 U8 MaxBuses; /* 06h */ 86 U8 MsgFlags; /* 07h */ 87 U32 MsgContext; /* 08h */ 88 U16 ReplyFrameSize; /* 0Ch */ 89 U8 Reserved1[2]; /* 0Eh */ 90 U32 HostMfaHighAddr; /* 10h */ 91 U32 SenseBufferHighAddr; /* 14h */ 92 U32 ReplyFifoHostSignalingAddr; /* 18h */ 93 } MSG_IOC_INIT, MPI_POINTER PTR_MSG_IOC_INIT, 94 IOCInit_t, MPI_POINTER pIOCInit_t; 95 96 /* WhoInit values */ 97 #define MPI_WHOINIT_NO_ONE (0x00) 98 #define MPI_WHOINIT_SYSTEM_BIOS (0x01) 99 #define MPI_WHOINIT_ROM_BIOS (0x02) 100 #define MPI_WHOINIT_PCI_PEER (0x03) 101 #define MPI_WHOINIT_HOST_DRIVER (0x04) 102 #define MPI_WHOINIT_MANUFACTURER (0x05) 103 104 /* Flags values */ 105 #define MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE (0x01) 106 #define MPI_IOCINIT_FLAGS_REPLY_FIFO_HOST_SIGNAL (0x02) 107 108 typedef struct _MSG_IOC_INIT_REPLY 109 { 110 U8 WhoInit; /* 00h */ 111 U8 Reserved; /* 01h */ 112 U8 MsgLength; /* 02h */ 113 U8 Function; /* 03h */ 114 U8 Flags; /* 04h */ 115 U8 MaxDevices; /* 05h */ 116 U8 MaxBuses; /* 06h */ 117 U8 MsgFlags; /* 07h */ 118 U32 MsgContext; /* 08h */ 119 U16 Reserved2; /* 0Ch */ 120 U16 IOCStatus; /* 0Eh */ 121 U32 IOCLogInfo; /* 10h */ 122 } MSG_IOC_INIT_REPLY, MPI_POINTER PTR_MSG_IOC_INIT_REPLY, 123 IOCInitReply_t, MPI_POINTER pIOCInitReply_t; 124 125 126 127 /****************************************************************************/ 128 /* IOC Facts message */ 129 /****************************************************************************/ 130 131 typedef struct _MSG_IOC_FACTS 132 { 133 U8 Reserved[2]; /* 00h */ 134 U8 ChainOffset; /* 01h */ 135 U8 Function; /* 02h */ 136 U8 Reserved1[3]; /* 03h */ 137 U8 MsgFlags; /* 04h */ 138 U32 MsgContext; /* 08h */ 139 } MSG_IOC_FACTS, MPI_POINTER PTR_IOC_FACTS, 140 IOCFacts_t, MPI_POINTER pIOCFacts_t; 141 142 typedef struct _MPI_FW_VERSION_STRUCT 143 { 144 U8 Dev; /* 00h */ 145 U8 Unit; /* 01h */ 146 U8 Minor; /* 02h */ 147 U8 Major; /* 03h */ 148 } MPI_FW_VERSION_STRUCT; 149 150 typedef union _MPI_FW_VERSION 151 { 152 MPI_FW_VERSION_STRUCT Struct; 153 U32 Word; 154 } MPI_FW_VERSION; 155 156 /* IOC Facts Reply */ 157 typedef struct _MSG_IOC_FACTS_REPLY 158 { 159 U16 MsgVersion; /* 00h */ 160 U8 MsgLength; /* 02h */ 161 U8 Function; /* 03h */ 162 U16 HeaderVersion; /* 04h */ 163 U8 IOCNumber; /* 06h */ 164 U8 MsgFlags; /* 07h */ 165 U32 MsgContext; /* 08h */ 166 U16 IOCExceptions; /* 0Ch */ 167 U16 IOCStatus; /* 0Eh */ 168 U32 IOCLogInfo; /* 10h */ 169 U8 MaxChainDepth; /* 14h */ 170 U8 WhoInit; /* 15h */ 171 U8 BlockSize; /* 16h */ 172 U8 Flags; /* 17h */ 173 U16 ReplyQueueDepth; /* 18h */ 174 U16 RequestFrameSize; /* 1Ah */ 175 U16 Reserved_0101_FWVersion; /* 1Ch */ /* obsolete 16-bit FWVersion */ 176 U16 ProductID; /* 1Eh */ 177 U32 CurrentHostMfaHighAddr; /* 20h */ 178 U16 GlobalCredits; /* 24h */ 179 U8 NumberOfPorts; /* 26h */ 180 U8 EventState; /* 27h */ 181 U32 CurrentSenseBufferHighAddr; /* 28h */ 182 U16 CurReplyFrameSize; /* 2Ch */ 183 U8 MaxDevices; /* 2Eh */ 184 U8 MaxBuses; /* 2Fh */ 185 U32 FWImageSize; /* 30h */ 186 U32 IOCCapabilities; /* 34h */ 187 MPI_FW_VERSION FWVersion; /* 38h */ 188 U16 HighPriorityQueueDepth; /* 3Ch */ 189 U16 Reserved2; /* 3Eh */ 190 } MSG_IOC_FACTS_REPLY, MPI_POINTER PTR_MSG_IOC_FACTS_REPLY, 191 IOCFactsReply_t, MPI_POINTER pIOCFactsReply_t; 192 193 #define MPI_IOCFACTS_MSGVERSION_MAJOR_MASK (0xFF00) 194 #define MPI_IOCFACTS_MSGVERSION_MINOR_MASK (0x00FF) 195 196 #define MPI_IOCFACTS_HEADERVERSION_UNIT_MASK (0xFF00) 197 #define MPI_IOCFACTS_HEADERVERSION_DEV_MASK (0x00FF) 198 199 #define MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL (0x0001) 200 #define MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID (0x0002) 201 #define MPI_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL (0x0004) 202 #define MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL (0x0008) 203 204 #define MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT (0x01) 205 206 #define MPI_IOCFACTS_EVENTSTATE_DISABLED (0x00) 207 #define MPI_IOCFACTS_EVENTSTATE_ENABLED (0x01) 208 209 #define MPI_IOCFACTS_CAPABILITY_HIGH_PRI_Q (0x00000001) 210 #define MPI_IOCFACTS_CAPABILITY_REPLY_HOST_SIGNAL (0x00000002) 211 #define MPI_IOCFACTS_CAPABILITY_QUEUE_FULL_HANDLING (0x00000004) 212 #define MPI_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER (0x00000008) 213 #define MPI_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER (0x00000010) 214 #define MPI_IOCFACTS_CAPABILITY_EXTENDED_BUFFER (0x00000020) 215 #define MPI_IOCFACTS_CAPABILITY_EEDP (0x00000040) 216 217 218 219 /***************************************************************************** 220 * 221 * P o r t M e s s a g e s 222 * 223 *****************************************************************************/ 224 225 /****************************************************************************/ 226 /* Port Facts message and Reply */ 227 /****************************************************************************/ 228 229 typedef struct _MSG_PORT_FACTS 230 { 231 U8 Reserved[2]; /* 00h */ 232 U8 ChainOffset; /* 02h */ 233 U8 Function; /* 03h */ 234 U8 Reserved1[2]; /* 04h */ 235 U8 PortNumber; /* 06h */ 236 U8 MsgFlags; /* 07h */ 237 U32 MsgContext; /* 08h */ 238 } MSG_PORT_FACTS, MPI_POINTER PTR_MSG_PORT_FACTS, 239 PortFacts_t, MPI_POINTER pPortFacts_t; 240 241 typedef struct _MSG_PORT_FACTS_REPLY 242 { 243 U16 Reserved; /* 00h */ 244 U8 MsgLength; /* 02h */ 245 U8 Function; /* 03h */ 246 U16 Reserved1; /* 04h */ 247 U8 PortNumber; /* 06h */ 248 U8 MsgFlags; /* 07h */ 249 U32 MsgContext; /* 08h */ 250 U16 Reserved2; /* 0Ch */ 251 U16 IOCStatus; /* 0Eh */ 252 U32 IOCLogInfo; /* 10h */ 253 U8 Reserved3; /* 14h */ 254 U8 PortType; /* 15h */ 255 U16 MaxDevices; /* 16h */ 256 U16 PortSCSIID; /* 18h */ 257 U16 ProtocolFlags; /* 1Ah */ 258 U16 MaxPostedCmdBuffers; /* 1Ch */ 259 U16 MaxPersistentIDs; /* 1Eh */ 260 U16 MaxLanBuckets; /* 20h */ 261 U16 Reserved4; /* 22h */ 262 U32 Reserved5; /* 24h */ 263 } MSG_PORT_FACTS_REPLY, MPI_POINTER PTR_MSG_PORT_FACTS_REPLY, 264 PortFactsReply_t, MPI_POINTER pPortFactsReply_t; 265 266 267 /* PortTypes values */ 268 269 #define MPI_PORTFACTS_PORTTYPE_INACTIVE (0x00) 270 #define MPI_PORTFACTS_PORTTYPE_SCSI (0x01) 271 #define MPI_PORTFACTS_PORTTYPE_FC (0x10) 272 #define MPI_PORTFACTS_PORTTYPE_ISCSI (0x20) 273 #define MPI_PORTFACTS_PORTTYPE_SAS (0x30) 274 275 /* ProtocolFlags values */ 276 277 #define MPI_PORTFACTS_PROTOCOL_LOGBUSADDR (0x01) 278 #define MPI_PORTFACTS_PROTOCOL_LAN (0x02) 279 #define MPI_PORTFACTS_PROTOCOL_TARGET (0x04) 280 #define MPI_PORTFACTS_PROTOCOL_INITIATOR (0x08) 281 282 283 /****************************************************************************/ 284 /* Port Enable Message */ 285 /****************************************************************************/ 286 287 typedef struct _MSG_PORT_ENABLE 288 { 289 U8 Reserved[2]; /* 00h */ 290 U8 ChainOffset; /* 02h */ 291 U8 Function; /* 03h */ 292 U8 Reserved1[2]; /* 04h */ 293 U8 PortNumber; /* 06h */ 294 U8 MsgFlags; /* 07h */ 295 U32 MsgContext; /* 08h */ 296 } MSG_PORT_ENABLE, MPI_POINTER PTR_MSG_PORT_ENABLE, 297 PortEnable_t, MPI_POINTER pPortEnable_t; 298 299 typedef struct _MSG_PORT_ENABLE_REPLY 300 { 301 U8 Reserved[2]; /* 00h */ 302 U8 MsgLength; /* 02h */ 303 U8 Function; /* 03h */ 304 U8 Reserved1[2]; /* 04h */ 305 U8 PortNumber; /* 05h */ 306 U8 MsgFlags; /* 07h */ 307 U32 MsgContext; /* 08h */ 308 U16 Reserved2; /* 0Ch */ 309 U16 IOCStatus; /* 0Eh */ 310 U32 IOCLogInfo; /* 10h */ 311 } MSG_PORT_ENABLE_REPLY, MPI_POINTER PTR_MSG_PORT_ENABLE_REPLY, 312 PortEnableReply_t, MPI_POINTER pPortEnableReply_t; 313 314 315 /***************************************************************************** 316 * 317 * E v e n t M e s s a g e s 318 * 319 *****************************************************************************/ 320 321 /****************************************************************************/ 322 /* Event Notification messages */ 323 /****************************************************************************/ 324 325 typedef struct _MSG_EVENT_NOTIFY 326 { 327 U8 Switch; /* 00h */ 328 U8 Reserved; /* 01h */ 329 U8 ChainOffset; /* 02h */ 330 U8 Function; /* 03h */ 331 U8 Reserved1[3]; /* 04h */ 332 U8 MsgFlags; /* 07h */ 333 U32 MsgContext; /* 08h */ 334 } MSG_EVENT_NOTIFY, MPI_POINTER PTR_MSG_EVENT_NOTIFY, 335 EventNotification_t, MPI_POINTER pEventNotification_t; 336 337 /* Event Notification Reply */ 338 339 typedef struct _MSG_EVENT_NOTIFY_REPLY 340 { 341 U16 EventDataLength; /* 00h */ 342 U8 MsgLength; /* 02h */ 343 U8 Function; /* 03h */ 344 U8 Reserved1[2]; /* 04h */ 345 U8 AckRequired; /* 06h */ 346 U8 MsgFlags; /* 07h */ 347 U32 MsgContext; /* 08h */ 348 U8 Reserved2[2]; /* 0Ch */ 349 U16 IOCStatus; /* 0Eh */ 350 U32 IOCLogInfo; /* 10h */ 351 U32 Event; /* 14h */ 352 U32 EventContext; /* 18h */ 353 U32 Data[1]; /* 1Ch */ 354 } MSG_EVENT_NOTIFY_REPLY, MPI_POINTER PTR_MSG_EVENT_NOTIFY_REPLY, 355 EventNotificationReply_t, MPI_POINTER pEventNotificationReply_t; 356 357 /* Event Acknowledge */ 358 359 typedef struct _MSG_EVENT_ACK 360 { 361 U8 Reserved[2]; /* 00h */ 362 U8 ChainOffset; /* 02h */ 363 U8 Function; /* 03h */ 364 U8 Reserved1[3]; /* 04h */ 365 U8 MsgFlags; /* 07h */ 366 U32 MsgContext; /* 08h */ 367 U32 Event; /* 0Ch */ 368 U32 EventContext; /* 10h */ 369 } MSG_EVENT_ACK, MPI_POINTER PTR_MSG_EVENT_ACK, 370 EventAck_t, MPI_POINTER pEventAck_t; 371 372 typedef struct _MSG_EVENT_ACK_REPLY 373 { 374 U8 Reserved[2]; /* 00h */ 375 U8 MsgLength; /* 02h */ 376 U8 Function; /* 03h */ 377 U8 Reserved1[3]; /* 04h */ 378 U8 MsgFlags; /* 07h */ 379 U32 MsgContext; /* 08h */ 380 U16 Reserved2; /* 0Ch */ 381 U16 IOCStatus; /* 0Eh */ 382 U32 IOCLogInfo; /* 10h */ 383 } MSG_EVENT_ACK_REPLY, MPI_POINTER PTR_MSG_EVENT_ACK_REPLY, 384 EventAckReply_t, MPI_POINTER pEventAckReply_t; 385 386 /* Switch */ 387 388 #define MPI_EVENT_NOTIFICATION_SWITCH_OFF (0x00) 389 #define MPI_EVENT_NOTIFICATION_SWITCH_ON (0x01) 390 391 /* Event */ 392 393 #define MPI_EVENT_NONE (0x00000000) 394 #define MPI_EVENT_LOG_DATA (0x00000001) 395 #define MPI_EVENT_STATE_CHANGE (0x00000002) 396 #define MPI_EVENT_UNIT_ATTENTION (0x00000003) 397 #define MPI_EVENT_IOC_BUS_RESET (0x00000004) 398 #define MPI_EVENT_EXT_BUS_RESET (0x00000005) 399 #define MPI_EVENT_RESCAN (0x00000006) 400 #define MPI_EVENT_LINK_STATUS_CHANGE (0x00000007) 401 #define MPI_EVENT_LOOP_STATE_CHANGE (0x00000008) 402 #define MPI_EVENT_LOGOUT (0x00000009) 403 #define MPI_EVENT_EVENT_CHANGE (0x0000000A) 404 #define MPI_EVENT_INTEGRATED_RAID (0x0000000B) 405 #define MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE (0x0000000C) 406 #define MPI_EVENT_ON_BUS_TIMER_EXPIRED (0x0000000D) 407 #define MPI_EVENT_QUEUE_FULL (0x0000000E) 408 #define MPI_EVENT_SAS_DEVICE_STATUS_CHANGE (0x0000000F) 409 #define MPI_EVENT_SAS_SES (0x00000010) 410 #define MPI_EVENT_PERSISTENT_TABLE_FULL (0x00000011) 411 412 /* AckRequired field values */ 413 414 #define MPI_EVENT_NOTIFICATION_ACK_NOT_REQUIRED (0x00) 415 #define MPI_EVENT_NOTIFICATION_ACK_REQUIRED (0x01) 416 417 /* EventChange Event data */ 418 419 typedef struct _EVENT_DATA_EVENT_CHANGE 420 { 421 U8 EventState; /* 00h */ 422 U8 Reserved; /* 01h */ 423 U16 Reserved1; /* 02h */ 424 } EVENT_DATA_EVENT_CHANGE, MPI_POINTER PTR_EVENT_DATA_EVENT_CHANGE, 425 EventDataEventChange_t, MPI_POINTER pEventDataEventChange_t; 426 427 /* SCSI Event data for Port, Bus and Device forms */ 428 429 typedef struct _EVENT_DATA_SCSI 430 { 431 U8 TargetID; /* 00h */ 432 U8 BusPort; /* 01h */ 433 U16 Reserved; /* 02h */ 434 } EVENT_DATA_SCSI, MPI_POINTER PTR_EVENT_DATA_SCSI, 435 EventDataScsi_t, MPI_POINTER pEventDataScsi_t; 436 437 /* SCSI Device Status Change Event data */ 438 439 typedef struct _EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE 440 { 441 U8 TargetID; /* 00h */ 442 U8 Bus; /* 01h */ 443 U8 ReasonCode; /* 02h */ 444 U8 LUN; /* 03h */ 445 U8 ASC; /* 04h */ 446 U8 ASCQ; /* 05h */ 447 U16 Reserved; /* 06h */ 448 } EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE, 449 MPI_POINTER PTR_EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE, 450 MpiEventDataScsiDeviceStatusChange_t, 451 MPI_POINTER pMpiEventDataScsiDeviceStatusChange_t; 452 453 /* MPI SCSI Device Status Change Event data ReasonCode values */ 454 #define MPI_EVENT_SCSI_DEV_STAT_RC_ADDED (0x03) 455 #define MPI_EVENT_SCSI_DEV_STAT_RC_NOT_RESPONDING (0x04) 456 #define MPI_EVENT_SCSI_DEV_STAT_RC_SMART_DATA (0x05) 457 458 /* SAS Device Status Change Event data */ 459 460 typedef struct _EVENT_DATA_SAS_DEVICE_STATUS_CHANGE 461 { 462 U8 TargetID; /* 00h */ 463 U8 Bus; /* 01h */ 464 U8 ReasonCode; /* 02h */ 465 U8 Reserved; /* 03h */ 466 U8 ASC; /* 04h */ 467 U8 ASCQ; /* 05h */ 468 U16 DevHandle; /* 06h */ 469 U32 DeviceInfo; /* 08h */ 470 } EVENT_DATA_SAS_DEVICE_STATUS_CHANGE, 471 MPI_POINTER PTR_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE, 472 MpiEventDataSasDeviceStatusChange_t, 473 MPI_POINTER pMpiEventDataSasDeviceStatusChange_t; 474 475 /* MPI SAS Device Status Change Event data ReasonCode values */ 476 #define MPI_EVENT_SAS_DEV_STAT_RC_ADDED (0x03) 477 #define MPI_EVENT_SAS_DEV_STAT_RC_NOT_RESPONDING (0x04) 478 #define MPI_EVENT_SAS_DEV_STAT_RC_SMART_DATA (0x05) 479 #define MPI_EVENT_SAS_DEV_STAT_RC_NO_PERSIST_ADDED (0x06) 480 481 /* SCSI Event data for Queue Full event */ 482 483 typedef struct _EVENT_DATA_QUEUE_FULL 484 { 485 U8 TargetID; /* 00h */ 486 U8 Bus; /* 01h */ 487 U16 CurrentDepth; /* 02h */ 488 } EVENT_DATA_QUEUE_FULL, MPI_POINTER PTR_EVENT_DATA_QUEUE_FULL, 489 EventDataQueueFull_t, MPI_POINTER pEventDataQueueFull_t; 490 491 /* MPI Link Status Change Event data */ 492 493 typedef struct _EVENT_DATA_LINK_STATUS 494 { 495 U8 State; /* 00h */ 496 U8 Reserved; /* 01h */ 497 U16 Reserved1; /* 02h */ 498 U8 Reserved2; /* 04h */ 499 U8 Port; /* 05h */ 500 U16 Reserved3; /* 06h */ 501 } EVENT_DATA_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_LINK_STATUS, 502 EventDataLinkStatus_t, MPI_POINTER pEventDataLinkStatus_t; 503 504 #define MPI_EVENT_LINK_STATUS_FAILURE (0x00000000) 505 #define MPI_EVENT_LINK_STATUS_ACTIVE (0x00000001) 506 507 /* MPI Loop State Change Event data */ 508 509 typedef struct _EVENT_DATA_LOOP_STATE 510 { 511 U8 Character4; /* 00h */ 512 U8 Character3; /* 01h */ 513 U8 Type; /* 02h */ 514 U8 Reserved; /* 03h */ 515 U8 Reserved1; /* 04h */ 516 U8 Port; /* 05h */ 517 U16 Reserved2; /* 06h */ 518 } EVENT_DATA_LOOP_STATE, MPI_POINTER PTR_EVENT_DATA_LOOP_STATE, 519 EventDataLoopState_t, MPI_POINTER pEventDataLoopState_t; 520 521 #define MPI_EVENT_LOOP_STATE_CHANGE_LIP (0x0001) 522 #define MPI_EVENT_LOOP_STATE_CHANGE_LPE (0x0002) 523 #define MPI_EVENT_LOOP_STATE_CHANGE_LPB (0x0003) 524 525 /* MPI LOGOUT Event data */ 526 527 typedef struct _EVENT_DATA_LOGOUT 528 { 529 U32 NPortID; /* 00h */ 530 U8 AliasIndex; /* 04h */ 531 U8 Port; /* 05h */ 532 U16 Reserved1; /* 06h */ 533 } EVENT_DATA_LOGOUT, MPI_POINTER PTR_EVENT_DATA_LOGOUT, 534 EventDataLogout_t, MPI_POINTER pEventDataLogout_t; 535 536 #define MPI_EVENT_LOGOUT_ALL_ALIASES (0xFF) 537 538 539 /* MPI Integrated RAID Event data */ 540 541 typedef struct _EVENT_DATA_RAID 542 { 543 U8 VolumeID; /* 00h */ 544 U8 VolumeBus; /* 01h */ 545 U8 ReasonCode; /* 02h */ 546 U8 PhysDiskNum; /* 03h */ 547 U8 ASC; /* 04h */ 548 U8 ASCQ; /* 05h */ 549 U16 Reserved; /* 06h */ 550 U32 SettingsStatus; /* 08h */ 551 } EVENT_DATA_RAID, MPI_POINTER PTR_EVENT_DATA_RAID, 552 MpiEventDataRaid_t, MPI_POINTER pMpiEventDataRaid_t; 553 554 /* MPI Integrated RAID Event data ReasonCode values */ 555 #define MPI_EVENT_RAID_RC_VOLUME_CREATED (0x00) 556 #define MPI_EVENT_RAID_RC_VOLUME_DELETED (0x01) 557 #define MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED (0x02) 558 #define MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED (0x03) 559 #define MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED (0x04) 560 #define MPI_EVENT_RAID_RC_PHYSDISK_CREATED (0x05) 561 #define MPI_EVENT_RAID_RC_PHYSDISK_DELETED (0x06) 562 #define MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED (0x07) 563 #define MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED (0x08) 564 #define MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED (0x09) 565 #define MPI_EVENT_RAID_RC_SMART_DATA (0x0A) 566 #define MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED (0x0B) 567 568 569 /***************************************************************************** 570 * 571 * F i r m w a r e L o a d M e s s a g e s 572 * 573 *****************************************************************************/ 574 575 /****************************************************************************/ 576 /* Firmware Download message and associated structures */ 577 /****************************************************************************/ 578 579 typedef struct _MSG_FW_DOWNLOAD 580 { 581 U8 ImageType; /* 00h */ 582 U8 Reserved; /* 01h */ 583 U8 ChainOffset; /* 02h */ 584 U8 Function; /* 03h */ 585 U8 Reserved1[3]; /* 04h */ 586 U8 MsgFlags; /* 07h */ 587 U32 MsgContext; /* 08h */ 588 SGE_MPI_UNION SGL; /* 0Ch */ 589 } MSG_FW_DOWNLOAD, MPI_POINTER PTR_MSG_FW_DOWNLOAD, 590 FWDownload_t, MPI_POINTER pFWDownload_t; 591 592 #define MPI_FW_DOWNLOAD_ITYPE_RESERVED (0x00) 593 #define MPI_FW_DOWNLOAD_ITYPE_FW (0x01) 594 #define MPI_FW_DOWNLOAD_ITYPE_BIOS (0x02) 595 #define MPI_FW_DOWNLOAD_ITYPE_NVDATA (0x03) 596 #define MPI_FW_DOWNLOAD_ITYPE_BOOTLOADER (0x04) 597 598 599 typedef struct _FWDownloadTCSGE 600 { 601 U8 Reserved; /* 00h */ 602 U8 ContextSize; /* 01h */ 603 U8 DetailsLength; /* 02h */ 604 U8 Flags; /* 03h */ 605 U32 Reserved_0100_Checksum; /* 04h */ /* obsolete Checksum */ 606 U32 ImageOffset; /* 08h */ 607 U32 ImageSize; /* 0Ch */ 608 } FW_DOWNLOAD_TCSGE, MPI_POINTER PTR_FW_DOWNLOAD_TCSGE, 609 FWDownloadTCSGE_t, MPI_POINTER pFWDownloadTCSGE_t; 610 611 /* Firmware Download reply */ 612 typedef struct _MSG_FW_DOWNLOAD_REPLY 613 { 614 U8 ImageType; /* 00h */ 615 U8 Reserved; /* 01h */ 616 U8 MsgLength; /* 02h */ 617 U8 Function; /* 03h */ 618 U8 Reserved1[3]; /* 04h */ 619 U8 MsgFlags; /* 07h */ 620 U32 MsgContext; /* 08h */ 621 U16 Reserved2; /* 0Ch */ 622 U16 IOCStatus; /* 0Eh */ 623 U32 IOCLogInfo; /* 10h */ 624 } MSG_FW_DOWNLOAD_REPLY, MPI_POINTER PTR_MSG_FW_DOWNLOAD_REPLY, 625 FWDownloadReply_t, MPI_POINTER pFWDownloadReply_t; 626 627 628 /****************************************************************************/ 629 /* Firmware Upload message and associated structures */ 630 /****************************************************************************/ 631 632 typedef struct _MSG_FW_UPLOAD 633 { 634 U8 ImageType; /* 00h */ 635 U8 Reserved; /* 01h */ 636 U8 ChainOffset; /* 02h */ 637 U8 Function; /* 03h */ 638 U8 Reserved1[3]; /* 04h */ 639 U8 MsgFlags; /* 07h */ 640 U32 MsgContext; /* 08h */ 641 SGE_MPI_UNION SGL; /* 0Ch */ 642 } MSG_FW_UPLOAD, MPI_POINTER PTR_MSG_FW_UPLOAD, 643 FWUpload_t, MPI_POINTER pFWUpload_t; 644 645 #define MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM (0x00) 646 #define MPI_FW_UPLOAD_ITYPE_FW_FLASH (0x01) 647 #define MPI_FW_UPLOAD_ITYPE_BIOS_FLASH (0x02) 648 #define MPI_FW_UPLOAD_ITYPE_NVDATA (0x03) 649 #define MPI_FW_UPLOAD_ITYPE_BOOTLOADER (0x04) 650 651 typedef struct _FWUploadTCSGE 652 { 653 U8 Reserved; /* 00h */ 654 U8 ContextSize; /* 01h */ 655 U8 DetailsLength; /* 02h */ 656 U8 Flags; /* 03h */ 657 U32 Reserved1; /* 04h */ 658 U32 ImageOffset; /* 08h */ 659 U32 ImageSize; /* 0Ch */ 660 } FW_UPLOAD_TCSGE, MPI_POINTER PTR_FW_UPLOAD_TCSGE, 661 FWUploadTCSGE_t, MPI_POINTER pFWUploadTCSGE_t; 662 663 /* Firmware Upload reply */ 664 typedef struct _MSG_FW_UPLOAD_REPLY 665 { 666 U8 ImageType; /* 00h */ 667 U8 Reserved; /* 01h */ 668 U8 MsgLength; /* 02h */ 669 U8 Function; /* 03h */ 670 U8 Reserved1[3]; /* 04h */ 671 U8 MsgFlags; /* 07h */ 672 U32 MsgContext; /* 08h */ 673 U16 Reserved2; /* 0Ch */ 674 U16 IOCStatus; /* 0Eh */ 675 U32 IOCLogInfo; /* 10h */ 676 U32 ActualImageSize; /* 14h */ 677 } MSG_FW_UPLOAD_REPLY, MPI_POINTER PTR_MSG_FW_UPLOAD_REPLY, 678 FWUploadReply_t, MPI_POINTER pFWUploadReply_t; 679 680 681 typedef struct _MPI_FW_HEADER 682 { 683 U32 ArmBranchInstruction0; /* 00h */ 684 U32 Signature0; /* 04h */ 685 U32 Signature1; /* 08h */ 686 U32 Signature2; /* 0Ch */ 687 U32 ArmBranchInstruction1; /* 10h */ 688 U32 ArmBranchInstruction2; /* 14h */ 689 U32 Reserved; /* 18h */ 690 U32 Checksum; /* 1Ch */ 691 U16 VendorId; /* 20h */ 692 U16 ProductId; /* 22h */ 693 MPI_FW_VERSION FWVersion; /* 24h */ 694 U32 SeqCodeVersion; /* 28h */ 695 U32 ImageSize; /* 2Ch */ 696 U32 NextImageHeaderOffset; /* 30h */ 697 U32 LoadStartAddress; /* 34h */ 698 U32 IopResetVectorValue; /* 38h */ 699 U32 IopResetRegAddr; /* 3Ch */ 700 U32 VersionNameWhat; /* 40h */ 701 U8 VersionName[32]; /* 44h */ 702 U32 VendorNameWhat; /* 64h */ 703 U8 VendorName[32]; /* 68h */ 704 } MPI_FW_HEADER, MPI_POINTER PTR_MPI_FW_HEADER, 705 MpiFwHeader_t, MPI_POINTER pMpiFwHeader_t; 706 707 #define MPI_FW_HEADER_WHAT_SIGNATURE (0x29232840) 708 709 /* defines for using the ProductId field */ 710 #define MPI_FW_HEADER_PID_TYPE_MASK (0xF000) 711 #define MPI_FW_HEADER_PID_TYPE_SCSI (0x0000) 712 #define MPI_FW_HEADER_PID_TYPE_FC (0x1000) 713 #define MPI_FW_HEADER_PID_TYPE_SAS (0x2000) 714 715 #define MPI_FW_HEADER_SIGNATURE_0 (0x5AEAA55A) 716 #define MPI_FW_HEADER_SIGNATURE_1 (0xA55AEAA5) 717 #define MPI_FW_HEADER_SIGNATURE_2 (0x5AA55AEA) 718 719 #define MPI_FW_HEADER_PID_PROD_MASK (0x0F00) 720 #define MPI_FW_HEADER_PID_PROD_INITIATOR_SCSI (0x0100) 721 #define MPI_FW_HEADER_PID_PROD_TARGET_INITIATOR_SCSI (0x0200) 722 #define MPI_FW_HEADER_PID_PROD_TARGET_SCSI (0x0300) 723 #define MPI_FW_HEADER_PID_PROD_IM_SCSI (0x0400) 724 #define MPI_FW_HEADER_PID_PROD_IS_SCSI (0x0500) 725 #define MPI_FW_HEADER_PID_PROD_CTX_SCSI (0x0600) 726 727 #define MPI_FW_HEADER_PID_FAMILY_MASK (0x00FF) 728 /* SCSI */ 729 #define MPI_FW_HEADER_PID_FAMILY_1030A0_SCSI (0x0001) 730 #define MPI_FW_HEADER_PID_FAMILY_1030B0_SCSI (0x0002) 731 #define MPI_FW_HEADER_PID_FAMILY_1030B1_SCSI (0x0003) 732 #define MPI_FW_HEADER_PID_FAMILY_1030C0_SCSI (0x0004) 733 #define MPI_FW_HEADER_PID_FAMILY_1020A0_SCSI (0x0005) 734 #define MPI_FW_HEADER_PID_FAMILY_1020B0_SCSI (0x0006) 735 #define MPI_FW_HEADER_PID_FAMILY_1020B1_SCSI (0x0007) 736 #define MPI_FW_HEADER_PID_FAMILY_1020C0_SCSI (0x0008) 737 #define MPI_FW_HEADER_PID_FAMILY_1035A0_SCSI (0x0009) 738 #define MPI_FW_HEADER_PID_FAMILY_1035B0_SCSI (0x000A) 739 #define MPI_FW_HEADER_PID_FAMILY_1030TA0_SCSI (0x000B) 740 #define MPI_FW_HEADER_PID_FAMILY_1020TA0_SCSI (0x000C) 741 /* Fibre Channel */ 742 #define MPI_FW_HEADER_PID_FAMILY_909_FC (0x0000) 743 #define MPI_FW_HEADER_PID_FAMILY_919_FC (0x0001) 744 #define MPI_FW_HEADER_PID_FAMILY_919X_FC (0x0002) 745 #define MPI_FW_HEADER_PID_FAMILY_919XL_FC (0x0003) 746 #define MPI_FW_HEADER_PID_FAMILY_949_FC (0x0004) 747 #define MPI_FW_HEADER_PID_FAMILY_959_FC (0x0005) 748 /* SAS */ 749 #define MPI_FW_HEADER_PID_FAMILY_1064_SAS (0x0001) 750 751 typedef struct _MPI_EXT_IMAGE_HEADER 752 { 753 U8 ImageType; /* 00h */ 754 U8 Reserved; /* 01h */ 755 U16 Reserved1; /* 02h */ 756 U32 Checksum; /* 04h */ 757 U32 ImageSize; /* 08h */ 758 U32 NextImageHeaderOffset; /* 0Ch */ 759 U32 LoadStartAddress; /* 10h */ 760 U32 Reserved2; /* 14h */ 761 } MPI_EXT_IMAGE_HEADER, MPI_POINTER PTR_MPI_EXT_IMAGE_HEADER, 762 MpiExtImageHeader_t, MPI_POINTER pMpiExtImageHeader_t; 763 764 /* defines for the ImageType field */ 765 #define MPI_EXT_IMAGE_TYPE_UNSPECIFIED (0x00) 766 #define MPI_EXT_IMAGE_TYPE_FW (0x01) 767 #define MPI_EXT_IMAGE_TYPE_NVDATA (0x03) 768 #define MPI_EXT_IMAGE_TYPE_BOOTLOADER (0x04) 769 770 #endif 771