1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * Copyright (C) 2005, Intec Automation Inc.
4 * Copyright (C) 2014, Freescale Semiconductor, Inc.
5 */
6
7 #ifndef __LINUX_MTD_SPI_NOR_INTERNAL_H
8 #define __LINUX_MTD_SPI_NOR_INTERNAL_H
9
10 #include "sfdp.h"
11
12 #define SPI_NOR_MAX_ID_LEN 6
13
14 /* Standard SPI NOR flash operations. */
15 #define SPI_NOR_READID_OP(naddr, ndummy, buf, len) \
16 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDID, 0), \
17 SPI_MEM_OP_ADDR(naddr, 0, 0), \
18 SPI_MEM_OP_DUMMY(ndummy, 0), \
19 SPI_MEM_OP_DATA_IN(len, buf, 0))
20
21 #define SPI_NOR_WREN_OP \
22 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WREN, 0), \
23 SPI_MEM_OP_NO_ADDR, \
24 SPI_MEM_OP_NO_DUMMY, \
25 SPI_MEM_OP_NO_DATA)
26
27 #define SPI_NOR_WRDI_OP \
28 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRDI, 0), \
29 SPI_MEM_OP_NO_ADDR, \
30 SPI_MEM_OP_NO_DUMMY, \
31 SPI_MEM_OP_NO_DATA)
32
33 #define SPI_NOR_RDSR_OP(buf) \
34 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDSR, 0), \
35 SPI_MEM_OP_NO_ADDR, \
36 SPI_MEM_OP_NO_DUMMY, \
37 SPI_MEM_OP_DATA_IN(1, buf, 0))
38
39 #define SPI_NOR_WRSR_OP(buf, len) \
40 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRSR, 0), \
41 SPI_MEM_OP_NO_ADDR, \
42 SPI_MEM_OP_NO_DUMMY, \
43 SPI_MEM_OP_DATA_OUT(len, buf, 0))
44
45 #define SPI_NOR_RDSR2_OP(buf) \
46 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDSR2, 0), \
47 SPI_MEM_OP_NO_ADDR, \
48 SPI_MEM_OP_NO_DUMMY, \
49 SPI_MEM_OP_DATA_OUT(1, buf, 0))
50
51 #define SPI_NOR_WRSR2_OP(buf) \
52 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRSR2, 0), \
53 SPI_MEM_OP_NO_ADDR, \
54 SPI_MEM_OP_NO_DUMMY, \
55 SPI_MEM_OP_DATA_OUT(1, buf, 0))
56
57 #define SPI_NOR_RDCR_OP(buf) \
58 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDCR, 0), \
59 SPI_MEM_OP_NO_ADDR, \
60 SPI_MEM_OP_NO_DUMMY, \
61 SPI_MEM_OP_DATA_IN(1, buf, 0))
62
63 #define SPI_NOR_EN4B_EX4B_OP(enable) \
64 SPI_MEM_OP(SPI_MEM_OP_CMD(enable ? SPINOR_OP_EN4B : SPINOR_OP_EX4B, 0), \
65 SPI_MEM_OP_NO_ADDR, \
66 SPI_MEM_OP_NO_DUMMY, \
67 SPI_MEM_OP_NO_DATA)
68
69 #define SPI_NOR_BRWR_OP(buf) \
70 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_BRWR, 0), \
71 SPI_MEM_OP_NO_ADDR, \
72 SPI_MEM_OP_NO_DUMMY, \
73 SPI_MEM_OP_DATA_OUT(1, buf, 0))
74
75 #define SPI_NOR_GBULK_OP \
76 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_GBULK, 0), \
77 SPI_MEM_OP_NO_ADDR, \
78 SPI_MEM_OP_NO_DUMMY, \
79 SPI_MEM_OP_NO_DATA)
80
81 #define SPI_NOR_CHIP_ERASE_OP \
82 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_CHIP_ERASE, 0), \
83 SPI_MEM_OP_NO_ADDR, \
84 SPI_MEM_OP_NO_DUMMY, \
85 SPI_MEM_OP_NO_DATA)
86
87 #define SPI_NOR_SECTOR_ERASE_OP(opcode, addr_nbytes, addr) \
88 SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0), \
89 SPI_MEM_OP_ADDR(addr_nbytes, addr, 0), \
90 SPI_MEM_OP_NO_DUMMY, \
91 SPI_MEM_OP_NO_DATA)
92
93 #define SPI_NOR_READ_OP(opcode) \
94 SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0), \
95 SPI_MEM_OP_ADDR(3, 0, 0), \
96 SPI_MEM_OP_DUMMY(1, 0), \
97 SPI_MEM_OP_DATA_IN(2, NULL, 0))
98
99 #define SPI_NOR_PP_OP(opcode) \
100 SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0), \
101 SPI_MEM_OP_ADDR(3, 0, 0), \
102 SPI_MEM_OP_NO_DUMMY, \
103 SPI_MEM_OP_DATA_OUT(2, NULL, 0))
104
105 #define SPINOR_SRSTEN_OP \
106 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_SRSTEN, 0), \
107 SPI_MEM_OP_NO_DUMMY, \
108 SPI_MEM_OP_NO_ADDR, \
109 SPI_MEM_OP_NO_DATA)
110
111 #define SPINOR_SRST_OP \
112 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_SRST, 0), \
113 SPI_MEM_OP_NO_DUMMY, \
114 SPI_MEM_OP_NO_ADDR, \
115 SPI_MEM_OP_NO_DATA)
116
117 /* Keep these in sync with the list in debugfs.c */
118 enum spi_nor_option_flags {
119 SNOR_F_HAS_SR_TB = BIT(0),
120 SNOR_F_NO_OP_CHIP_ERASE = BIT(1),
121 SNOR_F_BROKEN_RESET = BIT(2),
122 SNOR_F_4B_OPCODES = BIT(3),
123 SNOR_F_HAS_4BAIT = BIT(4),
124 SNOR_F_HAS_LOCK = BIT(5),
125 SNOR_F_HAS_16BIT_SR = BIT(6),
126 SNOR_F_NO_READ_CR = BIT(7),
127 SNOR_F_HAS_SR_TB_BIT6 = BIT(8),
128 SNOR_F_HAS_4BIT_BP = BIT(9),
129 SNOR_F_HAS_SR_BP3_BIT6 = BIT(10),
130 SNOR_F_IO_MODE_EN_VOLATILE = BIT(11),
131 SNOR_F_SOFT_RESET = BIT(12),
132 SNOR_F_SWP_IS_VOLATILE = BIT(13),
133 };
134
135 struct spi_nor_read_command {
136 u8 num_mode_clocks;
137 u8 num_wait_states;
138 u8 opcode;
139 enum spi_nor_protocol proto;
140 };
141
142 struct spi_nor_pp_command {
143 u8 opcode;
144 enum spi_nor_protocol proto;
145 };
146
147 enum spi_nor_read_command_index {
148 SNOR_CMD_READ,
149 SNOR_CMD_READ_FAST,
150 SNOR_CMD_READ_1_1_1_DTR,
151
152 /* Dual SPI */
153 SNOR_CMD_READ_1_1_2,
154 SNOR_CMD_READ_1_2_2,
155 SNOR_CMD_READ_2_2_2,
156 SNOR_CMD_READ_1_2_2_DTR,
157
158 /* Quad SPI */
159 SNOR_CMD_READ_1_1_4,
160 SNOR_CMD_READ_1_4_4,
161 SNOR_CMD_READ_4_4_4,
162 SNOR_CMD_READ_1_4_4_DTR,
163
164 /* Octal SPI */
165 SNOR_CMD_READ_1_1_8,
166 SNOR_CMD_READ_1_8_8,
167 SNOR_CMD_READ_8_8_8,
168 SNOR_CMD_READ_1_8_8_DTR,
169 SNOR_CMD_READ_8_8_8_DTR,
170
171 SNOR_CMD_READ_MAX
172 };
173
174 enum spi_nor_pp_command_index {
175 SNOR_CMD_PP,
176
177 /* Quad SPI */
178 SNOR_CMD_PP_1_1_4,
179 SNOR_CMD_PP_1_4_4,
180 SNOR_CMD_PP_4_4_4,
181
182 /* Octal SPI */
183 SNOR_CMD_PP_1_1_8,
184 SNOR_CMD_PP_1_8_8,
185 SNOR_CMD_PP_8_8_8,
186 SNOR_CMD_PP_8_8_8_DTR,
187
188 SNOR_CMD_PP_MAX
189 };
190
191 /**
192 * struct spi_nor_erase_type - Structure to describe a SPI NOR erase type
193 * @size: the size of the sector/block erased by the erase type.
194 * JEDEC JESD216B imposes erase sizes to be a power of 2.
195 * @size_shift: @size is a power of 2, the shift is stored in
196 * @size_shift.
197 * @size_mask: the size mask based on @size_shift.
198 * @opcode: the SPI command op code to erase the sector/block.
199 * @idx: Erase Type index as sorted in the Basic Flash Parameter
200 * Table. It will be used to synchronize the supported
201 * Erase Types with the ones identified in the SFDP
202 * optional tables.
203 */
204 struct spi_nor_erase_type {
205 u32 size;
206 u32 size_shift;
207 u32 size_mask;
208 u8 opcode;
209 u8 idx;
210 };
211
212 /**
213 * struct spi_nor_erase_command - Used for non-uniform erases
214 * The structure is used to describe a list of erase commands to be executed
215 * once we validate that the erase can be performed. The elements in the list
216 * are run-length encoded.
217 * @list: for inclusion into the list of erase commands.
218 * @count: how many times the same erase command should be
219 * consecutively used.
220 * @size: the size of the sector/block erased by the command.
221 * @opcode: the SPI command op code to erase the sector/block.
222 */
223 struct spi_nor_erase_command {
224 struct list_head list;
225 u32 count;
226 u32 size;
227 u8 opcode;
228 };
229
230 /**
231 * struct spi_nor_erase_region - Structure to describe a SPI NOR erase region
232 * @offset: the offset in the data array of erase region start.
233 * LSB bits are used as a bitmask encoding flags to
234 * determine if this region is overlaid, if this region is
235 * the last in the SPI NOR flash memory and to indicate
236 * all the supported erase commands inside this region.
237 * The erase types are sorted in ascending order with the
238 * smallest Erase Type size being at BIT(0).
239 * @size: the size of the region in bytes.
240 */
241 struct spi_nor_erase_region {
242 u64 offset;
243 u64 size;
244 };
245
246 #define SNOR_ERASE_TYPE_MAX 4
247 #define SNOR_ERASE_TYPE_MASK GENMASK_ULL(SNOR_ERASE_TYPE_MAX - 1, 0)
248
249 #define SNOR_LAST_REGION BIT(4)
250 #define SNOR_OVERLAID_REGION BIT(5)
251
252 #define SNOR_ERASE_FLAGS_MAX 6
253 #define SNOR_ERASE_FLAGS_MASK GENMASK_ULL(SNOR_ERASE_FLAGS_MAX - 1, 0)
254
255 /**
256 * struct spi_nor_erase_map - Structure to describe the SPI NOR erase map
257 * @regions: array of erase regions. The regions are consecutive in
258 * address space. Walking through the regions is done
259 * incrementally.
260 * @uniform_region: a pre-allocated erase region for SPI NOR with a uniform
261 * sector size (legacy implementation).
262 * @erase_type: an array of erase types shared by all the regions.
263 * The erase types are sorted in ascending order, with the
264 * smallest Erase Type size being the first member in the
265 * erase_type array.
266 * @uniform_erase_type: bitmask encoding erase types that can erase the
267 * entire memory. This member is completed at init by
268 * uniform and non-uniform SPI NOR flash memories if they
269 * support at least one erase type that can erase the
270 * entire memory.
271 */
272 struct spi_nor_erase_map {
273 struct spi_nor_erase_region *regions;
274 struct spi_nor_erase_region uniform_region;
275 struct spi_nor_erase_type erase_type[SNOR_ERASE_TYPE_MAX];
276 u8 uniform_erase_type;
277 };
278
279 /**
280 * struct spi_nor_locking_ops - SPI NOR locking methods
281 * @lock: lock a region of the SPI NOR.
282 * @unlock: unlock a region of the SPI NOR.
283 * @is_locked: check if a region of the SPI NOR is completely locked
284 */
285 struct spi_nor_locking_ops {
286 int (*lock)(struct spi_nor *nor, loff_t ofs, uint64_t len);
287 int (*unlock)(struct spi_nor *nor, loff_t ofs, uint64_t len);
288 int (*is_locked)(struct spi_nor *nor, loff_t ofs, uint64_t len);
289 };
290
291 /**
292 * struct spi_nor_otp_organization - Structure to describe the SPI NOR OTP regions
293 * @len: size of one OTP region in bytes.
294 * @base: start address of the OTP area.
295 * @offset: offset between consecutive OTP regions if there are more
296 * than one.
297 * @n_regions: number of individual OTP regions.
298 */
299 struct spi_nor_otp_organization {
300 size_t len;
301 loff_t base;
302 loff_t offset;
303 unsigned int n_regions;
304 };
305
306 /**
307 * struct spi_nor_otp_ops - SPI NOR OTP methods
308 * @read: read from the SPI NOR OTP area.
309 * @write: write to the SPI NOR OTP area.
310 * @lock: lock an OTP region.
311 * @erase: erase an OTP region.
312 * @is_locked: check if an OTP region of the SPI NOR is locked.
313 */
314 struct spi_nor_otp_ops {
315 int (*read)(struct spi_nor *nor, loff_t addr, size_t len, u8 *buf);
316 int (*write)(struct spi_nor *nor, loff_t addr, size_t len,
317 const u8 *buf);
318 int (*lock)(struct spi_nor *nor, unsigned int region);
319 int (*erase)(struct spi_nor *nor, loff_t addr);
320 int (*is_locked)(struct spi_nor *nor, unsigned int region);
321 };
322
323 /**
324 * struct spi_nor_otp - SPI NOR OTP grouping structure
325 * @org: OTP region organization
326 * @ops: OTP access ops
327 */
328 struct spi_nor_otp {
329 const struct spi_nor_otp_organization *org;
330 const struct spi_nor_otp_ops *ops;
331 };
332
333 /**
334 * struct spi_nor_flash_parameter - SPI NOR flash parameters and settings.
335 * Includes legacy flash parameters and settings that can be overwritten
336 * by the spi_nor_fixups hooks, or dynamically when parsing the JESD216
337 * Serial Flash Discoverable Parameters (SFDP) tables.
338 *
339 * @size: the flash memory density in bytes.
340 * @writesize Minimal writable flash unit size. Defaults to 1. Set to
341 * ECC unit size for ECC-ed flashes.
342 * @page_size: the page size of the SPI NOR flash memory.
343 * @addr_nbytes: number of address bytes to send.
344 * @addr_mode_nbytes: number of address bytes of current address mode. Useful
345 * when the flash operates with 4B opcodes but needs the
346 * internal address mode for opcodes that don't have a 4B
347 * opcode correspondent.
348 * @rdsr_dummy: dummy cycles needed for Read Status Register command
349 * in octal DTR mode.
350 * @rdsr_addr_nbytes: dummy address bytes needed for Read Status Register
351 * command in octal DTR mode.
352 * @hwcaps: describes the read and page program hardware
353 * capabilities.
354 * @reads: read capabilities ordered by priority: the higher index
355 * in the array, the higher priority.
356 * @page_programs: page program capabilities ordered by priority: the
357 * higher index in the array, the higher priority.
358 * @erase_map: the erase map parsed from the SFDP Sector Map Parameter
359 * Table.
360 * @otp: SPI NOR OTP info.
361 * @octal_dtr_enable: enables SPI NOR octal DTR mode.
362 * @quad_enable: enables SPI NOR quad mode.
363 * @set_4byte_addr_mode: puts the SPI NOR in 4 byte addressing mode.
364 * @convert_addr: converts an absolute address into something the flash
365 * will understand. Particularly useful when pagesize is
366 * not a power-of-2.
367 * @setup: (optional) configures the SPI NOR memory. Useful for
368 * SPI NOR flashes that have peculiarities to the SPI NOR
369 * standard e.g. different opcodes, specific address
370 * calculation, page size, etc.
371 * @ready: (optional) flashes might use a different mechanism
372 * than reading the status register to indicate they
373 * are ready for a new command
374 * @locking_ops: SPI NOR locking methods.
375 */
376 struct spi_nor_flash_parameter {
377 u64 size;
378 u32 writesize;
379 u32 page_size;
380 u8 addr_nbytes;
381 u8 addr_mode_nbytes;
382 u8 rdsr_dummy;
383 u8 rdsr_addr_nbytes;
384
385 struct spi_nor_hwcaps hwcaps;
386 struct spi_nor_read_command reads[SNOR_CMD_READ_MAX];
387 struct spi_nor_pp_command page_programs[SNOR_CMD_PP_MAX];
388
389 struct spi_nor_erase_map erase_map;
390 struct spi_nor_otp otp;
391
392 int (*octal_dtr_enable)(struct spi_nor *nor, bool enable);
393 int (*quad_enable)(struct spi_nor *nor);
394 int (*set_4byte_addr_mode)(struct spi_nor *nor, bool enable);
395 u32 (*convert_addr)(struct spi_nor *nor, u32 addr);
396 int (*setup)(struct spi_nor *nor, const struct spi_nor_hwcaps *hwcaps);
397 int (*ready)(struct spi_nor *nor);
398
399 const struct spi_nor_locking_ops *locking_ops;
400 };
401
402 /**
403 * struct spi_nor_fixups - SPI NOR fixup hooks
404 * @default_init: called after default flash parameters init. Used to tweak
405 * flash parameters when information provided by the flash_info
406 * table is incomplete or wrong.
407 * @post_bfpt: called after the BFPT table has been parsed
408 * @post_sfdp: called after SFDP has been parsed (is also called for SPI NORs
409 * that do not support RDSFDP). Typically used to tweak various
410 * parameters that could not be extracted by other means (i.e.
411 * when information provided by the SFDP/flash_info tables are
412 * incomplete or wrong).
413 * @late_init: used to initialize flash parameters that are not declared in the
414 * JESD216 SFDP standard, or where SFDP tables not defined at all.
415 * Will replace the default_init() hook.
416 *
417 * Those hooks can be used to tweak the SPI NOR configuration when the SFDP
418 * table is broken or not available.
419 */
420 struct spi_nor_fixups {
421 void (*default_init)(struct spi_nor *nor);
422 int (*post_bfpt)(struct spi_nor *nor,
423 const struct sfdp_parameter_header *bfpt_header,
424 const struct sfdp_bfpt *bfpt);
425 void (*post_sfdp)(struct spi_nor *nor);
426 void (*late_init)(struct spi_nor *nor);
427 };
428
429 /**
430 * struct flash_info - SPI NOR flash_info entry.
431 * @name: the name of the flash.
432 * @id: the flash's ID bytes. The first three bytes are the
433 * JEDIC ID. JEDEC ID zero means "no ID" (mostly older chips).
434 * @id_len: the number of bytes of ID.
435 * @sector_size: the size listed here is what works with SPINOR_OP_SE, which
436 * isn't necessarily called a "sector" by the vendor.
437 * @n_sectors: the number of sectors.
438 * @page_size: the flash's page size.
439 * @addr_nbytes: number of address bytes to send.
440 *
441 * @parse_sfdp: true when flash supports SFDP tables. The false value has no
442 * meaning. If one wants to skip the SFDP tables, one should
443 * instead use the SPI_NOR_SKIP_SFDP sfdp_flag.
444 * @flags: flags that indicate support that is not defined by the
445 * JESD216 standard in its SFDP tables. Flag meanings:
446 * SPI_NOR_HAS_LOCK: flash supports lock/unlock via SR
447 * SPI_NOR_HAS_TB: flash SR has Top/Bottom (TB) protect bit. Must be
448 * used with SPI_NOR_HAS_LOCK.
449 * SPI_NOR_TB_SR_BIT6: Top/Bottom (TB) is bit 6 of status register.
450 * Must be used with SPI_NOR_HAS_TB.
451 * SPI_NOR_4BIT_BP: flash SR has 4 bit fields (BP0-3) for block
452 * protection.
453 * SPI_NOR_BP3_SR_BIT6: BP3 is bit 6 of status register. Must be used with
454 * SPI_NOR_4BIT_BP.
455 * SPI_NOR_SWP_IS_VOLATILE: flash has volatile software write protection bits.
456 * Usually these will power-up in a write-protected
457 * state.
458 * SPI_NOR_NO_ERASE: no erase command needed.
459 * NO_CHIP_ERASE: chip does not support chip erase.
460 * SPI_NOR_NO_FR: can't do fastread.
461 *
462 * @no_sfdp_flags: flags that indicate support that can be discovered via SFDP.
463 * Used when SFDP tables are not defined in the flash. These
464 * flags are used together with the SPI_NOR_SKIP_SFDP flag.
465 * SPI_NOR_SKIP_SFDP: skip parsing of SFDP tables.
466 * SECT_4K: SPINOR_OP_BE_4K works uniformly.
467 * SPI_NOR_DUAL_READ: flash supports Dual Read.
468 * SPI_NOR_QUAD_READ: flash supports Quad Read.
469 * SPI_NOR_OCTAL_READ: flash supports Octal Read.
470 * SPI_NOR_OCTAL_DTR_READ: flash supports octal DTR Read.
471 * SPI_NOR_OCTAL_DTR_PP: flash supports Octal DTR Page Program.
472 *
473 * @fixup_flags: flags that indicate support that can be discovered via SFDP
474 * ideally, but can not be discovered for this particular flash
475 * because the SFDP table that indicates this support is not
476 * defined by the flash. In case the table for this support is
477 * defined but has wrong values, one should instead use a
478 * post_sfdp() hook to set the SNOR_F equivalent flag.
479 *
480 * SPI_NOR_4B_OPCODES: use dedicated 4byte address op codes to support
481 * memory size above 128Mib.
482 * SPI_NOR_IO_MODE_EN_VOLATILE: flash enables the best available I/O mode
483 * via a volatile bit.
484 * @mfr_flags: manufacturer private flags. Used in the manufacturer fixup
485 * hooks to differentiate support between flashes of the same
486 * manufacturer.
487 * @otp_org: flash's OTP organization.
488 * @fixups: part specific fixup hooks.
489 */
490 struct flash_info {
491 char *name;
492 u8 id[SPI_NOR_MAX_ID_LEN];
493 u8 id_len;
494 unsigned sector_size;
495 u16 n_sectors;
496 u16 page_size;
497 u8 addr_nbytes;
498
499 bool parse_sfdp;
500 u16 flags;
501 #define SPI_NOR_HAS_LOCK BIT(0)
502 #define SPI_NOR_HAS_TB BIT(1)
503 #define SPI_NOR_TB_SR_BIT6 BIT(2)
504 #define SPI_NOR_4BIT_BP BIT(3)
505 #define SPI_NOR_BP3_SR_BIT6 BIT(4)
506 #define SPI_NOR_SWP_IS_VOLATILE BIT(5)
507 #define SPI_NOR_NO_ERASE BIT(6)
508 #define NO_CHIP_ERASE BIT(7)
509 #define SPI_NOR_NO_FR BIT(8)
510
511 u8 no_sfdp_flags;
512 #define SPI_NOR_SKIP_SFDP BIT(0)
513 #define SECT_4K BIT(1)
514 #define SPI_NOR_DUAL_READ BIT(3)
515 #define SPI_NOR_QUAD_READ BIT(4)
516 #define SPI_NOR_OCTAL_READ BIT(5)
517 #define SPI_NOR_OCTAL_DTR_READ BIT(6)
518 #define SPI_NOR_OCTAL_DTR_PP BIT(7)
519
520 u8 fixup_flags;
521 #define SPI_NOR_4B_OPCODES BIT(0)
522 #define SPI_NOR_IO_MODE_EN_VOLATILE BIT(1)
523
524 u8 mfr_flags;
525
526 const struct spi_nor_otp_organization otp_org;
527 const struct spi_nor_fixups *fixups;
528 };
529
530 /* Used when the "_ext_id" is two bytes at most */
531 #define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors) \
532 .id = { \
533 ((_jedec_id) >> 16) & 0xff, \
534 ((_jedec_id) >> 8) & 0xff, \
535 (_jedec_id) & 0xff, \
536 ((_ext_id) >> 8) & 0xff, \
537 (_ext_id) & 0xff, \
538 }, \
539 .id_len = (!(_jedec_id) ? 0 : (3 + ((_ext_id) ? 2 : 0))), \
540 .sector_size = (_sector_size), \
541 .n_sectors = (_n_sectors), \
542 .page_size = 256, \
543
544 #define INFO6(_jedec_id, _ext_id, _sector_size, _n_sectors) \
545 .id = { \
546 ((_jedec_id) >> 16) & 0xff, \
547 ((_jedec_id) >> 8) & 0xff, \
548 (_jedec_id) & 0xff, \
549 ((_ext_id) >> 16) & 0xff, \
550 ((_ext_id) >> 8) & 0xff, \
551 (_ext_id) & 0xff, \
552 }, \
553 .id_len = 6, \
554 .sector_size = (_sector_size), \
555 .n_sectors = (_n_sectors), \
556 .page_size = 256, \
557
558 #define CAT25_INFO(_sector_size, _n_sectors, _page_size, _addr_nbytes) \
559 .sector_size = (_sector_size), \
560 .n_sectors = (_n_sectors), \
561 .page_size = (_page_size), \
562 .addr_nbytes = (_addr_nbytes), \
563 .flags = SPI_NOR_NO_ERASE | SPI_NOR_NO_FR, \
564
565 #define OTP_INFO(_len, _n_regions, _base, _offset) \
566 .otp_org = { \
567 .len = (_len), \
568 .base = (_base), \
569 .offset = (_offset), \
570 .n_regions = (_n_regions), \
571 },
572
573 #define PARSE_SFDP \
574 .parse_sfdp = true, \
575
576 #define FLAGS(_flags) \
577 .flags = (_flags), \
578
579 #define NO_SFDP_FLAGS(_no_sfdp_flags) \
580 .no_sfdp_flags = (_no_sfdp_flags), \
581
582 #define FIXUP_FLAGS(_fixup_flags) \
583 .fixup_flags = (_fixup_flags), \
584
585 #define MFR_FLAGS(_mfr_flags) \
586 .mfr_flags = (_mfr_flags), \
587
588 /**
589 * struct spi_nor_manufacturer - SPI NOR manufacturer object
590 * @name: manufacturer name
591 * @parts: array of parts supported by this manufacturer
592 * @nparts: number of entries in the parts array
593 * @fixups: hooks called at various points in time during spi_nor_scan()
594 */
595 struct spi_nor_manufacturer {
596 const char *name;
597 const struct flash_info *parts;
598 unsigned int nparts;
599 const struct spi_nor_fixups *fixups;
600 };
601
602 /**
603 * struct sfdp - SFDP data
604 * @num_dwords: number of entries in the dwords array
605 * @dwords: array of double words of the SFDP data
606 */
607 struct sfdp {
608 size_t num_dwords;
609 u32 *dwords;
610 };
611
612 /* Manufacturer drivers. */
613 extern const struct spi_nor_manufacturer spi_nor_atmel;
614 extern const struct spi_nor_manufacturer spi_nor_catalyst;
615 extern const struct spi_nor_manufacturer spi_nor_eon;
616 extern const struct spi_nor_manufacturer spi_nor_esmt;
617 extern const struct spi_nor_manufacturer spi_nor_everspin;
618 extern const struct spi_nor_manufacturer spi_nor_fujitsu;
619 extern const struct spi_nor_manufacturer spi_nor_gigadevice;
620 extern const struct spi_nor_manufacturer spi_nor_intel;
621 extern const struct spi_nor_manufacturer spi_nor_issi;
622 extern const struct spi_nor_manufacturer spi_nor_macronix;
623 extern const struct spi_nor_manufacturer spi_nor_micron;
624 extern const struct spi_nor_manufacturer spi_nor_st;
625 extern const struct spi_nor_manufacturer spi_nor_spansion;
626 extern const struct spi_nor_manufacturer spi_nor_sst;
627 extern const struct spi_nor_manufacturer spi_nor_winbond;
628 extern const struct spi_nor_manufacturer spi_nor_xilinx;
629 extern const struct spi_nor_manufacturer spi_nor_xmc;
630
631 extern const struct attribute_group *spi_nor_sysfs_groups[];
632
633 void spi_nor_spimem_setup_op(const struct spi_nor *nor,
634 struct spi_mem_op *op,
635 const enum spi_nor_protocol proto);
636 int spi_nor_write_enable(struct spi_nor *nor);
637 int spi_nor_write_disable(struct spi_nor *nor);
638 int spi_nor_set_4byte_addr_mode(struct spi_nor *nor, bool enable);
639 int spi_nor_wait_till_ready(struct spi_nor *nor);
640 int spi_nor_global_block_unlock(struct spi_nor *nor);
641 int spi_nor_lock_and_prep(struct spi_nor *nor);
642 void spi_nor_unlock_and_unprep(struct spi_nor *nor);
643 int spi_nor_sr1_bit6_quad_enable(struct spi_nor *nor);
644 int spi_nor_sr2_bit1_quad_enable(struct spi_nor *nor);
645 int spi_nor_sr2_bit7_quad_enable(struct spi_nor *nor);
646 int spi_nor_read_id(struct spi_nor *nor, u8 naddr, u8 ndummy, u8 *id,
647 enum spi_nor_protocol reg_proto);
648 int spi_nor_read_sr(struct spi_nor *nor, u8 *sr);
649 int spi_nor_sr_ready(struct spi_nor *nor);
650 int spi_nor_read_cr(struct spi_nor *nor, u8 *cr);
651 int spi_nor_write_sr(struct spi_nor *nor, const u8 *sr, size_t len);
652 int spi_nor_write_sr_and_check(struct spi_nor *nor, u8 sr1);
653 int spi_nor_write_16bit_cr_and_check(struct spi_nor *nor, u8 cr);
654
655 ssize_t spi_nor_read_data(struct spi_nor *nor, loff_t from, size_t len,
656 u8 *buf);
657 ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len,
658 const u8 *buf);
659 int spi_nor_read_any_reg(struct spi_nor *nor, struct spi_mem_op *op,
660 enum spi_nor_protocol proto);
661 int spi_nor_write_any_volatile_reg(struct spi_nor *nor, struct spi_mem_op *op,
662 enum spi_nor_protocol proto);
663 int spi_nor_erase_sector(struct spi_nor *nor, u32 addr);
664
665 int spi_nor_otp_read_secr(struct spi_nor *nor, loff_t addr, size_t len, u8 *buf);
666 int spi_nor_otp_write_secr(struct spi_nor *nor, loff_t addr, size_t len,
667 const u8 *buf);
668 int spi_nor_otp_erase_secr(struct spi_nor *nor, loff_t addr);
669 int spi_nor_otp_lock_sr2(struct spi_nor *nor, unsigned int region);
670 int spi_nor_otp_is_locked_sr2(struct spi_nor *nor, unsigned int region);
671
672 int spi_nor_hwcaps_read2cmd(u32 hwcaps);
673 int spi_nor_hwcaps_pp2cmd(u32 hwcaps);
674 u8 spi_nor_convert_3to4_read(u8 opcode);
675 void spi_nor_set_read_settings(struct spi_nor_read_command *read,
676 u8 num_mode_clocks,
677 u8 num_wait_states,
678 u8 opcode,
679 enum spi_nor_protocol proto);
680 void spi_nor_set_pp_settings(struct spi_nor_pp_command *pp, u8 opcode,
681 enum spi_nor_protocol proto);
682
683 void spi_nor_set_erase_type(struct spi_nor_erase_type *erase, u32 size,
684 u8 opcode);
685 struct spi_nor_erase_region *
686 spi_nor_region_next(struct spi_nor_erase_region *region);
687 void spi_nor_init_uniform_erase_map(struct spi_nor_erase_map *map,
688 u8 erase_mask, u64 flash_size);
689
690 int spi_nor_post_bfpt_fixups(struct spi_nor *nor,
691 const struct sfdp_parameter_header *bfpt_header,
692 const struct sfdp_bfpt *bfpt);
693
694 void spi_nor_init_default_locking_ops(struct spi_nor *nor);
695 void spi_nor_try_unlock_all(struct spi_nor *nor);
696 void spi_nor_set_mtd_locking_ops(struct spi_nor *nor);
697 void spi_nor_set_mtd_otp_ops(struct spi_nor *nor);
698
699 int spi_nor_controller_ops_read_reg(struct spi_nor *nor, u8 opcode,
700 u8 *buf, size_t len);
701 int spi_nor_controller_ops_write_reg(struct spi_nor *nor, u8 opcode,
702 const u8 *buf, size_t len);
703
mtd_to_spi_nor(struct mtd_info * mtd)704 static inline struct spi_nor *mtd_to_spi_nor(struct mtd_info *mtd)
705 {
706 return container_of(mtd, struct spi_nor, mtd);
707 }
708
709 #ifdef CONFIG_DEBUG_FS
710 void spi_nor_debugfs_register(struct spi_nor *nor);
711 #else
spi_nor_debugfs_register(struct spi_nor * nor)712 static inline void spi_nor_debugfs_register(struct spi_nor *nor) {}
713 #endif
714
715 #endif /* __LINUX_MTD_SPI_NOR_INTERNAL_H */
716