1 /*
2 * I2O kernel space accessible structures/APIs
3 *
4 * (c) Copyright 1999, 2000 Red Hat Software
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 *
11 *************************************************************************
12 *
13 * This header file defined the I2O APIs/structures for use by
14 * the I2O kernel modules.
15 *
16 */
17
18 #ifndef _I2O_H
19 #define _I2O_H
20
21 #include <linux/i2o-dev.h>
22
23 /* How many different OSM's are we allowing */
24 #define I2O_MAX_DRIVERS 8
25
26 #include <linux/pci.h>
27 #include <linux/dma-mapping.h>
28 #include <linux/string.h>
29 #include <linux/slab.h>
30 #include <linux/workqueue.h> /* work_struct */
31 #include <linux/mempool.h>
32 #include <linux/mutex.h>
33 #include <linux/scatterlist.h>
34 #include <linux/semaphore.h> /* Needed for MUTEX init macros */
35
36 #include <asm/io.h>
37
38 /* message queue empty */
39 #define I2O_QUEUE_EMPTY 0xffffffff
40
41 /*
42 * Cache strategies
43 */
44
45 /* The NULL strategy leaves everything up to the controller. This tends to be a
46 * pessimal but functional choice.
47 */
48 #define CACHE_NULL 0
49 /* Prefetch data when reading. We continually attempt to load the next 32 sectors
50 * into the controller cache.
51 */
52 #define CACHE_PREFETCH 1
53 /* Prefetch data when reading. We sometimes attempt to load the next 32 sectors
54 * into the controller cache. When an I/O is less <= 8K we assume its probably
55 * not sequential and don't prefetch (default)
56 */
57 #define CACHE_SMARTFETCH 2
58 /* Data is written to the cache and then out on to the disk. The I/O must be
59 * physically on the medium before the write is acknowledged (default without
60 * NVRAM)
61 */
62 #define CACHE_WRITETHROUGH 17
63 /* Data is written to the cache and then out on to the disk. The controller
64 * is permitted to write back the cache any way it wants. (default if battery
65 * backed NVRAM is present). It can be useful to set this for swap regardless of
66 * battery state.
67 */
68 #define CACHE_WRITEBACK 18
69 /* Optimise for under powered controllers, especially on RAID1 and RAID0. We
70 * write large I/O's directly to disk bypassing the cache to avoid the extra
71 * memory copy hits. Small writes are writeback cached
72 */
73 #define CACHE_SMARTBACK 19
74 /* Optimise for under powered controllers, especially on RAID1 and RAID0. We
75 * write large I/O's directly to disk bypassing the cache to avoid the extra
76 * memory copy hits. Small writes are writethrough cached. Suitable for devices
77 * lacking battery backup
78 */
79 #define CACHE_SMARTTHROUGH 20
80
81 /*
82 * Ioctl structures
83 */
84
85 #define BLKI2OGRSTRAT _IOR('2', 1, int)
86 #define BLKI2OGWSTRAT _IOR('2', 2, int)
87 #define BLKI2OSRSTRAT _IOW('2', 3, int)
88 #define BLKI2OSWSTRAT _IOW('2', 4, int)
89
90 /*
91 * I2O Function codes
92 */
93
94 /*
95 * Executive Class
96 */
97 #define I2O_CMD_ADAPTER_ASSIGN 0xB3
98 #define I2O_CMD_ADAPTER_READ 0xB2
99 #define I2O_CMD_ADAPTER_RELEASE 0xB5
100 #define I2O_CMD_BIOS_INFO_SET 0xA5
101 #define I2O_CMD_BOOT_DEVICE_SET 0xA7
102 #define I2O_CMD_CONFIG_VALIDATE 0xBB
103 #define I2O_CMD_CONN_SETUP 0xCA
104 #define I2O_CMD_DDM_DESTROY 0xB1
105 #define I2O_CMD_DDM_ENABLE 0xD5
106 #define I2O_CMD_DDM_QUIESCE 0xC7
107 #define I2O_CMD_DDM_RESET 0xD9
108 #define I2O_CMD_DDM_SUSPEND 0xAF
109 #define I2O_CMD_DEVICE_ASSIGN 0xB7
110 #define I2O_CMD_DEVICE_RELEASE 0xB9
111 #define I2O_CMD_HRT_GET 0xA8
112 #define I2O_CMD_ADAPTER_CLEAR 0xBE
113 #define I2O_CMD_ADAPTER_CONNECT 0xC9
114 #define I2O_CMD_ADAPTER_RESET 0xBD
115 #define I2O_CMD_LCT_NOTIFY 0xA2
116 #define I2O_CMD_OUTBOUND_INIT 0xA1
117 #define I2O_CMD_PATH_ENABLE 0xD3
118 #define I2O_CMD_PATH_QUIESCE 0xC5
119 #define I2O_CMD_PATH_RESET 0xD7
120 #define I2O_CMD_STATIC_MF_CREATE 0xDD
121 #define I2O_CMD_STATIC_MF_RELEASE 0xDF
122 #define I2O_CMD_STATUS_GET 0xA0
123 #define I2O_CMD_SW_DOWNLOAD 0xA9
124 #define I2O_CMD_SW_UPLOAD 0xAB
125 #define I2O_CMD_SW_REMOVE 0xAD
126 #define I2O_CMD_SYS_ENABLE 0xD1
127 #define I2O_CMD_SYS_MODIFY 0xC1
128 #define I2O_CMD_SYS_QUIESCE 0xC3
129 #define I2O_CMD_SYS_TAB_SET 0xA3
130
131 /*
132 * Utility Class
133 */
134 #define I2O_CMD_UTIL_NOP 0x00
135 #define I2O_CMD_UTIL_ABORT 0x01
136 #define I2O_CMD_UTIL_CLAIM 0x09
137 #define I2O_CMD_UTIL_RELEASE 0x0B
138 #define I2O_CMD_UTIL_PARAMS_GET 0x06
139 #define I2O_CMD_UTIL_PARAMS_SET 0x05
140 #define I2O_CMD_UTIL_EVT_REGISTER 0x13
141 #define I2O_CMD_UTIL_EVT_ACK 0x14
142 #define I2O_CMD_UTIL_CONFIG_DIALOG 0x10
143 #define I2O_CMD_UTIL_DEVICE_RESERVE 0x0D
144 #define I2O_CMD_UTIL_DEVICE_RELEASE 0x0F
145 #define I2O_CMD_UTIL_LOCK 0x17
146 #define I2O_CMD_UTIL_LOCK_RELEASE 0x19
147 #define I2O_CMD_UTIL_REPLY_FAULT_NOTIFY 0x15
148
149 /*
150 * SCSI Host Bus Adapter Class
151 */
152 #define I2O_CMD_SCSI_EXEC 0x81
153 #define I2O_CMD_SCSI_ABORT 0x83
154 #define I2O_CMD_SCSI_BUSRESET 0x27
155
156 /*
157 * Bus Adapter Class
158 */
159 #define I2O_CMD_BUS_ADAPTER_RESET 0x85
160 #define I2O_CMD_BUS_RESET 0x87
161 #define I2O_CMD_BUS_SCAN 0x89
162 #define I2O_CMD_BUS_QUIESCE 0x8b
163
164 /*
165 * Random Block Storage Class
166 */
167 #define I2O_CMD_BLOCK_READ 0x30
168 #define I2O_CMD_BLOCK_WRITE 0x31
169 #define I2O_CMD_BLOCK_CFLUSH 0x37
170 #define I2O_CMD_BLOCK_MLOCK 0x49
171 #define I2O_CMD_BLOCK_MUNLOCK 0x4B
172 #define I2O_CMD_BLOCK_MMOUNT 0x41
173 #define I2O_CMD_BLOCK_MEJECT 0x43
174 #define I2O_CMD_BLOCK_POWER 0x70
175
176 #define I2O_CMD_PRIVATE 0xFF
177
178 /* Command status values */
179
180 #define I2O_CMD_IN_PROGRESS 0x01
181 #define I2O_CMD_REJECTED 0x02
182 #define I2O_CMD_FAILED 0x03
183 #define I2O_CMD_COMPLETED 0x04
184
185 /* I2O API function return values */
186
187 #define I2O_RTN_NO_ERROR 0
188 #define I2O_RTN_NOT_INIT 1
189 #define I2O_RTN_FREE_Q_EMPTY 2
190 #define I2O_RTN_TCB_ERROR 3
191 #define I2O_RTN_TRANSACTION_ERROR 4
192 #define I2O_RTN_ADAPTER_ALREADY_INIT 5
193 #define I2O_RTN_MALLOC_ERROR 6
194 #define I2O_RTN_ADPTR_NOT_REGISTERED 7
195 #define I2O_RTN_MSG_REPLY_TIMEOUT 8
196 #define I2O_RTN_NO_STATUS 9
197 #define I2O_RTN_NO_FIRM_VER 10
198 #define I2O_RTN_NO_LINK_SPEED 11
199
200 /* Reply message status defines for all messages */
201
202 #define I2O_REPLY_STATUS_SUCCESS 0x00
203 #define I2O_REPLY_STATUS_ABORT_DIRTY 0x01
204 #define I2O_REPLY_STATUS_ABORT_NO_DATA_TRANSFER 0x02
205 #define I2O_REPLY_STATUS_ABORT_PARTIAL_TRANSFER 0x03
206 #define I2O_REPLY_STATUS_ERROR_DIRTY 0x04
207 #define I2O_REPLY_STATUS_ERROR_NO_DATA_TRANSFER 0x05
208 #define I2O_REPLY_STATUS_ERROR_PARTIAL_TRANSFER 0x06
209 #define I2O_REPLY_STATUS_PROCESS_ABORT_DIRTY 0x08
210 #define I2O_REPLY_STATUS_PROCESS_ABORT_NO_DATA_TRANSFER 0x09
211 #define I2O_REPLY_STATUS_PROCESS_ABORT_PARTIAL_TRANSFER 0x0A
212 #define I2O_REPLY_STATUS_TRANSACTION_ERROR 0x0B
213 #define I2O_REPLY_STATUS_PROGRESS_REPORT 0x80
214
215 /* Status codes and Error Information for Parameter functions */
216
217 #define I2O_PARAMS_STATUS_SUCCESS 0x00
218 #define I2O_PARAMS_STATUS_BAD_KEY_ABORT 0x01
219 #define I2O_PARAMS_STATUS_BAD_KEY_CONTINUE 0x02
220 #define I2O_PARAMS_STATUS_BUFFER_FULL 0x03
221 #define I2O_PARAMS_STATUS_BUFFER_TOO_SMALL 0x04
222 #define I2O_PARAMS_STATUS_FIELD_UNREADABLE 0x05
223 #define I2O_PARAMS_STATUS_FIELD_UNWRITEABLE 0x06
224 #define I2O_PARAMS_STATUS_INSUFFICIENT_FIELDS 0x07
225 #define I2O_PARAMS_STATUS_INVALID_GROUP_ID 0x08
226 #define I2O_PARAMS_STATUS_INVALID_OPERATION 0x09
227 #define I2O_PARAMS_STATUS_NO_KEY_FIELD 0x0A
228 #define I2O_PARAMS_STATUS_NO_SUCH_FIELD 0x0B
229 #define I2O_PARAMS_STATUS_NON_DYNAMIC_GROUP 0x0C
230 #define I2O_PARAMS_STATUS_OPERATION_ERROR 0x0D
231 #define I2O_PARAMS_STATUS_SCALAR_ERROR 0x0E
232 #define I2O_PARAMS_STATUS_TABLE_ERROR 0x0F
233 #define I2O_PARAMS_STATUS_WRONG_GROUP_TYPE 0x10
234
235 /* DetailedStatusCode defines for Executive, DDM, Util and Transaction error
236 * messages: Table 3-2 Detailed Status Codes.*/
237
238 #define I2O_DSC_SUCCESS 0x0000
239 #define I2O_DSC_BAD_KEY 0x0002
240 #define I2O_DSC_TCL_ERROR 0x0003
241 #define I2O_DSC_REPLY_BUFFER_FULL 0x0004
242 #define I2O_DSC_NO_SUCH_PAGE 0x0005
243 #define I2O_DSC_INSUFFICIENT_RESOURCE_SOFT 0x0006
244 #define I2O_DSC_INSUFFICIENT_RESOURCE_HARD 0x0007
245 #define I2O_DSC_CHAIN_BUFFER_TOO_LARGE 0x0009
246 #define I2O_DSC_UNSUPPORTED_FUNCTION 0x000A
247 #define I2O_DSC_DEVICE_LOCKED 0x000B
248 #define I2O_DSC_DEVICE_RESET 0x000C
249 #define I2O_DSC_INAPPROPRIATE_FUNCTION 0x000D
250 #define I2O_DSC_INVALID_INITIATOR_ADDRESS 0x000E
251 #define I2O_DSC_INVALID_MESSAGE_FLAGS 0x000F
252 #define I2O_DSC_INVALID_OFFSET 0x0010
253 #define I2O_DSC_INVALID_PARAMETER 0x0011
254 #define I2O_DSC_INVALID_REQUEST 0x0012
255 #define I2O_DSC_INVALID_TARGET_ADDRESS 0x0013
256 #define I2O_DSC_MESSAGE_TOO_LARGE 0x0014
257 #define I2O_DSC_MESSAGE_TOO_SMALL 0x0015
258 #define I2O_DSC_MISSING_PARAMETER 0x0016
259 #define I2O_DSC_TIMEOUT 0x0017
260 #define I2O_DSC_UNKNOWN_ERROR 0x0018
261 #define I2O_DSC_UNKNOWN_FUNCTION 0x0019
262 #define I2O_DSC_UNSUPPORTED_VERSION 0x001A
263 #define I2O_DSC_DEVICE_BUSY 0x001B
264 #define I2O_DSC_DEVICE_NOT_AVAILABLE 0x001C
265
266 /* DetailedStatusCode defines for Block Storage Operation: Table 6-7 Detailed
267 Status Codes.*/
268
269 #define I2O_BSA_DSC_SUCCESS 0x0000
270 #define I2O_BSA_DSC_MEDIA_ERROR 0x0001
271 #define I2O_BSA_DSC_ACCESS_ERROR 0x0002
272 #define I2O_BSA_DSC_DEVICE_FAILURE 0x0003
273 #define I2O_BSA_DSC_DEVICE_NOT_READY 0x0004
274 #define I2O_BSA_DSC_MEDIA_NOT_PRESENT 0x0005
275 #define I2O_BSA_DSC_MEDIA_LOCKED 0x0006
276 #define I2O_BSA_DSC_MEDIA_FAILURE 0x0007
277 #define I2O_BSA_DSC_PROTOCOL_FAILURE 0x0008
278 #define I2O_BSA_DSC_BUS_FAILURE 0x0009
279 #define I2O_BSA_DSC_ACCESS_VIOLATION 0x000A
280 #define I2O_BSA_DSC_WRITE_PROTECTED 0x000B
281 #define I2O_BSA_DSC_DEVICE_RESET 0x000C
282 #define I2O_BSA_DSC_VOLUME_CHANGED 0x000D
283 #define I2O_BSA_DSC_TIMEOUT 0x000E
284
285 /* FailureStatusCodes, Table 3-3 Message Failure Codes */
286
287 #define I2O_FSC_TRANSPORT_SERVICE_SUSPENDED 0x81
288 #define I2O_FSC_TRANSPORT_SERVICE_TERMINATED 0x82
289 #define I2O_FSC_TRANSPORT_CONGESTION 0x83
290 #define I2O_FSC_TRANSPORT_FAILURE 0x84
291 #define I2O_FSC_TRANSPORT_STATE_ERROR 0x85
292 #define I2O_FSC_TRANSPORT_TIME_OUT 0x86
293 #define I2O_FSC_TRANSPORT_ROUTING_FAILURE 0x87
294 #define I2O_FSC_TRANSPORT_INVALID_VERSION 0x88
295 #define I2O_FSC_TRANSPORT_INVALID_OFFSET 0x89
296 #define I2O_FSC_TRANSPORT_INVALID_MSG_FLAGS 0x8A
297 #define I2O_FSC_TRANSPORT_FRAME_TOO_SMALL 0x8B
298 #define I2O_FSC_TRANSPORT_FRAME_TOO_LARGE 0x8C
299 #define I2O_FSC_TRANSPORT_INVALID_TARGET_ID 0x8D
300 #define I2O_FSC_TRANSPORT_INVALID_INITIATOR_ID 0x8E
301 #define I2O_FSC_TRANSPORT_INVALID_INITIATOR_CONTEXT 0x8F
302 #define I2O_FSC_TRANSPORT_UNKNOWN_FAILURE 0xFF
303
304 /* Device Claim Types */
305 #define I2O_CLAIM_PRIMARY 0x01000000
306 #define I2O_CLAIM_MANAGEMENT 0x02000000
307 #define I2O_CLAIM_AUTHORIZED 0x03000000
308 #define I2O_CLAIM_SECONDARY 0x04000000
309
310 /* Message header defines for VersionOffset */
311 #define I2OVER15 0x0001
312 #define I2OVER20 0x0002
313
314 /* Default is 1.5 */
315 #define I2OVERSION I2OVER15
316
317 #define SGL_OFFSET_0 I2OVERSION
318 #define SGL_OFFSET_4 (0x0040 | I2OVERSION)
319 #define SGL_OFFSET_5 (0x0050 | I2OVERSION)
320 #define SGL_OFFSET_6 (0x0060 | I2OVERSION)
321 #define SGL_OFFSET_7 (0x0070 | I2OVERSION)
322 #define SGL_OFFSET_8 (0x0080 | I2OVERSION)
323 #define SGL_OFFSET_9 (0x0090 | I2OVERSION)
324 #define SGL_OFFSET_10 (0x00A0 | I2OVERSION)
325 #define SGL_OFFSET_11 (0x00B0 | I2OVERSION)
326 #define SGL_OFFSET_12 (0x00C0 | I2OVERSION)
327 #define SGL_OFFSET(x) (((x)<<4) | I2OVERSION)
328
329 /* Transaction Reply Lists (TRL) Control Word structure */
330 #define TRL_SINGLE_FIXED_LENGTH 0x00
331 #define TRL_SINGLE_VARIABLE_LENGTH 0x40
332 #define TRL_MULTIPLE_FIXED_LENGTH 0x80
333
334 /* msg header defines for MsgFlags */
335 #define MSG_STATIC 0x0100
336 #define MSG_64BIT_CNTXT 0x0200
337 #define MSG_MULTI_TRANS 0x1000
338 #define MSG_FAIL 0x2000
339 #define MSG_FINAL 0x4000
340 #define MSG_REPLY 0x8000
341
342 /* minimum size msg */
343 #define THREE_WORD_MSG_SIZE 0x00030000
344 #define FOUR_WORD_MSG_SIZE 0x00040000
345 #define FIVE_WORD_MSG_SIZE 0x00050000
346 #define SIX_WORD_MSG_SIZE 0x00060000
347 #define SEVEN_WORD_MSG_SIZE 0x00070000
348 #define EIGHT_WORD_MSG_SIZE 0x00080000
349 #define NINE_WORD_MSG_SIZE 0x00090000
350 #define TEN_WORD_MSG_SIZE 0x000A0000
351 #define ELEVEN_WORD_MSG_SIZE 0x000B0000
352 #define I2O_MESSAGE_SIZE(x) ((x)<<16)
353
354 /* special TID assignments */
355 #define ADAPTER_TID 0
356 #define HOST_TID 1
357
358 /* outbound queue defines */
359 #define I2O_MAX_OUTBOUND_MSG_FRAMES 128
360 #define I2O_OUTBOUND_MSG_FRAME_SIZE 128 /* in 32-bit words */
361
362 /* inbound queue definitions */
363 #define I2O_MSG_INPOOL_MIN 32
364 #define I2O_INBOUND_MSG_FRAME_SIZE 128 /* in 32-bit words */
365
366 #define I2O_POST_WAIT_OK 0
367 #define I2O_POST_WAIT_TIMEOUT -ETIMEDOUT
368
369 #define I2O_CONTEXT_LIST_MIN_LENGTH 15
370 #define I2O_CONTEXT_LIST_USED 0x01
371 #define I2O_CONTEXT_LIST_DELETED 0x02
372
373 /* timeouts */
374 #define I2O_TIMEOUT_INIT_OUTBOUND_QUEUE 15
375 #define I2O_TIMEOUT_MESSAGE_GET 5
376 #define I2O_TIMEOUT_RESET 30
377 #define I2O_TIMEOUT_STATUS_GET 5
378 #define I2O_TIMEOUT_LCT_GET 360
379 #define I2O_TIMEOUT_SCSI_SCB_ABORT 240
380
381 /* retries */
382 #define I2O_HRT_GET_TRIES 3
383 #define I2O_LCT_GET_TRIES 3
384
385 /* defines for max_sectors and max_phys_segments */
386 #define I2O_MAX_SECTORS 1024
387 #define I2O_MAX_SECTORS_LIMITED 128
388 #define I2O_MAX_PHYS_SEGMENTS BLK_MAX_SEGMENTS
389
390 /*
391 * Message structures
392 */
393 struct i2o_message {
394 union {
395 struct {
396 u8 version_offset;
397 u8 flags;
398 u16 size;
399 u32 target_tid:12;
400 u32 init_tid:12;
401 u32 function:8;
402 u32 icntxt; /* initiator context */
403 u32 tcntxt; /* transaction context */
404 } s;
405 u32 head[4];
406 } u;
407 /* List follows */
408 u32 body[0];
409 };
410
411 /* MFA and I2O message used by mempool */
412 struct i2o_msg_mfa {
413 u32 mfa; /* MFA returned by the controller */
414 struct i2o_message msg; /* I2O message */
415 };
416
417 /*
418 * Each I2O device entity has one of these. There is one per device.
419 */
420 struct i2o_device {
421 i2o_lct_entry lct_data; /* Device LCT information */
422
423 struct i2o_controller *iop; /* Controlling IOP */
424 struct list_head list; /* node in IOP devices list */
425
426 struct device device;
427
428 struct mutex lock; /* device lock */
429 };
430
431 /*
432 * Event structure provided to the event handling function
433 */
434 struct i2o_event {
435 struct work_struct work;
436 struct i2o_device *i2o_dev; /* I2O device pointer from which the
437 event reply was initiated */
438 u16 size; /* Size of data in 32-bit words */
439 u32 tcntxt; /* Transaction context used at
440 registration */
441 u32 event_indicator; /* Event indicator from reply */
442 u32 data[0]; /* Event data from reply */
443 };
444
445 /*
446 * I2O classes which could be handled by the OSM
447 */
448 struct i2o_class_id {
449 u16 class_id:12;
450 };
451
452 /*
453 * I2O driver structure for OSMs
454 */
455 struct i2o_driver {
456 char *name; /* OSM name */
457 int context; /* Low 8 bits of the transaction info */
458 struct i2o_class_id *classes; /* I2O classes that this OSM handles */
459
460 /* Message reply handler */
461 int (*reply) (struct i2o_controller *, u32, struct i2o_message *);
462
463 /* Event handler */
464 work_func_t event;
465
466 struct workqueue_struct *event_queue; /* Event queue */
467
468 struct device_driver driver;
469
470 /* notification of changes */
471 void (*notify_controller_add) (struct i2o_controller *);
472 void (*notify_controller_remove) (struct i2o_controller *);
473 void (*notify_device_add) (struct i2o_device *);
474 void (*notify_device_remove) (struct i2o_device *);
475
476 struct semaphore lock;
477 };
478
479 /*
480 * Contains DMA mapped address information
481 */
482 struct i2o_dma {
483 void *virt;
484 dma_addr_t phys;
485 size_t len;
486 };
487
488 /*
489 * Contains slab cache and mempool information
490 */
491 struct i2o_pool {
492 char *name;
493 struct kmem_cache *slab;
494 mempool_t *mempool;
495 };
496
497 /*
498 * Contains IO mapped address information
499 */
500 struct i2o_io {
501 void __iomem *virt;
502 unsigned long phys;
503 unsigned long len;
504 };
505
506 /*
507 * Context queue entry, used for 32-bit context on 64-bit systems
508 */
509 struct i2o_context_list_element {
510 struct list_head list;
511 u32 context;
512 void *ptr;
513 unsigned long timestamp;
514 };
515
516 /*
517 * Each I2O controller has one of these objects
518 */
519 struct i2o_controller {
520 char name[16];
521 int unit;
522 int type;
523
524 struct pci_dev *pdev; /* PCI device */
525
526 unsigned int promise:1; /* Promise controller */
527 unsigned int adaptec:1; /* DPT / Adaptec controller */
528 unsigned int raptor:1; /* split bar */
529 unsigned int no_quiesce:1; /* dont quiesce before reset */
530 unsigned int short_req:1; /* use small block sizes */
531 unsigned int limit_sectors:1; /* limit number of sectors / request */
532 unsigned int pae_support:1; /* controller has 64-bit SGL support */
533
534 struct list_head devices; /* list of I2O devices */
535 struct list_head list; /* Controller list */
536
537 void __iomem *in_port; /* Inbout port address */
538 void __iomem *out_port; /* Outbound port address */
539 void __iomem *irq_status; /* Interrupt status register address */
540 void __iomem *irq_mask; /* Interrupt mask register address */
541
542 struct i2o_dma status; /* IOP status block */
543
544 struct i2o_dma hrt; /* HW Resource Table */
545 i2o_lct *lct; /* Logical Config Table */
546 struct i2o_dma dlct; /* Temp LCT */
547 struct mutex lct_lock; /* Lock for LCT updates */
548 struct i2o_dma status_block; /* IOP status block */
549
550 struct i2o_io base; /* controller messaging unit */
551 struct i2o_io in_queue; /* inbound message queue Host->IOP */
552 struct i2o_dma out_queue; /* outbound message queue IOP->Host */
553
554 struct i2o_pool in_msg; /* mempool for inbound messages */
555
556 unsigned int battery:1; /* Has a battery backup */
557 unsigned int io_alloc:1; /* An I/O resource was allocated */
558 unsigned int mem_alloc:1; /* A memory resource was allocated */
559
560 struct resource io_resource; /* I/O resource allocated to the IOP */
561 struct resource mem_resource; /* Mem resource allocated to the IOP */
562
563 struct device device;
564 struct i2o_device *exec; /* Executive */
565 #if BITS_PER_LONG == 64
566 spinlock_t context_list_lock; /* lock for context_list */
567 atomic_t context_list_counter; /* needed for unique contexts */
568 struct list_head context_list; /* list of context id's
569 and pointers */
570 #endif
571 spinlock_t lock; /* lock for controller
572 configuration */
573 void *driver_data[I2O_MAX_DRIVERS]; /* storage for drivers */
574 };
575
576 /*
577 * I2O System table entry
578 *
579 * The system table contains information about all the IOPs in the
580 * system. It is sent to all IOPs so that they can create peer2peer
581 * connections between them.
582 */
583 struct i2o_sys_tbl_entry {
584 u16 org_id;
585 u16 reserved1;
586 u32 iop_id:12;
587 u32 reserved2:20;
588 u16 seg_num:12;
589 u16 i2o_version:4;
590 u8 iop_state;
591 u8 msg_type;
592 u16 frame_size;
593 u16 reserved3;
594 u32 last_changed;
595 u32 iop_capabilities;
596 u32 inbound_low;
597 u32 inbound_high;
598 };
599
600 struct i2o_sys_tbl {
601 u8 num_entries;
602 u8 version;
603 u16 reserved1;
604 u32 change_ind;
605 u32 reserved2;
606 u32 reserved3;
607 struct i2o_sys_tbl_entry iops[0];
608 };
609
610 extern struct list_head i2o_controllers;
611
612 /* Message functions */
613 extern struct i2o_message *i2o_msg_get_wait(struct i2o_controller *, int);
614 extern int i2o_msg_post_wait_mem(struct i2o_controller *, struct i2o_message *,
615 unsigned long, struct i2o_dma *);
616
617 /* IOP functions */
618 extern int i2o_status_get(struct i2o_controller *);
619
620 extern int i2o_event_register(struct i2o_device *, struct i2o_driver *, int,
621 u32);
622 extern struct i2o_device *i2o_iop_find_device(struct i2o_controller *, u16);
623 extern struct i2o_controller *i2o_find_iop(int);
624
625 /* Functions needed for handling 64-bit pointers in 32-bit context */
626 #if BITS_PER_LONG == 64
627 extern u32 i2o_cntxt_list_add(struct i2o_controller *, void *);
628 extern void *i2o_cntxt_list_get(struct i2o_controller *, u32);
629 extern u32 i2o_cntxt_list_remove(struct i2o_controller *, void *);
630 extern u32 i2o_cntxt_list_get_ptr(struct i2o_controller *, void *);
631
i2o_ptr_low(void * ptr)632 static inline u32 i2o_ptr_low(void *ptr)
633 {
634 return (u32) (u64) ptr;
635 };
636
i2o_ptr_high(void * ptr)637 static inline u32 i2o_ptr_high(void *ptr)
638 {
639 return (u32) ((u64) ptr >> 32);
640 };
641
i2o_dma_low(dma_addr_t dma_addr)642 static inline u32 i2o_dma_low(dma_addr_t dma_addr)
643 {
644 return (u32) (u64) dma_addr;
645 };
646
i2o_dma_high(dma_addr_t dma_addr)647 static inline u32 i2o_dma_high(dma_addr_t dma_addr)
648 {
649 return (u32) ((u64) dma_addr >> 32);
650 };
651 #else
i2o_cntxt_list_add(struct i2o_controller * c,void * ptr)652 static inline u32 i2o_cntxt_list_add(struct i2o_controller *c, void *ptr)
653 {
654 return (u32) ptr;
655 };
656
i2o_cntxt_list_get(struct i2o_controller * c,u32 context)657 static inline void *i2o_cntxt_list_get(struct i2o_controller *c, u32 context)
658 {
659 return (void *)context;
660 };
661
i2o_cntxt_list_remove(struct i2o_controller * c,void * ptr)662 static inline u32 i2o_cntxt_list_remove(struct i2o_controller *c, void *ptr)
663 {
664 return (u32) ptr;
665 };
666
i2o_cntxt_list_get_ptr(struct i2o_controller * c,void * ptr)667 static inline u32 i2o_cntxt_list_get_ptr(struct i2o_controller *c, void *ptr)
668 {
669 return (u32) ptr;
670 };
671
i2o_ptr_low(void * ptr)672 static inline u32 i2o_ptr_low(void *ptr)
673 {
674 return (u32) ptr;
675 };
676
i2o_ptr_high(void * ptr)677 static inline u32 i2o_ptr_high(void *ptr)
678 {
679 return 0;
680 };
681
i2o_dma_low(dma_addr_t dma_addr)682 static inline u32 i2o_dma_low(dma_addr_t dma_addr)
683 {
684 return (u32) dma_addr;
685 };
686
i2o_dma_high(dma_addr_t dma_addr)687 static inline u32 i2o_dma_high(dma_addr_t dma_addr)
688 {
689 return 0;
690 };
691 #endif
692
693 extern u16 i2o_sg_tablesize(struct i2o_controller *c, u16 body_size);
694 extern dma_addr_t i2o_dma_map_single(struct i2o_controller *c, void *ptr,
695 size_t size,
696 enum dma_data_direction direction,
697 u32 ** sg_ptr);
698 extern int i2o_dma_map_sg(struct i2o_controller *c,
699 struct scatterlist *sg, int sg_count,
700 enum dma_data_direction direction,
701 u32 ** sg_ptr);
702 extern int i2o_dma_alloc(struct device *dev, struct i2o_dma *addr, size_t len);
703 extern void i2o_dma_free(struct device *dev, struct i2o_dma *addr);
704 extern int i2o_dma_realloc(struct device *dev, struct i2o_dma *addr,
705 size_t len);
706 extern int i2o_pool_alloc(struct i2o_pool *pool, const char *name,
707 size_t size, int min_nr);
708 extern void i2o_pool_free(struct i2o_pool *pool);
709 /* I2O driver (OSM) functions */
710 extern int i2o_driver_register(struct i2o_driver *);
711 extern void i2o_driver_unregister(struct i2o_driver *);
712
713 /**
714 * i2o_driver_notify_controller_add - Send notification of added controller
715 * @drv: I2O driver
716 * @c: I2O controller
717 *
718 * Send notification of added controller to a single registered driver.
719 */
i2o_driver_notify_controller_add(struct i2o_driver * drv,struct i2o_controller * c)720 static inline void i2o_driver_notify_controller_add(struct i2o_driver *drv,
721 struct i2o_controller *c)
722 {
723 if (drv->notify_controller_add)
724 drv->notify_controller_add(c);
725 };
726
727 /**
728 * i2o_driver_notify_controller_remove - Send notification of removed controller
729 * @drv: I2O driver
730 * @c: I2O controller
731 *
732 * Send notification of removed controller to a single registered driver.
733 */
i2o_driver_notify_controller_remove(struct i2o_driver * drv,struct i2o_controller * c)734 static inline void i2o_driver_notify_controller_remove(struct i2o_driver *drv,
735 struct i2o_controller *c)
736 {
737 if (drv->notify_controller_remove)
738 drv->notify_controller_remove(c);
739 };
740
741 /**
742 * i2o_driver_notify_device_add - Send notification of added device
743 * @drv: I2O driver
744 * @i2o_dev: the added i2o_device
745 *
746 * Send notification of added device to a single registered driver.
747 */
i2o_driver_notify_device_add(struct i2o_driver * drv,struct i2o_device * i2o_dev)748 static inline void i2o_driver_notify_device_add(struct i2o_driver *drv,
749 struct i2o_device *i2o_dev)
750 {
751 if (drv->notify_device_add)
752 drv->notify_device_add(i2o_dev);
753 };
754
755 /**
756 * i2o_driver_notify_device_remove - Send notification of removed device
757 * @drv: I2O driver
758 * @i2o_dev: the added i2o_device
759 *
760 * Send notification of removed device to a single registered driver.
761 */
i2o_driver_notify_device_remove(struct i2o_driver * drv,struct i2o_device * i2o_dev)762 static inline void i2o_driver_notify_device_remove(struct i2o_driver *drv,
763 struct i2o_device *i2o_dev)
764 {
765 if (drv->notify_device_remove)
766 drv->notify_device_remove(i2o_dev);
767 };
768
769 extern void i2o_driver_notify_controller_add_all(struct i2o_controller *);
770 extern void i2o_driver_notify_controller_remove_all(struct i2o_controller *);
771 extern void i2o_driver_notify_device_add_all(struct i2o_device *);
772 extern void i2o_driver_notify_device_remove_all(struct i2o_device *);
773
774 /* I2O device functions */
775 extern int i2o_device_claim(struct i2o_device *);
776 extern int i2o_device_claim_release(struct i2o_device *);
777
778 /* Exec OSM functions */
779 extern int i2o_exec_lct_get(struct i2o_controller *);
780
781 /* device / driver / kobject conversion functions */
782 #define to_i2o_driver(drv) container_of(drv,struct i2o_driver, driver)
783 #define to_i2o_device(dev) container_of(dev, struct i2o_device, device)
784 #define to_i2o_controller(dev) container_of(dev, struct i2o_controller, device)
785
786 /**
787 * i2o_out_to_virt - Turn an I2O message to a virtual address
788 * @c: controller
789 * @m: message engine value
790 *
791 * Turn a receive message from an I2O controller bus address into
792 * a Linux virtual address. The shared page frame is a linear block
793 * so we simply have to shift the offset. This function does not
794 * work for sender side messages as they are ioremap objects
795 * provided by the I2O controller.
796 */
i2o_msg_out_to_virt(struct i2o_controller * c,u32 m)797 static inline struct i2o_message *i2o_msg_out_to_virt(struct i2o_controller *c,
798 u32 m)
799 {
800 BUG_ON(m < c->out_queue.phys
801 || m >= c->out_queue.phys + c->out_queue.len);
802
803 return c->out_queue.virt + (m - c->out_queue.phys);
804 };
805
806 /**
807 * i2o_msg_in_to_virt - Turn an I2O message to a virtual address
808 * @c: controller
809 * @m: message engine value
810 *
811 * Turn a send message from an I2O controller bus address into
812 * a Linux virtual address. The shared page frame is a linear block
813 * so we simply have to shift the offset. This function does not
814 * work for receive side messages as they are kmalloc objects
815 * in a different pool.
816 */
i2o_msg_in_to_virt(struct i2o_controller * c,u32 m)817 static inline struct i2o_message __iomem *i2o_msg_in_to_virt(struct
818 i2o_controller *c,
819 u32 m)
820 {
821 return c->in_queue.virt + m;
822 };
823
824 /**
825 * i2o_msg_get - obtain an I2O message from the IOP
826 * @c: I2O controller
827 *
828 * This function tries to get a message frame. If no message frame is
829 * available do not wait until one is available (see also i2o_msg_get_wait).
830 * The returned pointer to the message frame is not in I/O memory, it is
831 * allocated from a mempool. But because a MFA is allocated from the
832 * controller too it is guaranteed that i2o_msg_post() will never fail.
833 *
834 * On a success a pointer to the message frame is returned. If the message
835 * queue is empty -EBUSY is returned and if no memory is available -ENOMEM
836 * is returned.
837 */
i2o_msg_get(struct i2o_controller * c)838 static inline struct i2o_message *i2o_msg_get(struct i2o_controller *c)
839 {
840 struct i2o_msg_mfa *mmsg = mempool_alloc(c->in_msg.mempool, GFP_ATOMIC);
841 if (!mmsg)
842 return ERR_PTR(-ENOMEM);
843
844 mmsg->mfa = readl(c->in_port);
845 if (unlikely(mmsg->mfa >= c->in_queue.len)) {
846 u32 mfa = mmsg->mfa;
847
848 mempool_free(mmsg, c->in_msg.mempool);
849
850 if (mfa == I2O_QUEUE_EMPTY)
851 return ERR_PTR(-EBUSY);
852 return ERR_PTR(-EFAULT);
853 }
854
855 return &mmsg->msg;
856 };
857
858 /**
859 * i2o_msg_post - Post I2O message to I2O controller
860 * @c: I2O controller to which the message should be send
861 * @msg: message returned by i2o_msg_get()
862 *
863 * Post the message to the I2O controller and return immediately.
864 */
i2o_msg_post(struct i2o_controller * c,struct i2o_message * msg)865 static inline void i2o_msg_post(struct i2o_controller *c,
866 struct i2o_message *msg)
867 {
868 struct i2o_msg_mfa *mmsg;
869
870 mmsg = container_of(msg, struct i2o_msg_mfa, msg);
871 memcpy_toio(i2o_msg_in_to_virt(c, mmsg->mfa), msg,
872 (le32_to_cpu(msg->u.head[0]) >> 16) << 2);
873 writel(mmsg->mfa, c->in_port);
874 mempool_free(mmsg, c->in_msg.mempool);
875 };
876
877 /**
878 * i2o_msg_post_wait - Post and wait a message and wait until return
879 * @c: controller
880 * @msg: message to post
881 * @timeout: time in seconds to wait
882 *
883 * This API allows an OSM to post a message and then be told whether or
884 * not the system received a successful reply. If the message times out
885 * then the value '-ETIMEDOUT' is returned.
886 *
887 * Returns 0 on success or negative error code on failure.
888 */
i2o_msg_post_wait(struct i2o_controller * c,struct i2o_message * msg,unsigned long timeout)889 static inline int i2o_msg_post_wait(struct i2o_controller *c,
890 struct i2o_message *msg,
891 unsigned long timeout)
892 {
893 return i2o_msg_post_wait_mem(c, msg, timeout, NULL);
894 };
895
896 /**
897 * i2o_msg_nop_mfa - Returns a fetched MFA back to the controller
898 * @c: I2O controller from which the MFA was fetched
899 * @mfa: MFA which should be returned
900 *
901 * This function must be used for preserved messages, because i2o_msg_nop()
902 * also returns the allocated memory back to the msg_pool mempool.
903 */
i2o_msg_nop_mfa(struct i2o_controller * c,u32 mfa)904 static inline void i2o_msg_nop_mfa(struct i2o_controller *c, u32 mfa)
905 {
906 struct i2o_message __iomem *msg;
907 u32 nop[3] = {
908 THREE_WORD_MSG_SIZE | SGL_OFFSET_0,
909 I2O_CMD_UTIL_NOP << 24 | HOST_TID << 12 | ADAPTER_TID,
910 0x00000000
911 };
912
913 msg = i2o_msg_in_to_virt(c, mfa);
914 memcpy_toio(msg, nop, sizeof(nop));
915 writel(mfa, c->in_port);
916 };
917
918 /**
919 * i2o_msg_nop - Returns a message which is not used
920 * @c: I2O controller from which the message was created
921 * @msg: message which should be returned
922 *
923 * If you fetch a message via i2o_msg_get, and can't use it, you must
924 * return the message with this function. Otherwise the MFA is lost as well
925 * as the allocated memory from the mempool.
926 */
i2o_msg_nop(struct i2o_controller * c,struct i2o_message * msg)927 static inline void i2o_msg_nop(struct i2o_controller *c,
928 struct i2o_message *msg)
929 {
930 struct i2o_msg_mfa *mmsg;
931 mmsg = container_of(msg, struct i2o_msg_mfa, msg);
932
933 i2o_msg_nop_mfa(c, mmsg->mfa);
934 mempool_free(mmsg, c->in_msg.mempool);
935 };
936
937 /**
938 * i2o_flush_reply - Flush reply from I2O controller
939 * @c: I2O controller
940 * @m: the message identifier
941 *
942 * The I2O controller must be informed that the reply message is not needed
943 * anymore. If you forget to flush the reply, the message frame can't be
944 * used by the controller anymore and is therefore lost.
945 */
i2o_flush_reply(struct i2o_controller * c,u32 m)946 static inline void i2o_flush_reply(struct i2o_controller *c, u32 m)
947 {
948 writel(m, c->out_port);
949 };
950
951 /*
952 * Endian handling wrapped into the macro - keeps the core code
953 * cleaner.
954 */
955
956 #define i2o_raw_writel(val, mem) __raw_writel(cpu_to_le32(val), mem)
957
958 extern int i2o_parm_field_get(struct i2o_device *, int, int, void *, int);
959 extern int i2o_parm_table_get(struct i2o_device *, int, int, int, void *, int,
960 void *, int);
961
962 /* debugging and troubleshooting/diagnostic helpers. */
963 #define osm_printk(level, format, arg...) \
964 printk(level "%s: " format, OSM_NAME , ## arg)
965
966 #ifdef DEBUG
967 #define osm_debug(format, arg...) \
968 osm_printk(KERN_DEBUG, format , ## arg)
969 #else
970 #define osm_debug(format, arg...) \
971 do { } while (0)
972 #endif
973
974 #define osm_err(format, arg...) \
975 osm_printk(KERN_ERR, format , ## arg)
976 #define osm_info(format, arg...) \
977 osm_printk(KERN_INFO, format , ## arg)
978 #define osm_warn(format, arg...) \
979 osm_printk(KERN_WARNING, format , ## arg)
980
981 /* debugging functions */
982 extern void i2o_report_status(const char *, const char *, struct i2o_message *);
983 extern void i2o_dump_message(struct i2o_message *);
984 extern void i2o_dump_hrt(struct i2o_controller *c);
985 extern void i2o_debug_state(struct i2o_controller *c);
986
987 #endif /* _I2O_H */
988