1 /*
2  *
3  * Author	Karsten Keil <kkeil@novell.com>
4  *
5  *   Basic declarations for the mISDN HW channels
6  *
7  * Copyright 2008  by Karsten Keil <kkeil@novell.com>
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  */
19 
20 #ifndef MISDNHW_H
21 #define MISDNHW_H
22 #include <linux/mISDNif.h>
23 #include <linux/timer.h>
24 
25 /*
26  * HW DEBUG 0xHHHHGGGG
27  * H - hardware driver specific bits
28  * G - for all drivers
29  */
30 
31 #define DEBUG_HW		0x00000001
32 #define DEBUG_HW_OPEN		0x00000002
33 #define DEBUG_HW_DCHANNEL	0x00000100
34 #define DEBUG_HW_DFIFO		0x00000200
35 #define DEBUG_HW_BCHANNEL	0x00001000
36 #define DEBUG_HW_BFIFO		0x00002000
37 
38 #define MAX_DFRAME_LEN_L1	300
39 #define MAX_MON_FRAME		32
40 #define MAX_LOG_SPACE		2048
41 #define MISDN_COPY_SIZE		32
42 
43 /* channel->Flags bit field */
44 #define FLG_TX_BUSY		0	/* tx_buf in use */
45 #define FLG_TX_NEXT		1	/* next_skb in use */
46 #define FLG_L1_BUSY		2	/* L1 is permanent busy */
47 #define FLG_L2_ACTIVATED	3	/* activated from L2 */
48 #define FLG_OPEN		5	/* channel is in use */
49 #define FLG_ACTIVE		6	/* channel is activated */
50 #define FLG_BUSY_TIMER		7
51 /* channel type */
52 #define FLG_DCHANNEL		8	/* channel is D-channel */
53 #define FLG_BCHANNEL		9	/* channel is B-channel */
54 #define FLG_ECHANNEL		10	/* channel is E-channel */
55 #define FLG_TRANSPARENT		12	/* channel use transparent data */
56 #define FLG_HDLC		13	/* channel use hdlc data */
57 #define FLG_L2DATA		14	/* channel use L2 DATA primitivs */
58 #define FLG_ORIGIN		15	/* channel is on origin site */
59 /* channel specific stuff */
60 #define FLG_FILLEMPTY		16	/* fill fifo on first frame (empty) */
61 /* arcofi specific */
62 #define FLG_ARCOFI_TIMER	17
63 #define FLG_ARCOFI_ERROR	18
64 /* isar specific */
65 #define FLG_INITIALIZED		17
66 #define FLG_DLEETX		18
67 #define FLG_LASTDLE		19
68 #define FLG_FIRST		20
69 #define FLG_LASTDATA		21
70 #define FLG_NMD_DATA		22
71 #define FLG_FTI_RUN		23
72 #define FLG_LL_OK		24
73 #define FLG_LL_CONN		25
74 #define FLG_DTMFSEND		26
75 
76 /* workq events */
77 #define FLG_RECVQUEUE		30
78 #define	FLG_PHCHANGE		31
79 
80 #define schedule_event(s, ev)	do { \
81 					test_and_set_bit(ev, &((s)->Flags)); \
82 					schedule_work(&((s)->workq)); \
83 				} while (0)
84 
85 struct dchannel {
86 	struct mISDNdevice	dev;
87 	u_long			Flags;
88 	struct work_struct	workq;
89 	void			(*phfunc) (struct dchannel *);
90 	u_int			state;
91 	void			*l1;
92 	void			*hw;
93 	int			slot;	/* multiport card channel slot */
94 	struct timer_list	timer;
95 	/* receive data */
96 	struct sk_buff		*rx_skb;
97 	int			maxlen;
98 	/* send data */
99 	struct sk_buff_head	squeue;
100 	struct sk_buff_head	rqueue;
101 	struct sk_buff		*tx_skb;
102 	int			tx_idx;
103 	int			debug;
104 	/* statistics */
105 	int			err_crc;
106 	int			err_tx;
107 	int			err_rx;
108 };
109 
110 typedef int	(dchannel_l1callback)(struct dchannel *, u_int);
111 extern int	create_l1(struct dchannel *, dchannel_l1callback *);
112 
113 /* private L1 commands */
114 #define INFO0		0x8002
115 #define INFO1		0x8102
116 #define INFO2		0x8202
117 #define INFO3_P8	0x8302
118 #define INFO3_P10	0x8402
119 #define INFO4_P8	0x8502
120 #define INFO4_P10	0x8602
121 #define LOSTFRAMING	0x8702
122 #define ANYSIGNAL	0x8802
123 #define HW_POWERDOWN	0x8902
124 #define HW_RESET_REQ	0x8a02
125 #define HW_POWERUP_REQ	0x8b02
126 #define HW_DEACT_REQ	0x8c02
127 #define HW_ACTIVATE_REQ	0x8e02
128 #define HW_D_NOBLOCKED  0x8f02
129 #define HW_RESET_IND	0x9002
130 #define HW_POWERUP_IND	0x9102
131 #define HW_DEACT_IND	0x9202
132 #define HW_ACTIVATE_IND	0x9302
133 #define HW_DEACT_CNF	0x9402
134 #define HW_TESTLOOP	0x9502
135 #define HW_TESTRX_RAW	0x9602
136 #define HW_TESTRX_HDLC	0x9702
137 #define HW_TESTRX_OFF	0x9802
138 
139 struct layer1;
140 extern int	l1_event(struct layer1 *, u_int);
141 
142 
143 struct bchannel {
144 	struct mISDNchannel	ch;
145 	int			nr;
146 	u_long			Flags;
147 	struct work_struct	workq;
148 	u_int			state;
149 	void			*hw;
150 	int			slot;	/* multiport card channel slot */
151 	struct timer_list	timer;
152 	/* receive data */
153 	struct sk_buff		*rx_skb;
154 	int			maxlen;
155 	/* send data */
156 	struct sk_buff		*next_skb;
157 	struct sk_buff		*tx_skb;
158 	struct sk_buff_head	rqueue;
159 	int			rcount;
160 	int			tx_idx;
161 	int			debug;
162 	/* statistics */
163 	int			err_crc;
164 	int			err_tx;
165 	int			err_rx;
166 };
167 
168 extern int	mISDN_initdchannel(struct dchannel *, int, void *);
169 extern int	mISDN_initbchannel(struct bchannel *, int);
170 extern int	mISDN_freedchannel(struct dchannel *);
171 extern void	mISDN_clear_bchannel(struct bchannel *);
172 extern int	mISDN_freebchannel(struct bchannel *);
173 extern void	queue_ch_frame(struct mISDNchannel *, u_int,
174 			int, struct sk_buff *);
175 extern int	dchannel_senddata(struct dchannel *, struct sk_buff *);
176 extern int	bchannel_senddata(struct bchannel *, struct sk_buff *);
177 extern void	recv_Dchannel(struct dchannel *);
178 extern void	recv_Echannel(struct dchannel *, struct dchannel *);
179 extern void	recv_Bchannel(struct bchannel *, unsigned int id);
180 extern void	recv_Dchannel_skb(struct dchannel *, struct sk_buff *);
181 extern void	recv_Bchannel_skb(struct bchannel *, struct sk_buff *);
182 extern void	confirm_Bsend(struct bchannel *bch);
183 extern int	get_next_bframe(struct bchannel *);
184 extern int	get_next_dframe(struct dchannel *);
185 
186 #endif
187