1 /*
2 * Copyright (c) 2000-2002 by David Brownell
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19 #include <linux/config.h>
20 #include <linux/module.h>
21 #include <linux/pci.h>
22 #include <linux/kernel.h>
23 #include <linux/delay.h>
24 #include <linux/ioport.h>
25 #include <linux/sched.h>
26 #include <linux/slab.h>
27 #include <linux/smp_lock.h>
28 #include <linux/errno.h>
29 #include <linux/init.h>
30 #include <linux/timer.h>
31 #include <linux/list.h>
32 #include <linux/interrupt.h>
33 #include <linux/reboot.h>
34 #include <linux/bitops.h> /* for generic_ffs */
35
36 #ifdef CONFIG_USB_DEBUG
37 #define DEBUG
38 #else
39 #undef DEBUG
40 #endif
41
42 #include <linux/usb.h>
43
44 #include <linux/version.h>
45 #include "../hcd.h"
46
47 #include <asm/byteorder.h>
48 #include <asm/io.h>
49 #include <asm/irq.h>
50 #include <asm/system.h>
51 #include <asm/unaligned.h>
52
53
54 /*-------------------------------------------------------------------------*/
55
56 /*
57 * EHCI hc_driver implementation ... experimental, incomplete.
58 * Based on the final 1.0 register interface specification.
59 *
60 * USB 2.0 shows up in upcoming www.pcmcia.org technology.
61 * First was PCMCIA, like ISA; then CardBus, which is PCI.
62 * Next comes "CardBay", using USB 2.0 signals.
63 *
64 * Contains additional contributions by Brad Hards, Rory Bolt, and others.
65 * Special thanks to Intel and VIA for providing host controllers to
66 * test this driver on, and Cypress (including In-System Design) for
67 * providing early devices for those host controllers to talk to!
68 *
69 * HISTORY:
70 *
71 * 2003-12-29 Rewritten high speed iso transfer support (by Michal Sojka,
72 * <sojkam@centrum.cz>, updates by DB).
73 *
74 * 2002-11-29 Correct handling for hw async_next register.
75 * 2002-08-06 Handling for bulk and interrupt transfers is mostly shared;
76 * only scheduling is different, no arbitrary limitations.
77 * 2002-07-25 Sanity check PCI reads, mostly for better cardbus support,
78 * clean up HC run state handshaking.
79 * 2002-05-24 Preliminary FS/LS interrupts, using scheduling shortcuts
80 * 2002-05-11 Clear TT errors for FS/LS ctrl/bulk. Fill in some other
81 * missing pieces: enabling 64bit dma, handoff from BIOS/SMM.
82 * 2002-05-07 Some error path cleanups to report better errors; wmb();
83 * use non-CVS version id; better iso bandwidth claim.
84 * 2002-04-19 Control/bulk/interrupt submit no longer uses giveback() on
85 * errors in submit path. Bugfixes to interrupt scheduling/processing.
86 * 2002-03-05 Initial high-speed ISO support; reduce ITD memory; shift
87 * more checking to generic hcd framework (db). Make it work with
88 * Philips EHCI; reduce PCI traffic; shorten IRQ path (Rory Bolt).
89 * 2002-01-14 Minor cleanup; version synch.
90 * 2002-01-08 Fix roothub handoff of FS/LS to companion controllers.
91 * 2002-01-04 Control/Bulk queuing behaves.
92 *
93 * 2001-12-12 Initial patch version for Linux 2.5.1 kernel.
94 * 2001-June Works with usb-storage and NEC EHCI on 2.4
95 */
96
97 #define DRIVER_VERSION "2003-Dec-29/2.4"
98 #define DRIVER_AUTHOR "David Brownell"
99 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
100
101 static const char hcd_name [] = "ehci_hcd";
102
103
104 #undef EHCI_VERBOSE_DEBUG
105 #undef EHCI_URB_TRACE
106
107 // #define have_split_iso
108
109 #ifdef DEBUG
110 #define EHCI_STATS
111 #endif
112
113 #define INTR_AUTOMAGIC /* urb lifecycle mode, gone in 2.5 */
114
115 /* magic numbers that can affect system performance */
116 #define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */
117 #define EHCI_TUNE_RL_HS 4 /* nak throttle; see 4.9 */
118 #define EHCI_TUNE_RL_TT 0
119 #define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
120 #define EHCI_TUNE_MULT_TT 1
121 #define EHCI_TUNE_FLS 2 /* (small) 256 frame schedule */
122
123 #define EHCI_IAA_JIFFIES (HZ/100) /* arbitrary; ~10 msec */
124 #define EHCI_IO_JIFFIES (HZ/10) /* io watchdog > irq_thresh */
125 #define EHCI_ASYNC_JIFFIES (HZ/20) /* async idle timeout */
126 #define EHCI_SHRINK_JIFFIES (HZ/200) /* async qh unlink delay */
127
128 /* Initial IRQ latency: lower than default */
129 static int log2_irq_thresh = 0; // 0 to 6
130 MODULE_PARM (log2_irq_thresh, "i");
131 MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
132
133 #define INTR_MASK (STS_IAA | STS_FATAL | STS_ERR | STS_INT)
134
135 /*-------------------------------------------------------------------------*/
136
137 #include "ehci.h"
138 #include "ehci-dbg.c"
139
140 /*-------------------------------------------------------------------------*/
141
142 /*
143 * handshake - spin reading hc until handshake completes or fails
144 * @ptr: address of hc register to be read
145 * @mask: bits to look at in result of read
146 * @done: value of those bits when handshake succeeds
147 * @usec: timeout in microseconds
148 *
149 * Returns negative errno, or zero on success
150 *
151 * Success happens when the "mask" bits have the specified value (hardware
152 * handshake done). There are two failure modes: "usec" have passed (major
153 * hardware flakeout), or the register reads as all-ones (hardware removed).
154 *
155 * That last failure should_only happen in cases like physical cardbus eject
156 * before driver shutdown. But it also seems to be caused by bugs in cardbus
157 * bridge shutdown: shutting down the bridge before the devices using it.
158 */
handshake(u32 * ptr,u32 mask,u32 done,int usec)159 static int handshake (u32 *ptr, u32 mask, u32 done, int usec)
160 {
161 u32 result;
162
163 do {
164 result = readl (ptr);
165 if (result == ~(u32)0) /* card removed */
166 return -ENODEV;
167 result &= mask;
168 if (result == done)
169 return 0;
170 udelay (1);
171 usec--;
172 } while (usec > 0);
173 return -ETIMEDOUT;
174 }
175
176 /*
177 * hc states include: unknown, halted, ready, running
178 * transitional states are messy just now
179 * trying to avoid "running" unless urbs are active
180 * a "ready" hc can be finishing prefetched work
181 */
182
183 /* force HC to halt state from unknown (EHCI spec section 2.3) */
ehci_halt(struct ehci_hcd * ehci)184 static int ehci_halt (struct ehci_hcd *ehci)
185 {
186 u32 temp = readl (&ehci->regs->status);
187
188 if ((temp & STS_HALT) != 0)
189 return 0;
190
191 temp = readl (&ehci->regs->command);
192 temp &= ~CMD_RUN;
193 writel (temp, &ehci->regs->command);
194 return handshake (&ehci->regs->status, STS_HALT, STS_HALT, 16 * 125);
195 }
196
197 /* reset a non-running (STS_HALT == 1) controller */
ehci_reset(struct ehci_hcd * ehci)198 static int ehci_reset (struct ehci_hcd *ehci)
199 {
200 u32 command = readl (&ehci->regs->command);
201
202 command |= CMD_RESET;
203 dbg_cmd (ehci, "reset", command);
204 writel (command, &ehci->regs->command);
205 ehci->hcd.state = USB_STATE_HALT;
206 return handshake (&ehci->regs->command, CMD_RESET, 0, 250 * 1000);
207 }
208
209 /* idle the controller (from running) */
ehci_ready(struct ehci_hcd * ehci)210 static void ehci_ready (struct ehci_hcd *ehci)
211 {
212 u32 temp;
213
214 #ifdef DEBUG
215 if (!HCD_IS_RUNNING (ehci->hcd.state))
216 BUG ();
217 #endif
218
219 /* wait for any schedule enables/disables to take effect */
220 temp = 0;
221 if (ehci->async->qh_next.qh)
222 temp = STS_ASS;
223 if (ehci->next_uframe != -1)
224 temp |= STS_PSS;
225 if (handshake (&ehci->regs->status, STS_ASS | STS_PSS,
226 temp, 16 * 125) != 0) {
227 ehci->hcd.state = USB_STATE_HALT;
228 return;
229 }
230
231 /* then disable anything that's still active */
232 temp = readl (&ehci->regs->command);
233 temp &= ~(CMD_ASE | CMD_IAAD | CMD_PSE);
234 writel (temp, &ehci->regs->command);
235
236 /* hardware can take 16 microframes to turn off ... */
237 if (handshake (&ehci->regs->status, STS_ASS | STS_PSS,
238 0, 16 * 125) != 0) {
239 ehci->hcd.state = USB_STATE_HALT;
240 return;
241 }
242 ehci->hcd.state = USB_STATE_READY;
243 }
244
245 /*-------------------------------------------------------------------------*/
246
247 #include "ehci-hub.c"
248 #include "ehci-mem.c"
249 #include "ehci-q.c"
250 #include "ehci-sched.c"
251
252 /*-------------------------------------------------------------------------*/
253
254 static void ehci_work(struct ehci_hcd *ehci, struct pt_regs *regs);
255
ehci_watchdog(unsigned long param)256 static void ehci_watchdog (unsigned long param)
257 {
258 struct ehci_hcd *ehci = (struct ehci_hcd *) param;
259 unsigned long flags;
260
261 spin_lock_irqsave (&ehci->lock, flags);
262
263 /* lost IAA irqs wedge things badly; seen with a vt8235 */
264 if (ehci->reclaim) {
265 u32 status = readl (&ehci->regs->status);
266
267 if (status & STS_IAA) {
268 ehci_vdbg (ehci, "lost IAA\n");
269 COUNT (ehci->stats.lost_iaa);
270 writel (STS_IAA, &ehci->regs->status);
271 ehci->reclaim_ready = 1;
272 }
273 }
274
275 /* stop async processing after it's idled a bit */
276 if (test_bit (TIMER_ASYNC_OFF, &ehci->actions))
277 start_unlink_async (ehci, ehci->async);
278
279 /* ehci could run by timer, without IRQs ... */
280 ehci_work (ehci, NULL);
281
282 spin_unlock_irqrestore (&ehci->lock, flags);
283 }
284
285 /* EHCI 0.96 (and later) section 5.1 says how to kick BIOS/SMM/...
286 * off the controller (maybe it can boot from highspeed USB disks).
287 */
bios_handoff(struct ehci_hcd * ehci,int where,u32 cap)288 static int bios_handoff (struct ehci_hcd *ehci, int where, u32 cap)
289 {
290 if (cap & (1 << 16)) {
291 int msec = 500;
292
293 /* request handoff to OS */
294 cap |= 1 << 24;
295 pci_write_config_dword (ehci->hcd.pdev, where, cap);
296
297 /* and wait a while for it to happen */
298 do {
299 wait_ms (10);
300 msec -= 10;
301 pci_read_config_dword (ehci->hcd.pdev, where, &cap);
302 } while ((cap & (1 << 16)) && msec);
303 if (cap & (1 << 16)) {
304 ehci_err (ehci, "BIOS handoff failed (%d, %04x)\n",
305 where, cap);
306 pci_write_config_dword (ehci->hcd.pdev, where, 0);
307 return 0;
308 }
309 ehci_dbg (ehci, "BIOS handoff succeeded\n");
310 }
311 return 0;
312 }
313
314 static int
ehci_reboot(struct notifier_block * self,unsigned long code,void * null)315 ehci_reboot (struct notifier_block *self, unsigned long code, void *null)
316 {
317 struct ehci_hcd *ehci;
318
319 ehci = container_of (self, struct ehci_hcd, reboot_notifier);
320
321 /* make BIOS/etc use companion controller during reboot */
322 writel (0, &ehci->regs->configured_flag);
323 return 0;
324 }
325
326
327 /* called by khubd or root hub init threads */
328
ehci_start(struct usb_hcd * hcd)329 static int ehci_start (struct usb_hcd *hcd)
330 {
331 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
332 u32 temp;
333 struct usb_device *udev;
334 struct usb_bus *bus;
335 int retval;
336 u32 hcc_params;
337 u8 tempbyte;
338
339 spin_lock_init (&ehci->lock);
340
341 ehci->caps = (struct ehci_caps *) hcd->regs;
342 ehci->regs = (struct ehci_regs *) (hcd->regs +
343 HC_LENGTH (readl (&ehci->caps->hc_capbase)));
344 dbg_hcs_params (ehci, "ehci_start");
345 dbg_hcc_params (ehci, "ehci_start");
346
347 hcc_params = readl (&ehci->caps->hcc_params);
348
349 /* EHCI 0.96 and later may have "extended capabilities" */
350 temp = HCC_EXT_CAPS (hcc_params);
351 while (temp) {
352 u32 cap;
353
354 pci_read_config_dword (ehci->hcd.pdev, temp, &cap);
355 ehci_dbg (ehci, "capability %04x at %02x\n", cap, temp);
356 switch (cap & 0xff) {
357 case 1: /* BIOS/SMM/... handoff */
358 if (bios_handoff (ehci, temp, cap) != 0)
359 return -EOPNOTSUPP;
360 break;
361 case 0: /* illegal reserved capability */
362 ehci_warn (ehci, "illegal capability!\n");
363 cap = 0;
364 /* FALLTHROUGH */
365 default: /* unknown */
366 break;
367 }
368 temp = (cap >> 8) & 0xff;
369 }
370
371 /* cache this readonly data; minimize PCI reads */
372 ehci->hcs_params = readl (&ehci->caps->hcs_params);
373
374 /* force HC to halt state */
375 if ((retval = ehci_halt (ehci)) != 0)
376 return retval;
377
378 /*
379 * hw default: 1K periodic list heads, one per frame.
380 * periodic_size can shrink by USBCMD update if hcc_params allows.
381 */
382 ehci->periodic_size = DEFAULT_I_TDPS;
383 if ((retval = ehci_mem_init (ehci, SLAB_KERNEL)) < 0)
384 return retval;
385
386 /* controllers may cache some of the periodic schedule ... */
387 if (HCC_ISOC_CACHE (hcc_params)) // full frame cache
388 ehci->i_thresh = 8;
389 else // N microframes cached
390 ehci->i_thresh = 2 + HCC_ISOC_THRES (hcc_params);
391
392 ehci->reclaim = 0;
393 ehci->next_uframe = -1;
394
395 /* controller state: unknown --> reset */
396
397 /* EHCI spec section 4.1 */
398 if ((retval = ehci_reset (ehci)) != 0) {
399 ehci_mem_cleanup (ehci);
400 return retval;
401 }
402 writel (INTR_MASK, &ehci->regs->intr_enable);
403 writel (ehci->periodic_dma, &ehci->regs->frame_list);
404
405 /*
406 * dedicate a qh for the async ring head, since we couldn't unlink
407 * a 'real' qh without stopping the async schedule [4.8]. use it
408 * as the 'reclamation list head' too.
409 * its dummy is used in hw_alt_next of many tds, to prevent the qh
410 * from automatically advancing to the next td after short reads.
411 */
412 ehci->async->qh_next.qh = 0;
413 ehci->async->hw_next = QH_NEXT (ehci->async->qh_dma);
414 ehci->async->hw_info1 = cpu_to_le32 (QH_HEAD);
415 ehci->async->hw_token = cpu_to_le32 (QTD_STS_HALT);
416 ehci->async->hw_qtd_next = EHCI_LIST_END;
417 ehci->async->qh_state = QH_STATE_LINKED;
418 ehci->async->hw_alt_next = QTD_NEXT (ehci->async->dummy->qtd_dma);
419 writel ((u32)ehci->async->qh_dma, &ehci->regs->async_next);
420
421 /*
422 * hcc_params controls whether ehci->regs->segment must (!!!)
423 * be used; it constrains QH/ITD/SITD and QTD locations.
424 * pci_pool consistent memory always uses segment zero.
425 * streaming mappings for I/O buffers, like pci_map_single(),
426 * can return segments above 4GB, if the device allows.
427 *
428 * NOTE: the dma mask is visible through dma_supported(), so
429 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
430 * Scsi_Host.highmem_io, and so forth. It's readonly to all
431 * host side drivers though.
432 */
433 if (HCC_64BIT_ADDR (hcc_params)) {
434 writel (0, &ehci->regs->segment);
435 if (!pci_set_dma_mask (ehci->hcd.pdev, 0xffffffffffffffffULL))
436 ehci_info (ehci, "enabled 64bit PCI DMA\n");
437 }
438
439 /* help hc dma work well with cachelines */
440 pci_set_mwi (ehci->hcd.pdev);
441
442 /* clear interrupt enables, set irq latency */
443 temp = readl (&ehci->regs->command) & 0x0fff;
444 if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
445 log2_irq_thresh = 0;
446 temp |= 1 << (16 + log2_irq_thresh);
447 // if hc can park (ehci >= 0.96), default is 3 packets per async QH
448 if (HCC_PGM_FRAMELISTLEN (hcc_params)) {
449 /* periodic schedule size can be smaller than default */
450 temp &= ~(3 << 2);
451 temp |= (EHCI_TUNE_FLS << 2);
452 switch (EHCI_TUNE_FLS) {
453 case 0: ehci->periodic_size = 1024; break;
454 case 1: ehci->periodic_size = 512; break;
455 case 2: ehci->periodic_size = 256; break;
456 default: BUG ();
457 }
458 }
459 temp &= ~(CMD_IAAD | CMD_ASE | CMD_PSE),
460 // Philips, Intel, and maybe others need CMD_RUN before the
461 // root hub will detect new devices (why?); NEC doesn't
462 temp |= CMD_RUN;
463 writel (temp, &ehci->regs->command);
464 dbg_cmd (ehci, "init", temp);
465
466 /* set async sleep time = 10 us ... ? */
467
468 init_timer (&ehci->watchdog);
469 ehci->watchdog.function = ehci_watchdog;
470 ehci->watchdog.data = (unsigned long) ehci;
471
472 /* wire up the root hub */
473 bus = hcd_to_bus (hcd);
474 bus->root_hub = udev = usb_alloc_dev (NULL, bus);
475 if (!udev) {
476 done2:
477 ehci_mem_cleanup (ehci);
478 return -ENOMEM;
479 }
480
481 /*
482 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
483 * are explicitly handed to companion controller(s), so no TT is
484 * involved with the root hub.
485 */
486 ehci->reboot_notifier.notifier_call = ehci_reboot;
487 register_reboot_notifier (&ehci->reboot_notifier);
488
489 ehci->hcd.state = USB_STATE_READY;
490 writel (FLAG_CF, &ehci->regs->configured_flag);
491 readl (&ehci->regs->command); /* unblock posted write */
492
493 /* PCI Serial Bus Release Number is at 0x60 offset */
494 pci_read_config_byte (hcd->pdev, 0x60, &tempbyte);
495 temp = HC_VERSION(readl (&ehci->caps->hc_capbase));
496 ehci_info (ehci,
497 "USB %x.%x enabled, EHCI %x.%02x, driver %s\n",
498 ((tempbyte & 0xf0)>>4), (tempbyte & 0x0f),
499 temp >> 8, temp & 0xff, DRIVER_VERSION);
500
501 /*
502 * From here on, khubd concurrently accesses the root
503 * hub; drivers will be talking to enumerated devices.
504 *
505 * Before this point the HC was idle/ready. After, khubd
506 * and device drivers may start it running.
507 */
508 usb_connect (udev);
509 udev->speed = USB_SPEED_HIGH;
510 if (hcd_register_root (hcd) != 0) {
511 if (hcd->state == USB_STATE_RUNNING)
512 ehci_ready (ehci);
513 ehci_reset (ehci);
514 bus->root_hub = 0;
515 usb_free_dev (udev);
516 retval = -ENODEV;
517 goto done2;
518 }
519
520 create_debug_files (ehci);
521
522 return 0;
523 }
524
525 /* always called by thread; normally rmmod */
526
ehci_stop(struct usb_hcd * hcd)527 static void ehci_stop (struct usb_hcd *hcd)
528 {
529 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
530
531 ehci_dbg (ehci, "stop\n");
532
533 /* no more interrupts ... */
534 if (hcd->state == USB_STATE_RUNNING)
535 ehci_ready (ehci);
536 if (in_interrupt ()) { /* must not happen!! */
537 ehci_err (ehci, "stopped in_interrupt!\n");
538 return;
539 }
540 del_timer_sync (&ehci->watchdog);
541 ehci_reset (ehci);
542
543 /* let companion controllers work when we aren't */
544 writel (0, &ehci->regs->configured_flag);
545 unregister_reboot_notifier (&ehci->reboot_notifier);
546
547 remove_debug_files (ehci);
548
549 /* root hub is shut down separately (first, when possible) */
550 spin_lock_irq (&ehci->lock);
551 if (ehci->async)
552 ehci_work (ehci, NULL);
553 spin_unlock_irq (&ehci->lock);
554 ehci_mem_cleanup (ehci);
555
556 #ifdef EHCI_STATS
557 ehci_dbg (ehci, "irq normal %ld err %ld reclaim %ld (lost %ld)\n",
558 ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim,
559 ehci->stats.lost_iaa);
560 ehci_dbg (ehci, "complete %ld unlink %ld\n",
561 ehci->stats.complete, ehci->stats.unlink);
562 #endif
563
564 dbg_status (ehci, "ehci_stop completed", readl (&ehci->regs->status));
565 }
566
ehci_get_frame(struct usb_hcd * hcd)567 static int ehci_get_frame (struct usb_hcd *hcd)
568 {
569 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
570 return (readl (&ehci->regs->frame_index) >> 3) % ehci->periodic_size;
571 }
572
573 /*-------------------------------------------------------------------------*/
574
575 #ifdef CONFIG_PM
576
577 /* suspend/resume, section 4.3 */
578
ehci_suspend(struct usb_hcd * hcd,u32 state)579 static int ehci_suspend (struct usb_hcd *hcd, u32 state)
580 {
581 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
582 int ports;
583 int i;
584
585 ehci_dbg (ehci, "suspend to %d\n", state);
586
587 ports = HCS_N_PORTS (ehci->hcs_params);
588
589 // FIXME: This assumes what's probably a D3 level suspend...
590
591 // FIXME: usb wakeup events on this bus should resume the machine.
592 // pci config register PORTWAKECAP controls which ports can do it;
593 // bios may have initted the register...
594
595 /* suspend each port, then stop the hc */
596 for (i = 0; i < ports; i++) {
597 int temp = readl (&ehci->regs->port_status [i]);
598
599 if ((temp & PORT_PE) == 0
600 || (temp & PORT_OWNER) != 0)
601 continue;
602 ehci_dbg (ehci, "suspend port %d", i);
603 temp |= PORT_SUSPEND;
604 writel (temp, &ehci->regs->port_status [i]);
605 }
606
607 if (hcd->state == USB_STATE_RUNNING)
608 ehci_ready (ehci);
609 writel (readl (&ehci->regs->command) & ~CMD_RUN, &ehci->regs->command);
610
611 // save pci FLADJ value
612
613 /* who tells PCI to reduce power consumption? */
614
615 return 0;
616 }
617
ehci_resume(struct usb_hcd * hcd)618 static int ehci_resume (struct usb_hcd *hcd)
619 {
620 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
621 int ports;
622 int i;
623
624 ehci_dbg (ehci, "resume\n");
625
626 ports = HCS_N_PORTS (ehci->hcs_params);
627
628 // FIXME: if controller didn't retain state,
629 // return and let generic code clean it up
630 // test configured_flag ?
631
632 /* resume HC and each port */
633 // restore pci FLADJ value
634 // khubd and drivers will set HC running, if needed;
635 hcd->state = USB_STATE_READY;
636 // FIXME Philips/Intel/... etc don't really have a "READY"
637 // state ... turn on CMD_RUN too
638 for (i = 0; i < ports; i++) {
639 int temp = readl (&ehci->regs->port_status [i]);
640
641 if ((temp & PORT_PE) == 0
642 || (temp & PORT_SUSPEND) != 0)
643 continue;
644 ehci_dbg (ehci, "resume port %d", i);
645 temp |= PORT_RESUME;
646 writel (temp, &ehci->regs->port_status [i]);
647 readl (&ehci->regs->command); /* unblock posted writes */
648
649 wait_ms (20);
650 temp &= ~PORT_RESUME;
651 writel (temp, &ehci->regs->port_status [i]);
652 }
653 readl (&ehci->regs->command); /* unblock posted writes */
654 return 0;
655 }
656
657 #endif
658
659 /*-------------------------------------------------------------------------*/
660
661 /*
662 * ehci_work is called from some interrupts, timers, and so on.
663 * it calls driver completion functions, after dropping ehci->lock.
664 */
ehci_work(struct ehci_hcd * ehci,struct pt_regs * regs)665 static void ehci_work (struct ehci_hcd *ehci, struct pt_regs *regs)
666 {
667 timer_action_done (ehci, TIMER_IO_WATCHDOG);
668 if (ehci->reclaim_ready)
669 end_unlink_async (ehci, regs);
670 scan_async (ehci, regs);
671 if (ehci->next_uframe != -1)
672 scan_periodic (ehci, regs);
673
674 /* the IO watchdog guards against hardware or driver bugs that
675 * misplace IRQs, and should let us run completely without IRQs.
676 */
677 if ((ehci->async->qh_next.ptr != 0) || (ehci->periodic_sched != 0))
678 timer_action (ehci, TIMER_IO_WATCHDOG);
679 }
680
681 /*-------------------------------------------------------------------------*/
682
ehci_irq(struct usb_hcd * hcd,struct pt_regs * regs)683 static void ehci_irq (struct usb_hcd *hcd, struct pt_regs *regs)
684 {
685 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
686 u32 status;
687 int bh;
688
689 spin_lock (&ehci->lock);
690
691 status = readl (&ehci->regs->status);
692
693 /* e.g. cardbus physical eject */
694 if (status == ~(u32) 0) {
695 ehci_dbg (ehci, "device removed\n");
696 goto dead;
697 }
698
699 status &= INTR_MASK;
700 if (!status) /* irq sharing? */
701 goto done;
702
703 /* clear (just) interrupts */
704 writel (status, &ehci->regs->status);
705 readl (&ehci->regs->command); /* unblock posted write */
706 bh = 0;
707
708 #ifdef EHCI_VERBOSE_DEBUG
709 /* unrequested/ignored: Port Change Detect, Frame List Rollover */
710 dbg_status (ehci, "irq", status);
711 #endif
712
713 /* INT, ERR, and IAA interrupt rates can be throttled */
714
715 /* normal [4.15.1.2] or error [4.15.1.1] completion */
716 if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
717 if (likely ((status & STS_ERR) == 0))
718 COUNT (ehci->stats.normal);
719 else
720 COUNT (ehci->stats.error);
721 bh = 1;
722 }
723
724 /* complete the unlinking of some qh [4.15.2.3] */
725 if (status & STS_IAA) {
726 COUNT (ehci->stats.reclaim);
727 ehci->reclaim_ready = 1;
728 bh = 1;
729 }
730
731 /* PCI errors [4.15.2.4] */
732 if (unlikely ((status & STS_FATAL) != 0)) {
733 ehci_err (ehci, "fatal error\n");
734 dead:
735 ehci_reset (ehci);
736 /* generic layer kills/unlinks all urbs, then
737 * uses ehci_stop to clean up the rest
738 */
739 bh = 1;
740 }
741
742 if (bh)
743 ehci_work (ehci, regs);
744 done:
745 spin_unlock (&ehci->lock);
746 }
747
748 /*-------------------------------------------------------------------------*/
749
750 /*
751 * non-error returns are a promise to giveback() the urb later
752 * we drop ownership so next owner (or urb unlink) can get it
753 *
754 * urb + dev is in hcd_dev.urb_list
755 * we're queueing TDs onto software and hardware lists
756 *
757 * hcd-specific init for hcpriv hasn't been done yet
758 *
759 * NOTE: control, bulk, and interrupt share the same code to append TDs
760 * to a (possibly active) QH, and the same QH scanning code.
761 */
ehci_urb_enqueue(struct usb_hcd * hcd,struct urb * urb,int mem_flags)762 static int ehci_urb_enqueue (
763 struct usb_hcd *hcd,
764 struct urb *urb,
765 int mem_flags
766 ) {
767 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
768 struct list_head qtd_list;
769
770 urb->transfer_flags &= ~EHCI_STATE_UNLINK;
771 INIT_LIST_HEAD (&qtd_list);
772
773 switch (usb_pipetype (urb->pipe)) {
774 // case PIPE_CONTROL:
775 // case PIPE_BULK:
776 default:
777 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
778 return -ENOMEM;
779 return submit_async (ehci, urb, &qtd_list, mem_flags);
780
781 case PIPE_INTERRUPT:
782 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
783 return -ENOMEM;
784 return intr_submit (ehci, urb, &qtd_list, mem_flags);
785
786 case PIPE_ISOCHRONOUS:
787 if (urb->dev->speed == USB_SPEED_HIGH)
788 return itd_submit (ehci, urb, mem_flags);
789 #ifdef have_split_iso
790 else
791 return sitd_submit (ehci, urb, mem_flags);
792 #else
793 dbg ("no split iso support yet");
794 return -ENOSYS;
795 #endif /* have_split_iso */
796 }
797 }
798
unlink_async(struct ehci_hcd * ehci,struct ehci_qh * qh)799 static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
800 {
801 /* if we need to use IAA and it's busy, defer */
802 if (qh->qh_state == QH_STATE_LINKED
803 && ehci->reclaim
804 && HCD_IS_RUNNING (ehci->hcd.state)) {
805 struct ehci_qh *last;
806
807 for (last = ehci->reclaim;
808 last->reclaim;
809 last = last->reclaim)
810 continue;
811 qh->qh_state = QH_STATE_UNLINK_WAIT;
812 last->reclaim = qh;
813
814 /* bypass IAA if the hc can't care */
815 } else if (!HCD_IS_RUNNING (ehci->hcd.state) && ehci->reclaim)
816 end_unlink_async (ehci, NULL);
817
818 /* something else might have unlinked the qh by now */
819 if (qh->qh_state == QH_STATE_LINKED)
820 start_unlink_async (ehci, qh);
821 }
822
823 /* remove from hardware lists
824 * completions normally happen asynchronously
825 */
826
ehci_urb_dequeue(struct usb_hcd * hcd,struct urb * urb)827 static int ehci_urb_dequeue (struct usb_hcd *hcd, struct urb *urb)
828 {
829 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
830 struct ehci_qh *qh;
831 unsigned long flags;
832
833 spin_lock_irqsave (&ehci->lock, flags);
834 switch (usb_pipetype (urb->pipe)) {
835 // case PIPE_CONTROL:
836 // case PIPE_BULK:
837 default:
838 qh = (struct ehci_qh *) urb->hcpriv;
839 if (!qh)
840 break;
841 unlink_async (ehci, qh);
842 break;
843
844 case PIPE_INTERRUPT:
845 qh = (struct ehci_qh *) urb->hcpriv;
846 if (!qh)
847 break;
848 if (qh->qh_state == QH_STATE_LINKED) {
849 /* messy, can spin or block a microframe ... */
850 intr_deschedule (ehci, qh, 1);
851 /* qh_state == IDLE */
852 }
853 qh_completions (ehci, qh, NULL);
854
855 /* reschedule QH iff another request is queued */
856 if (!list_empty (&qh->qtd_list)
857 && HCD_IS_RUNNING (ehci->hcd.state)) {
858 int status;
859
860 status = qh_schedule (ehci, qh);
861 spin_unlock_irqrestore (&ehci->lock, flags);
862
863 if (status != 0) {
864 // shouldn't happen often, but ...
865 // FIXME kill those tds' urbs
866 err ("can't reschedule qh %p, err %d",
867 qh, status);
868 }
869 return status;
870 }
871 break;
872
873 case PIPE_ISOCHRONOUS:
874 // itd or sitd ...
875
876 // wait till next completion, do it then.
877 // completion irqs can wait up to 1024 msec,
878 urb->transfer_flags |= EHCI_STATE_UNLINK;
879 break;
880 }
881 spin_unlock_irqrestore (&ehci->lock, flags);
882 return 0;
883 }
884
885 /*-------------------------------------------------------------------------*/
886
887 // bulk qh holds the data toggle
888
ehci_free_config(struct usb_hcd * hcd,struct usb_device * udev)889 static void ehci_free_config (struct usb_hcd *hcd, struct usb_device *udev)
890 {
891 struct hcd_dev *dev = (struct hcd_dev *)udev->hcpriv;
892 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
893 int i;
894 unsigned long flags;
895
896 /* ASSERT: no requests/urbs are still linked (so no TDs) */
897 /* ASSERT: nobody can be submitting urbs for this any more */
898
899 ehci_dbg (ehci, "free_config %s devnum %d\n",
900 udev->devpath, udev->devnum);
901
902 spin_lock_irqsave (&ehci->lock, flags);
903 for (i = 0; i < 32; i++) {
904 if (dev->ep [i]) {
905 struct ehci_qh *qh;
906 char *why;
907
908 /* dev->ep is a QH unless info1.maxpacket of zero
909 * marks an iso stream head.
910 * FIXME do something smarter here with ISO
911 */
912 qh = (struct ehci_qh *) dev->ep [i];
913 if (qh->hw_info1 == 0) {
914 ehci_err (ehci, "no iso cleanup!!\n");
915 continue;
916 }
917
918
919 /* detect/report non-recoverable errors */
920 if (in_interrupt ())
921 why = "disconnect() didn't";
922 else if ((qh->hw_info2 & cpu_to_le32 (0xffff)) != 0
923 && qh->qh_state != QH_STATE_IDLE)
924 why = "(active periodic)";
925 else
926 why = 0;
927 if (why) {
928 err ("dev %s-%s ep %d-%s error: %s",
929 hcd_to_bus (hcd)->bus_name,
930 udev->devpath,
931 i & 0xf, (i & 0x10) ? "IN" : "OUT",
932 why);
933 BUG ();
934 }
935
936 dev->ep [i] = 0;
937 if (qh->qh_state == QH_STATE_IDLE)
938 goto idle;
939 ehci_dbg (ehci, "free_config, async ep 0x%02x qh %p",
940 i, qh);
941
942 /* scan_async() empties the ring as it does its work,
943 * using IAA, but doesn't (yet?) turn it off. if it
944 * doesn't empty this qh, likely it's the last entry.
945 */
946 while (qh->qh_state == QH_STATE_LINKED
947 && ehci->reclaim
948 && HCD_IS_RUNNING (ehci->hcd.state)
949 ) {
950 spin_unlock_irqrestore (&ehci->lock, flags);
951 /* wait_ms() won't spin, we're a thread;
952 * and we know IRQ/timer/... can progress
953 */
954 wait_ms (1);
955 spin_lock_irqsave (&ehci->lock, flags);
956 }
957 if (qh->qh_state == QH_STATE_LINKED)
958 start_unlink_async (ehci, qh);
959 while (qh->qh_state != QH_STATE_IDLE
960 && ehci->hcd.state != USB_STATE_HALT) {
961 spin_unlock_irqrestore (&ehci->lock, flags);
962 wait_ms (1);
963 spin_lock_irqsave (&ehci->lock, flags);
964 }
965 idle:
966 qh_put (ehci, qh);
967 }
968 }
969
970 spin_unlock_irqrestore (&ehci->lock, flags);
971 }
972
973 /*-------------------------------------------------------------------------*/
974
975 static const struct hc_driver ehci_driver = {
976 .description = hcd_name,
977
978 /*
979 * generic hardware linkage
980 */
981 .irq = ehci_irq,
982 .flags = HCD_MEMORY | HCD_USB2,
983
984 /*
985 * basic lifecycle operations
986 */
987 .start = ehci_start,
988 #ifdef CONFIG_PM
989 .suspend = ehci_suspend,
990 .resume = ehci_resume,
991 #endif
992 .stop = ehci_stop,
993
994 /*
995 * memory lifecycle (except per-request)
996 */
997 .hcd_alloc = ehci_hcd_alloc,
998 .hcd_free = ehci_hcd_free,
999
1000 /*
1001 * managing i/o requests and associated device resources
1002 */
1003 .urb_enqueue = ehci_urb_enqueue,
1004 .urb_dequeue = ehci_urb_dequeue,
1005 .free_config = ehci_free_config,
1006
1007 /*
1008 * scheduling support
1009 */
1010 .get_frame_number = ehci_get_frame,
1011
1012 /*
1013 * root hub support
1014 */
1015 .hub_status_data = ehci_hub_status_data,
1016 .hub_control = ehci_hub_control,
1017 };
1018
1019 /*-------------------------------------------------------------------------*/
1020
1021 /* EHCI spec says PCI is required. */
1022
1023 /* PCI driver selection metadata; PCI hotplugging uses this */
1024 static const struct pci_device_id __devinitdata pci_ids [] = { {
1025
1026 /* handle any USB 2.0 EHCI controller */
1027
1028 .class = ((PCI_CLASS_SERIAL_USB << 8) | 0x20),
1029 .class_mask = ~0,
1030 .driver_data = (unsigned long) &ehci_driver,
1031
1032 /* no matter who makes it */
1033 .vendor = PCI_ANY_ID,
1034 .device = PCI_ANY_ID,
1035 .subvendor = PCI_ANY_ID,
1036 .subdevice = PCI_ANY_ID,
1037
1038 }, { /* end: all zeroes */ }
1039 };
1040 MODULE_DEVICE_TABLE (pci, pci_ids);
1041
1042 /* pci driver glue; this is a "new style" PCI driver module */
1043 static struct pci_driver ehci_pci_driver = {
1044 .name = (char *) hcd_name,
1045 .id_table = pci_ids,
1046
1047 .probe = usb_hcd_pci_probe,
1048 .remove = usb_hcd_pci_remove,
1049
1050 #ifdef CONFIG_PM
1051 .suspend = usb_hcd_pci_suspend,
1052 .resume = usb_hcd_pci_resume,
1053 #endif
1054 };
1055
1056 #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
1057
1058 MODULE_DESCRIPTION (DRIVER_INFO);
1059 MODULE_AUTHOR (DRIVER_AUTHOR);
1060 MODULE_LICENSE ("GPL");
1061
init(void)1062 static int __init init (void)
1063 {
1064 pr_debug ("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
1065 hcd_name,
1066 sizeof (struct ehci_qh), sizeof (struct ehci_qtd),
1067 sizeof (struct ehci_itd), sizeof (struct ehci_sitd));
1068
1069 return pci_module_init (&ehci_pci_driver);
1070 }
1071 module_init (init);
1072
cleanup(void)1073 static void __exit cleanup (void)
1074 {
1075 pci_unregister_driver (&ehci_pci_driver);
1076 }
1077 module_exit (cleanup);
1078