1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /* Copyright(c) 2007 - 2011 Realtek Corporation. */
3 
4 #ifndef __RTL8188E_HAL_H__
5 #define __RTL8188E_HAL_H__
6 
7 /* include HAL Related header after HAL Related compiling flags */
8 #include "rtl8188e_spec.h"
9 #include "Hal8188EPhyReg.h"
10 #include "Hal8188EPhyCfg.h"
11 #include "rtl8188e_rf.h"
12 #include "rtl8188e_dm.h"
13 #include "rtl8188e_recv.h"
14 #include "rtl8188e_xmit.h"
15 #include "rtl8188e_cmd.h"
16 #include "rtw_efuse.h"
17 #include "odm_types.h"
18 #include "odm.h"
19 #include "odm_HWConfig.h"
20 #include "odm_RegDefine11N.h"
21 #include "HalPhyRf_8188e.h"
22 #include "Hal8188ERateAdaptive.h"
23 #include "HalHWImg8188E_MAC.h"
24 #include "HalHWImg8188E_RF.h"
25 #include "HalHWImg8188E_BB.h"
26 #include "odm_RegConfig8188E.h"
27 #include "odm_RTL8188E.h"
28 
29 /* 		RTL8188E Power Configuration CMDs for USB/SDIO interfaces */
30 #define Rtl8188E_NIC_PWR_ON_FLOW		rtl8188E_power_on_flow
31 #define Rtl8188E_NIC_DISABLE_FLOW		rtl8188E_card_disable_flow
32 #define Rtl8188E_NIC_LPS_ENTER_FLOW		rtl8188E_enter_lps_flow
33 
34 #define DRVINFO_SZ	4 /*  unit is 8bytes */
35 #define PageNum_128(_Len)	(u32)(((_Len)>>7) + ((_Len) & 0x7F ? 1 : 0))
36 
37 #define DRIVER_EARLY_INT_TIME		0x05
38 #define BCN_DMA_ATIME_INT_TIME		0x02
39 
40 #define MAX_RX_DMA_BUFFER_SIZE_88E				\
41       0x2400 /* 9k for 88E nornal chip , MaxRxBuff=10k-max(TxReportSize(64*8),
42 	      * WOLPattern(16*24)) */
43 
44 #define TX_SELE_HQ			BIT(0)		/*  High Queue */
45 #define TX_SELE_LQ			BIT(1)		/*  Low Queue */
46 #define TX_SELE_NQ			BIT(2)		/*  Normal Queue */
47 
48 /*  Note: We will divide number of page equally for each queue other
49  *  than public queue! */
50 /*  22k = 22528 bytes = 176 pages (@page =  128 bytes) */
51 /*  must reserved about 7 pages for LPS =>  176-7 = 169 (0xA9) */
52 /*  2*BCN / 1*ps-poll / 1*null-data /1*prob_rsp /1*QOS null-data /1*BT QOS
53  *  null-data */
54 
55 #define TX_TOTAL_PAGE_NUMBER_88E		0xA9/*   169 (21632=> 21k) */
56 
57 #define TX_PAGE_BOUNDARY_88E (TX_TOTAL_PAGE_NUMBER_88E + 1)
58 
59 /* Note: For Normal Chip Setting ,modify later */
60 #define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER			\
61 	TX_TOTAL_PAGE_NUMBER_88E  /* 0xA9 , 0xb0=>176=>22k */
62 #define WMM_NORMAL_TX_PAGE_BOUNDARY_88E			\
63 	(WMM_NORMAL_TX_TOTAL_PAGE_NUMBER + 1) /* 0xA9 */
64 
65 #include "HalVerDef.h"
66 #include "hal_com.h"
67 
68 /* 	Channel Plan */
69 enum ChannelPlan {
70 	CHPL_FCC	= 0,
71 	CHPL_IC		= 1,
72 	CHPL_ETSI	= 2,
73 	CHPL_SPA	= 3,
74 	CHPL_FRANCE	= 4,
75 	CHPL_MKK	= 5,
76 	CHPL_MKK1	= 6,
77 	CHPL_ISRAEL	= 7,
78 	CHPL_TELEC	= 8,
79 	CHPL_GLOBAL	= 9,
80 	CHPL_WORLD	= 10,
81 };
82 
83 struct txpowerinfo24g {
84 	u8 IndexCCK_Base[RF_PATH_MAX][MAX_CHNL_GROUP_24G];
85 	u8 IndexBW40_Base[RF_PATH_MAX][MAX_CHNL_GROUP_24G];
86 	/* If only one tx, only BW20 and OFDM are used. */
87 	s8 CCK_Diff[RF_PATH_MAX][MAX_TX_COUNT];
88 	s8 OFDM_Diff[RF_PATH_MAX][MAX_TX_COUNT];
89 	s8 BW20_Diff[RF_PATH_MAX][MAX_TX_COUNT];
90 	s8 BW40_Diff[RF_PATH_MAX][MAX_TX_COUNT];
91 };
92 
93 #define EFUSE_REAL_CONTENT_LEN		512
94 #define AVAILABLE_EFUSE_ADDR(addr)	(addr < EFUSE_REAL_CONTENT_LEN)
95 
96 #define		EFUSE_REAL_CONTENT_LEN_88E	256
97 #define		EFUSE_MAP_LEN_88E		512
98 #define		EFUSE_MAX_SECTION_88E		64
99 /*  To prevent out of boundary programming case, leave 1byte and program
100  *  full section */
101 /*  9bytes + 1byt + 5bytes and pre 1byte. */
102 /*  For worst case: */
103 /*  | 2byte|----8bytes----|1byte|--7bytes--| 92D */
104 /*  PG data exclude header, dummy 7 bytes frome CP test and reserved 1byte. */
105 #define		EFUSE_OOB_PROTECT_BYTES_88E	18
106 
107 #define EFUSE_PROTECT_BYTES_BANK	16
108 
109 #define USB_RXAGG_PAGE_COUNT	48
110 #define USB_RXAGG_PAGE_TIMEOUT	0x4
111 
112 struct hal_data_8188e {
113 	struct HAL_VERSION	VersionID;
114 	/* current WIFI_PHY values */
115 	enum ht_channel_width CurrentChannelBW;
116 	u8	CurrentChannel;
117 	u8	nCur40MhzPrimeSC;/*  Control channel sub-carrier */
118 
119 	u8	EEPROMRegulatory;
120 	u8	EEPROMThermalMeter;
121 
122 	u8	Index24G_CCK_Base[CHANNEL_MAX_NUMBER];
123 	u8	Index24G_BW40_Base[CHANNEL_MAX_NUMBER];
124 	/* If only one tx, only BW20 and OFDM are used. */
125 	s8	OFDM_24G_Diff[MAX_TX_COUNT];
126 	s8	BW20_24G_Diff[MAX_TX_COUNT];
127 
128 	/*  HT 20<->40 Pwr diff */
129 	u8	TxPwrHt20Diff[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
130 	/*  For HT<->legacy pwr diff */
131 	u8	TxPwrLegacyHtDiff[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
132 	/*  For power group */
133 	u8	PwrGroupHT20[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
134 	u8	PwrGroupHT40[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
135 
136 	/*  Read/write are allow for following hardware information variables */
137 	u8	pwrGroupCnt;
138 	u32	MCSTxPowerLevelOriginalOffset[MAX_PG_GROUP][16];
139 
140 	u8	CrystalCap;
141 
142 	u32	AcParam_BE; /* Original parameter for BE, use for EDCA turbo. */
143 
144 	struct bb_reg_def PHYRegDef;
145 
146 	u32	RfRegChnlVal;
147 
148 	/* for host message to fw */
149 	u8	LastHMEBoxNum;
150 
151 	u8	fw_ractrl;
152 	u8	RegFwHwTxQCtrl;
153 	u8	RegReg542;
154 	u8	RegCR_1;
155 
156 	struct dm_priv	dmpriv;
157 	struct odm_dm_struct odmpriv;
158 
159 	u8	CurAntenna;
160 	u8	AntDivCfg;
161 	u8	TRxAntDivType;
162 
163 	u8	OutEpQueueSel;
164 	u8	OutEpNumber;
165 
166 	struct P2P_PS_Offload_t	p2p_ps_offload;
167 
168 	/*  Auto FSM to Turn On, include clock, isolation, power control
169 	 *  for MAC only */
170 	u8	bMacPwrCtrlOn;
171 };
172 
173 s32 InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy);
174 
175 /*  EFuse */
176 void Hal_EfuseParseIDCode88E(struct adapter *padapter, u8 *hwinfo);
177 void Hal_ReadTxPowerInfo88E(struct adapter *padapter, u8 *hwinfo,
178 			    bool AutoLoadFail);
179 
180 void rtl8188e_EfuseParseChnlPlan(struct adapter *padapter, u8 *hwinfo,
181 				 bool AutoLoadFail);
182 void Hal_ReadAntennaDiversity88E(struct adapter *pAdapter,u8 *PROMContent,
183 				 bool AutoLoadFail);
184 void Hal_ReadThermalMeter_88E(struct adapter *	dapter, u8 *PROMContent,
185 			      bool AutoloadFail);
186 void Hal_EfuseParseXtal_8188E(struct adapter *pAdapter, u8 *hwinfo,
187 			      bool AutoLoadFail);
188 void Hal_ReadPowerSavingMode88E(struct adapter *pAdapter, u8 *hwinfo,
189 				bool AutoLoadFail);
190 
191 void rtl8188e_read_chip_version(struct adapter *padapter);
192 
193 s32 rtl8188e_iol_efuse_patch(struct adapter *padapter);
194 void rtw_cancel_all_timer(struct adapter *padapter);
195 
196 #endif /* __RTL8188E_HAL_H__ */
197