1 /*
2 * dbdefs.h
3 *
4 * DSP-BIOS Bridge driver support functions for TI OMAP processors.
5 *
6 * Global definitions and constants for DSP/BIOS Bridge.
7 *
8 * Copyright (C) 2005-2006 Texas Instruments, Inc.
9 *
10 * This package is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
15 * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
16 * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
17 */
18
19 #ifndef DBDEFS_
20 #define DBDEFS_
21
22 #include <linux/types.h>
23
24 #include <dspbridge/rms_sh.h> /* Types shared between GPP and DSP */
25
26 #define PG_SIZE4K 4096
27 #define PG_MASK(pg_size) (~((pg_size)-1))
28 #define PG_ALIGN_LOW(addr, pg_size) ((addr) & PG_MASK(pg_size))
29 #define PG_ALIGN_HIGH(addr, pg_size) (((addr)+(pg_size)-1) & PG_MASK(pg_size))
30
31 /* API return value and calling convention */
32 #define DBAPI int
33
34 /* Maximum length of node name, used in dsp_ndbprops */
35 #define DSP_MAXNAMELEN 32
36
37 /* notify_type values for the RegisterNotify() functions. */
38 #define DSP_SIGNALEVENT 0x00000001
39
40 /* Types of events for processors */
41 #define DSP_PROCESSORSTATECHANGE 0x00000001
42 #define DSP_PROCESSORATTACH 0x00000002
43 #define DSP_PROCESSORDETACH 0x00000004
44 #define DSP_PROCESSORRESTART 0x00000008
45
46 /* DSP exception events (DSP/BIOS and DSP MMU fault) */
47 #define DSP_MMUFAULT 0x00000010
48 #define DSP_SYSERROR 0x00000020
49 #define DSP_EXCEPTIONABORT 0x00000300
50 #define DSP_PWRERROR 0x00000080
51 #define DSP_WDTOVERFLOW 0x00000040
52
53 /* IVA exception events (IVA MMU fault) */
54 #define IVA_MMUFAULT 0x00000040
55 /* Types of events for nodes */
56 #define DSP_NODESTATECHANGE 0x00000100
57 #define DSP_NODEMESSAGEREADY 0x00000200
58
59 /* Types of events for streams */
60 #define DSP_STREAMDONE 0x00001000
61 #define DSP_STREAMIOCOMPLETION 0x00002000
62
63 /* Handle definition representing the GPP node in DSPNode_Connect() calls */
64 #define DSP_HGPPNODE 0xFFFFFFFF
65
66 /* Node directions used in DSPNode_Connect() */
67 #define DSP_TONODE 1
68 #define DSP_FROMNODE 2
69
70 /* Define Node Minimum and Maximum Priorities */
71 #define DSP_NODE_MIN_PRIORITY 1
72 #define DSP_NODE_MAX_PRIORITY 15
73
74 /* msg_ctrl contains SM buffer description */
75 #define DSP_RMSBUFDESC RMS_BUFDESC
76
77 /* Processor ID numbers */
78 #define DSP_UNIT 0
79 #define IVA_UNIT 1
80
81 #define DSPWORD unsigned char
82 #define DSPWORDSIZE sizeof(DSPWORD)
83
84 #define MAX_PROFILES 16
85
86 /* DSP chip type */
87 #define DSPTYPE64 0x99
88
89 /* Handy Macros */
90 #define VALID_PROC_EVENT (DSP_PROCESSORSTATECHANGE | DSP_PROCESSORATTACH | \
91 DSP_PROCESSORDETACH | DSP_PROCESSORRESTART | DSP_NODESTATECHANGE | \
92 DSP_STREAMDONE | DSP_STREAMIOCOMPLETION | DSP_MMUFAULT | \
93 DSP_SYSERROR | DSP_WDTOVERFLOW | DSP_PWRERROR)
94
is_valid_proc_event(u32 x)95 static inline bool is_valid_proc_event(u32 x)
96 {
97 return (x == 0 || (x & VALID_PROC_EVENT && !(x & ~VALID_PROC_EVENT)));
98 }
99
100 /* The Node UUID structure */
101 struct dsp_uuid {
102 u32 data1;
103 u16 data2;
104 u16 data3;
105 u8 data4;
106 u8 data5;
107 u8 data6[6];
108 };
109
110 /* DCD types */
111 enum dsp_dcdobjtype {
112 DSP_DCDNODETYPE,
113 DSP_DCDPROCESSORTYPE,
114 DSP_DCDLIBRARYTYPE,
115 DSP_DCDCREATELIBTYPE,
116 DSP_DCDEXECUTELIBTYPE,
117 DSP_DCDDELETELIBTYPE,
118 /* DSP_DCDMAXOBJTYPE is meant to be the last DCD object type */
119 DSP_DCDMAXOBJTYPE
120 };
121
122 /* Processor states */
123 enum dsp_procstate {
124 PROC_STOPPED,
125 PROC_LOADED,
126 PROC_RUNNING,
127 PROC_ERROR
128 };
129
130 /*
131 * Node types: Message node, task node, xDAIS socket node, and
132 * device node. _NODE_GPP is used when defining a stream connection
133 * between a task or socket node and the GPP.
134 *
135 */
136 enum node_type {
137 NODE_DEVICE,
138 NODE_TASK,
139 NODE_DAISSOCKET,
140 NODE_MESSAGE,
141 NODE_GPP
142 };
143
144 /*
145 * ======== node_state ========
146 * Internal node states.
147 */
148 enum node_state {
149 NODE_ALLOCATED,
150 NODE_CREATED,
151 NODE_RUNNING,
152 NODE_PAUSED,
153 NODE_DONE,
154 NODE_CREATING,
155 NODE_STARTING,
156 NODE_PAUSING,
157 NODE_TERMINATING,
158 NODE_DELETING,
159 };
160
161 /* Stream states */
162 enum dsp_streamstate {
163 STREAM_IDLE,
164 STREAM_READY,
165 STREAM_PENDING,
166 STREAM_DONE
167 };
168
169 /* Stream connect types */
170 enum dsp_connecttype {
171 CONNECTTYPE_NODEOUTPUT,
172 CONNECTTYPE_GPPOUTPUT,
173 CONNECTTYPE_NODEINPUT,
174 CONNECTTYPE_GPPINPUT
175 };
176
177 /* Stream mode types */
178 enum dsp_strmmode {
179 STRMMODE_PROCCOPY, /* Processor(s) copy stream data payloads */
180 STRMMODE_ZEROCOPY, /* Strm buffer ptrs swapped no data copied */
181 STRMMODE_LDMA, /* Local DMA : OMAP's System-DMA device */
182 STRMMODE_RDMA /* Remote DMA: OMAP's DSP-DMA device */
183 };
184
185 /* Resource Types */
186 enum dsp_resourceinfotype {
187 DSP_RESOURCE_DYNDARAM = 0,
188 DSP_RESOURCE_DYNSARAM,
189 DSP_RESOURCE_DYNEXTERNAL,
190 DSP_RESOURCE_DYNSRAM,
191 DSP_RESOURCE_PROCLOAD
192 };
193
194 /* Memory Segment Types */
195 enum dsp_memtype {
196 DSP_DYNDARAM = 0,
197 DSP_DYNSARAM,
198 DSP_DYNEXTERNAL,
199 DSP_DYNSRAM
200 };
201
202 /* Memory Flush Types */
203 enum dsp_flushtype {
204 PROC_INVALIDATE_MEM = 0,
205 PROC_WRITEBACK_MEM,
206 PROC_WRITEBACK_INVALIDATE_MEM,
207 };
208
209 /* Memory Segment Status Values */
210 struct dsp_memstat {
211 u32 size;
212 u32 total_free_size;
213 u32 len_max_free_block;
214 u32 num_free_blocks;
215 u32 num_alloc_blocks;
216 };
217
218 /* Processor Load information Values */
219 struct dsp_procloadstat {
220 u32 curr_load;
221 u32 predicted_load;
222 u32 curr_dsp_freq;
223 u32 predicted_freq;
224 };
225
226 /* Attributes for STRM connections between nodes */
227 struct dsp_strmattr {
228 u32 seg_id; /* Memory segment on DSP to allocate buffers */
229 u32 buf_size; /* Buffer size (DSP words) */
230 u32 num_bufs; /* Number of buffers */
231 u32 buf_alignment; /* Buffer alignment */
232 u32 timeout; /* Timeout for blocking STRM calls */
233 enum dsp_strmmode strm_mode; /* mode of stream when opened */
234 /* DMA chnl id if dsp_strmmode is LDMA or RDMA */
235 u32 dma_chnl_id;
236 u32 dma_priority; /* DMA channel priority 0=lowest, >0=high */
237 };
238
239 /* The dsp_cbdata structure */
240 struct dsp_cbdata {
241 u32 cb_data;
242 u8 node_data[1];
243 };
244
245 /* The dsp_msg structure */
246 struct dsp_msg {
247 u32 cmd;
248 u32 arg1;
249 u32 arg2;
250 };
251
252 /* The dsp_resourcereqmts structure for node's resource requirements */
253 struct dsp_resourcereqmts {
254 u32 cb_struct;
255 u32 static_data_size;
256 u32 global_data_size;
257 u32 program_mem_size;
258 u32 wc_execution_time;
259 u32 wc_period;
260 u32 wc_deadline;
261 u32 avg_exection_time;
262 u32 minimum_period;
263 };
264
265 /*
266 * The dsp_streamconnect structure describes a stream connection
267 * between two nodes, or between a node and the GPP
268 */
269 struct dsp_streamconnect {
270 u32 cb_struct;
271 enum dsp_connecttype connect_type;
272 u32 this_node_stream_index;
273 void *connected_node;
274 struct dsp_uuid ui_connected_node_id;
275 u32 connected_node_stream_index;
276 };
277
278 struct dsp_nodeprofs {
279 u32 heap_size;
280 };
281
282 /* The dsp_ndbprops structure reports the attributes of a node */
283 struct dsp_ndbprops {
284 u32 cb_struct;
285 struct dsp_uuid ui_node_id;
286 char ac_name[DSP_MAXNAMELEN];
287 enum node_type ntype;
288 u32 cache_on_gpp;
289 struct dsp_resourcereqmts dsp_resource_reqmts;
290 s32 prio;
291 u32 stack_size;
292 u32 sys_stack_size;
293 u32 stack_seg;
294 u32 message_depth;
295 u32 num_input_streams;
296 u32 num_output_streams;
297 u32 timeout;
298 u32 count_profiles; /* Number of supported profiles */
299 /* Array of profiles */
300 struct dsp_nodeprofs node_profiles[MAX_PROFILES];
301 u32 stack_seg_name; /* Stack Segment Name */
302 };
303
304 /* The dsp_nodeattrin structure describes the attributes of a
305 * node client */
306 struct dsp_nodeattrin {
307 u32 cb_struct;
308 s32 prio;
309 u32 timeout;
310 u32 profile_id;
311 /* Reserved, for Bridge Internal use only */
312 u32 heap_size;
313 void *pgpp_virt_addr; /* Reserved, for Bridge Internal use only */
314 };
315
316 /* The dsp_nodeinfo structure is used to retrieve information
317 * about a node */
318 struct dsp_nodeinfo {
319 u32 cb_struct;
320 struct dsp_ndbprops nb_node_database_props;
321 u32 execution_priority;
322 enum node_state ns_execution_state;
323 void *device_owner;
324 u32 number_streams;
325 struct dsp_streamconnect sc_stream_connection[16];
326 u32 node_env;
327 };
328
329 /* The dsp_nodeattr structure describes the attributes of a node */
330 struct dsp_nodeattr {
331 u32 cb_struct;
332 struct dsp_nodeattrin in_node_attr_in;
333 u32 node_attr_inputs;
334 u32 node_attr_outputs;
335 struct dsp_nodeinfo node_info;
336 };
337
338 /*
339 * Notification type: either the name of an opened event, or an event or
340 * window handle.
341 */
342 struct dsp_notification {
343 char *name;
344 void *handle;
345 };
346
347 /* The dsp_processorattrin structure describes the attributes of a processor */
348 struct dsp_processorattrin {
349 u32 cb_struct;
350 u32 timeout;
351 };
352 /*
353 * The dsp_processorinfo structure describes basic capabilities of a
354 * DSP processor
355 */
356 struct dsp_processorinfo {
357 u32 cb_struct;
358 int processor_family;
359 int processor_type;
360 u32 clock_rate;
361 u32 internal_mem_size;
362 u32 external_mem_size;
363 u32 processor_id;
364 int ty_running_rtos;
365 s32 node_min_priority;
366 s32 node_max_priority;
367 };
368
369 /* Error information of last DSP exception signalled to the GPP */
370 struct dsp_errorinfo {
371 u32 err_mask;
372 u32 val1;
373 u32 val2;
374 u32 val3;
375 };
376
377 /* The dsp_processorstate structure describes the state of a DSP processor */
378 struct dsp_processorstate {
379 u32 cb_struct;
380 enum dsp_procstate proc_state;
381 };
382
383 /*
384 * The dsp_resourceinfo structure is used to retrieve information about a
385 * processor's resources
386 */
387 struct dsp_resourceinfo {
388 u32 cb_struct;
389 enum dsp_resourceinfotype resource_type;
390 union {
391 u32 resource;
392 struct dsp_memstat mem_stat;
393 struct dsp_procloadstat proc_load_stat;
394 } result;
395 };
396
397 /*
398 * The dsp_streamattrin structure describes the attributes of a stream,
399 * including segment and alignment of data buffers allocated with
400 * DSPStream_AllocateBuffers(), if applicable
401 */
402 struct dsp_streamattrin {
403 u32 cb_struct;
404 u32 timeout;
405 u32 segment_id;
406 u32 buf_alignment;
407 u32 num_bufs;
408 enum dsp_strmmode strm_mode;
409 u32 dma_chnl_id;
410 u32 dma_priority;
411 };
412
413 /* The dsp_bufferattr structure describes the attributes of a data buffer */
414 struct dsp_bufferattr {
415 u32 cb_struct;
416 u32 segment_id;
417 u32 buf_alignment;
418 };
419
420 /*
421 * The dsp_streaminfo structure is used to retrieve information
422 * about a stream.
423 */
424 struct dsp_streaminfo {
425 u32 cb_struct;
426 u32 number_bufs_allowed;
427 u32 number_bufs_in_stream;
428 u32 number_bytes;
429 void *sync_object_handle;
430 enum dsp_streamstate ss_stream_state;
431 };
432
433 /* DMM MAP attributes
434 It is a bit mask with each bit value indicating a specific attribute
435 bit 0 - GPP address type (user virtual=0, physical=1)
436 bit 1 - MMU Endianism (Big Endian=1, Little Endian=0)
437 bit 2 - MMU mixed page attribute (Mixed/ CPUES=1, TLBES =0)
438 bit 3 - MMU element size = 8bit (valid only for non mixed page entries)
439 bit 4 - MMU element size = 16bit (valid only for non mixed page entries)
440 bit 5 - MMU element size = 32bit (valid only for non mixed page entries)
441 bit 6 - MMU element size = 64bit (valid only for non mixed page entries)
442
443 bit 14 - Input (read only) buffer
444 bit 15 - Output (writeable) buffer
445 */
446
447 /* Types of mapping attributes */
448
449 /* MPU address is virtual and needs to be translated to physical addr */
450 #define DSP_MAPVIRTUALADDR 0x00000000
451 #define DSP_MAPPHYSICALADDR 0x00000001
452
453 /* Mapped data is big endian */
454 #define DSP_MAPBIGENDIAN 0x00000002
455 #define DSP_MAPLITTLEENDIAN 0x00000000
456
457 /* Element size is based on DSP r/w access size */
458 #define DSP_MAPMIXEDELEMSIZE 0x00000004
459
460 /*
461 * Element size for MMU mapping (8, 16, 32, or 64 bit)
462 * Ignored if DSP_MAPMIXEDELEMSIZE enabled
463 */
464 #define DSP_MAPELEMSIZE8 0x00000008
465 #define DSP_MAPELEMSIZE16 0x00000010
466 #define DSP_MAPELEMSIZE32 0x00000020
467 #define DSP_MAPELEMSIZE64 0x00000040
468
469 #define DSP_MAPVMALLOCADDR 0x00000080
470
471 #define DSP_MAPDONOTLOCK 0x00000100
472
473 #define DSP_MAP_DIR_MASK 0x3FFF
474
475 #define GEM_CACHE_LINE_SIZE 128
476 #define GEM_L1P_PREFETCH_SIZE 128
477
478 /*
479 * Definitions from dbreg.h
480 */
481
482 #define DSPPROCTYPE_C64 6410
483 #define IVAPROCTYPE_ARM7 470
484
485 /* Max registry path length. Also the max registry value length. */
486 #define MAXREGPATHLENGTH 255
487
488 #endif /* DBDEFS_ */
489