1 /* 2 * 1-Wire implementation for the ds2780 chip 3 * 4 * Copyright (C) 2010 Indesign, LLC 5 * 6 * Author: Clifton Barnes <cabarnes@indesign-llc.com> 7 * 8 * Based on w1-ds2760 driver 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License version 2 as 12 * published by the Free Software Foundation. 13 * 14 */ 15 16 #ifndef _W1_DS2780_H 17 #define _W1_DS2780_H 18 19 /* Function commands */ 20 #define W1_DS2780_READ_DATA 0x69 21 #define W1_DS2780_WRITE_DATA 0x6C 22 #define W1_DS2780_COPY_DATA 0x48 23 #define W1_DS2780_RECALL_DATA 0xB8 24 #define W1_DS2780_LOCK 0x6A 25 26 /* Register map */ 27 /* Register 0x00 Reserved */ 28 #define DS2780_STATUS_REG 0x01 29 #define DS2780_RAAC_MSB_REG 0x02 30 #define DS2780_RAAC_LSB_REG 0x03 31 #define DS2780_RSAC_MSB_REG 0x04 32 #define DS2780_RSAC_LSB_REG 0x05 33 #define DS2780_RARC_REG 0x06 34 #define DS2780_RSRC_REG 0x07 35 #define DS2780_IAVG_MSB_REG 0x08 36 #define DS2780_IAVG_LSB_REG 0x09 37 #define DS2780_TEMP_MSB_REG 0x0A 38 #define DS2780_TEMP_LSB_REG 0x0B 39 #define DS2780_VOLT_MSB_REG 0x0C 40 #define DS2780_VOLT_LSB_REG 0x0D 41 #define DS2780_CURRENT_MSB_REG 0x0E 42 #define DS2780_CURRENT_LSB_REG 0x0F 43 #define DS2780_ACR_MSB_REG 0x10 44 #define DS2780_ACR_LSB_REG 0x11 45 #define DS2780_ACRL_MSB_REG 0x12 46 #define DS2780_ACRL_LSB_REG 0x13 47 #define DS2780_AS_REG 0x14 48 #define DS2780_SFR_REG 0x15 49 #define DS2780_FULL_MSB_REG 0x16 50 #define DS2780_FULL_LSB_REG 0x17 51 #define DS2780_AE_MSB_REG 0x18 52 #define DS2780_AE_LSB_REG 0x19 53 #define DS2780_SE_MSB_REG 0x1A 54 #define DS2780_SE_LSB_REG 0x1B 55 /* Register 0x1C - 0x1E Reserved */ 56 #define DS2780_EEPROM_REG 0x1F 57 #define DS2780_EEPROM_BLOCK0_START 0x20 58 /* Register 0x20 - 0x2F User EEPROM */ 59 #define DS2780_EEPROM_BLOCK0_END 0x2F 60 /* Register 0x30 - 0x5F Reserved */ 61 #define DS2780_EEPROM_BLOCK1_START 0x60 62 #define DS2780_CONTROL_REG 0x60 63 #define DS2780_AB_REG 0x61 64 #define DS2780_AC_MSB_REG 0x62 65 #define DS2780_AC_LSB_REG 0x63 66 #define DS2780_VCHG_REG 0x64 67 #define DS2780_IMIN_REG 0x65 68 #define DS2780_VAE_REG 0x66 69 #define DS2780_IAE_REG 0x67 70 #define DS2780_AE_40_REG 0x68 71 #define DS2780_RSNSP_REG 0x69 72 #define DS2780_FULL_40_MSB_REG 0x6A 73 #define DS2780_FULL_40_LSB_REG 0x6B 74 #define DS2780_FULL_3040_SLOPE_REG 0x6C 75 #define DS2780_FULL_2030_SLOPE_REG 0x6D 76 #define DS2780_FULL_1020_SLOPE_REG 0x6E 77 #define DS2780_FULL_0010_SLOPE_REG 0x6F 78 #define DS2780_AE_3040_SLOPE_REG 0x70 79 #define DS2780_AE_2030_SLOPE_REG 0x71 80 #define DS2780_AE_1020_SLOPE_REG 0x72 81 #define DS2780_AE_0010_SLOPE_REG 0x73 82 #define DS2780_SE_3040_SLOPE_REG 0x74 83 #define DS2780_SE_2030_SLOPE_REG 0x75 84 #define DS2780_SE_1020_SLOPE_REG 0x76 85 #define DS2780_SE_0010_SLOPE_REG 0x77 86 #define DS2780_RSGAIN_MSB_REG 0x78 87 #define DS2780_RSGAIN_LSB_REG 0x79 88 #define DS2780_RSTC_REG 0x7A 89 #define DS2780_FRSGAIN_MSB_REG 0x7B 90 #define DS2780_FRSGAIN_LSB_REG 0x7C 91 #define DS2780_EEPROM_BLOCK1_END 0x7C 92 /* Register 0x7D - 0xFF Reserved */ 93 94 /* Number of valid register addresses */ 95 #define DS2780_DATA_SIZE 0x80 96 97 /* Status register bits */ 98 #define DS2780_STATUS_REG_CHGTF (1 << 7) 99 #define DS2780_STATUS_REG_AEF (1 << 6) 100 #define DS2780_STATUS_REG_SEF (1 << 5) 101 #define DS2780_STATUS_REG_LEARNF (1 << 4) 102 /* Bit 3 Reserved */ 103 #define DS2780_STATUS_REG_UVF (1 << 2) 104 #define DS2780_STATUS_REG_PORF (1 << 1) 105 /* Bit 0 Reserved */ 106 107 /* Control register bits */ 108 /* Bit 7 Reserved */ 109 #define DS2780_CONTROL_REG_UVEN (1 << 6) 110 #define DS2780_CONTROL_REG_PMOD (1 << 5) 111 #define DS2780_CONTROL_REG_RNAOP (1 << 4) 112 /* Bit 0 - 3 Reserved */ 113 114 /* Special feature register bits */ 115 /* Bit 1 - 7 Reserved */ 116 #define DS2780_SFR_REG_PIOSC (1 << 0) 117 118 /* EEPROM register bits */ 119 #define DS2780_EEPROM_REG_EEC (1 << 7) 120 #define DS2780_EEPROM_REG_LOCK (1 << 6) 121 /* Bit 2 - 6 Reserved */ 122 #define DS2780_EEPROM_REG_BL1 (1 << 1) 123 #define DS2780_EEPROM_REG_BL0 (1 << 0) 124 125 extern int w1_ds2780_io(struct device *dev, char *buf, int addr, size_t count, 126 int io); 127 extern int w1_ds2780_io_nolock(struct device *dev, char *buf, int addr, 128 size_t count, int io); 129 extern int w1_ds2780_eeprom_cmd(struct device *dev, int addr, int cmd); 130 131 #endif /* !_W1_DS2780_H */ 132