1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2 /*
3  * Framework for buffer objects that can be shared across devices/subsystems.
4  *
5  * Copyright(C) 2015 Intel Ltd
6  *
7  * This program is free software; you can redistribute it and/or modify it
8  * under the terms of the GNU General Public License version 2 as published by
9  * the Free Software Foundation.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along with
17  * this program.  If not, see <http://www.gnu.org/licenses/>.
18  */
19 
20 #ifndef _DMA_BUF_UAPI_H_
21 #define _DMA_BUF_UAPI_H_
22 
23 #include <linux/types.h>
24 
25 /**
26  * struct dma_buf_sync - Synchronize with CPU access.
27  *
28  * When a DMA buffer is accessed from the CPU via mmap, it is not always
29  * possible to guarantee coherency between the CPU-visible map and underlying
30  * memory.  To manage coherency, DMA_BUF_IOCTL_SYNC must be used to bracket
31  * any CPU access to give the kernel the chance to shuffle memory around if
32  * needed.
33  *
34  * Prior to accessing the map, the client must call DMA_BUF_IOCTL_SYNC
35  * with DMA_BUF_SYNC_START and the appropriate read/write flags.  Once the
36  * access is complete, the client should call DMA_BUF_IOCTL_SYNC with
37  * DMA_BUF_SYNC_END and the same read/write flags.
38  *
39  * The synchronization provided via DMA_BUF_IOCTL_SYNC only provides cache
40  * coherency.  It does not prevent other processes or devices from
41  * accessing the memory at the same time.  If synchronization with a GPU or
42  * other device driver is required, it is the client's responsibility to
43  * wait for buffer to be ready for reading or writing before calling this
44  * ioctl with DMA_BUF_SYNC_START.  Likewise, the client must ensure that
45  * follow-up work is not submitted to GPU or other device driver until
46  * after this ioctl has been called with DMA_BUF_SYNC_END?
47  *
48  * If the driver or API with which the client is interacting uses implicit
49  * synchronization, waiting for prior work to complete can be done via
50  * poll() on the DMA buffer file descriptor.  If the driver or API requires
51  * explicit synchronization, the client may have to wait on a sync_file or
52  * other synchronization primitive outside the scope of the DMA buffer API.
53  */
54 struct dma_buf_sync {
55 	/**
56 	 * @flags: Set of access flags
57 	 *
58 	 * DMA_BUF_SYNC_START:
59 	 *     Indicates the start of a map access session.
60 	 *
61 	 * DMA_BUF_SYNC_END:
62 	 *     Indicates the end of a map access session.
63 	 *
64 	 * DMA_BUF_SYNC_READ:
65 	 *     Indicates that the mapped DMA buffer will be read by the
66 	 *     client via the CPU map.
67 	 *
68 	 * DMA_BUF_SYNC_WRITE:
69 	 *     Indicates that the mapped DMA buffer will be written by the
70 	 *     client via the CPU map.
71 	 *
72 	 * DMA_BUF_SYNC_RW:
73 	 *     An alias for DMA_BUF_SYNC_READ | DMA_BUF_SYNC_WRITE.
74 	 */
75 	__u64 flags;
76 };
77 
78 #define DMA_BUF_SYNC_READ      (1 << 0)
79 #define DMA_BUF_SYNC_WRITE     (2 << 0)
80 #define DMA_BUF_SYNC_RW        (DMA_BUF_SYNC_READ | DMA_BUF_SYNC_WRITE)
81 #define DMA_BUF_SYNC_START     (0 << 2)
82 #define DMA_BUF_SYNC_END       (1 << 2)
83 #define DMA_BUF_SYNC_VALID_FLAGS_MASK \
84 	(DMA_BUF_SYNC_RW | DMA_BUF_SYNC_END)
85 
86 #define DMA_BUF_NAME_LEN	32
87 
88 #define DMA_BUF_BASE		'b'
89 #define DMA_BUF_IOCTL_SYNC	_IOW(DMA_BUF_BASE, 0, struct dma_buf_sync)
90 
91 /* 32/64bitness of this uapi was botched in android, there's no difference
92  * between them in actual uapi, they're just different numbers.
93  */
94 #define DMA_BUF_SET_NAME	_IOW(DMA_BUF_BASE, 1, const char *)
95 #define DMA_BUF_SET_NAME_A	_IOW(DMA_BUF_BASE, 1, __u32)
96 #define DMA_BUF_SET_NAME_B	_IOW(DMA_BUF_BASE, 1, __u64)
97 
98 #endif
99