1 /* 2 * Renesas SuperH DMA Engine support 3 * 4 * Copyright (C) 2009 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> 5 * Copyright (C) 2009 Renesas Solutions, Inc. All rights reserved. 6 * 7 * This is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 */ 13 #ifndef __DMA_SHDMA_H 14 #define __DMA_SHDMA_H 15 16 #include <linux/dmaengine.h> 17 #include <linux/interrupt.h> 18 #include <linux/list.h> 19 20 #define SH_DMAC_MAX_CHANNELS 20 21 #define SH_DMA_SLAVE_NUMBER 256 22 #define SH_DMA_TCR_MAX 0x00FFFFFF /* 16MB */ 23 24 struct device; 25 26 enum dmae_pm_state { 27 DMAE_PM_ESTABLISHED, 28 DMAE_PM_BUSY, 29 DMAE_PM_PENDING, 30 }; 31 32 struct sh_dmae_chan { 33 spinlock_t desc_lock; /* Descriptor operation lock */ 34 struct list_head ld_queue; /* Link descriptors queue */ 35 struct list_head ld_free; /* Link descriptors free */ 36 struct dma_chan common; /* DMA common channel */ 37 struct device *dev; /* Channel device */ 38 struct tasklet_struct tasklet; /* Tasklet */ 39 int descs_allocated; /* desc count */ 40 int xmit_shift; /* log_2(bytes_per_xfer) */ 41 int irq; 42 int id; /* Raw id of this channel */ 43 u32 __iomem *base; 44 char dev_id[16]; /* unique name per DMAC of channel */ 45 int pm_error; 46 enum dmae_pm_state pm_state; 47 }; 48 49 struct sh_dmae_device { 50 struct dma_device common; 51 struct sh_dmae_chan *chan[SH_DMAC_MAX_CHANNELS]; 52 struct sh_dmae_pdata *pdata; 53 struct list_head node; 54 u32 __iomem *chan_reg; 55 u16 __iomem *dmars; 56 unsigned int chcr_offset; 57 u32 chcr_ie_bit; 58 }; 59 60 #define to_sh_chan(chan) container_of(chan, struct sh_dmae_chan, common) 61 #define to_sh_desc(lh) container_of(lh, struct sh_desc, node) 62 #define tx_to_sh_desc(tx) container_of(tx, struct sh_desc, async_tx) 63 #define to_sh_dev(chan) container_of(chan->common.device,\ 64 struct sh_dmae_device, common) 65 66 #endif /* __DMA_SHDMA_H */ 67