1 /* 2 * Copyright 2020 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef __DAL_DCN30_AFMT_H__ 27 #define __DAL_DCN30_AFMT_H__ 28 29 30 #define DCN30_AFMT_FROM_AFMT(afmt)\ 31 container_of(afmt, struct dcn30_afmt, base) 32 33 #define AFMT_DCN3_REG_LIST(id) \ 34 SRI(AFMT_INFOFRAME_CONTROL0, AFMT, id), \ 35 SRI(AFMT_VBI_PACKET_CONTROL, AFMT, id), \ 36 SRI(AFMT_AUDIO_PACKET_CONTROL, AFMT, id), \ 37 SRI(AFMT_AUDIO_PACKET_CONTROL2, AFMT, id), \ 38 SRI(AFMT_AUDIO_SRC_CONTROL, AFMT, id), \ 39 SRI(AFMT_60958_0, AFMT, id), \ 40 SRI(AFMT_60958_1, AFMT, id), \ 41 SRI(AFMT_60958_2, AFMT, id), \ 42 SRI(AFMT_MEM_PWR, AFMT, id) 43 44 struct dcn30_afmt_registers { 45 uint32_t AFMT_INFOFRAME_CONTROL0; 46 uint32_t AFMT_VBI_PACKET_CONTROL; 47 uint32_t AFMT_AUDIO_PACKET_CONTROL; 48 uint32_t AFMT_AUDIO_PACKET_CONTROL2; 49 uint32_t AFMT_AUDIO_SRC_CONTROL; 50 uint32_t AFMT_60958_0; 51 uint32_t AFMT_60958_1; 52 uint32_t AFMT_60958_2; 53 uint32_t AFMT_MEM_PWR; 54 }; 55 56 #define DCN3_AFMT_MASK_SH_LIST(mask_sh)\ 57 SE_SF(AFMT0_AFMT_INFOFRAME_CONTROL0, AFMT_AUDIO_INFO_UPDATE, mask_sh),\ 58 SE_SF(AFMT0_AFMT_AUDIO_SRC_CONTROL, AFMT_AUDIO_SRC_SELECT, mask_sh),\ 59 SE_SF(AFMT0_AFMT_AUDIO_PACKET_CONTROL2, AFMT_AUDIO_CHANNEL_ENABLE, mask_sh),\ 60 SE_SF(AFMT0_AFMT_AUDIO_PACKET_CONTROL, AFMT_60958_CS_UPDATE, mask_sh),\ 61 SE_SF(AFMT0_AFMT_AUDIO_PACKET_CONTROL2, AFMT_AUDIO_LAYOUT_OVRD, mask_sh),\ 62 SE_SF(AFMT0_AFMT_AUDIO_PACKET_CONTROL2, AFMT_60958_OSF_OVRD, mask_sh),\ 63 SE_SF(AFMT0_AFMT_60958_0, AFMT_60958_CS_CHANNEL_NUMBER_L, mask_sh),\ 64 SE_SF(AFMT0_AFMT_60958_0, AFMT_60958_CS_CLOCK_ACCURACY, mask_sh),\ 65 SE_SF(AFMT0_AFMT_60958_1, AFMT_60958_CS_CHANNEL_NUMBER_R, mask_sh),\ 66 SE_SF(AFMT0_AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_2, mask_sh),\ 67 SE_SF(AFMT0_AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_3, mask_sh),\ 68 SE_SF(AFMT0_AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_4, mask_sh),\ 69 SE_SF(AFMT0_AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_5, mask_sh),\ 70 SE_SF(AFMT0_AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_6, mask_sh),\ 71 SE_SF(AFMT0_AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_7, mask_sh),\ 72 SE_SF(AFMT0_AFMT_AUDIO_PACKET_CONTROL, AFMT_AUDIO_SAMPLE_SEND, mask_sh),\ 73 SE_SF(AFMT0_AFMT_MEM_PWR, AFMT_MEM_PWR_FORCE, mask_sh) 74 75 #define AFMT_DCN3_REG_FIELD_LIST(type) \ 76 type AFMT_AUDIO_INFO_UPDATE;\ 77 type AFMT_AUDIO_SRC_SELECT;\ 78 type AFMT_AUDIO_CHANNEL_ENABLE;\ 79 type AFMT_60958_CS_UPDATE;\ 80 type AFMT_AUDIO_LAYOUT_OVRD;\ 81 type AFMT_60958_OSF_OVRD;\ 82 type AFMT_60958_CS_CHANNEL_NUMBER_L;\ 83 type AFMT_60958_CS_CLOCK_ACCURACY;\ 84 type AFMT_60958_CS_CHANNEL_NUMBER_R;\ 85 type AFMT_60958_CS_CHANNEL_NUMBER_2;\ 86 type AFMT_60958_CS_CHANNEL_NUMBER_3;\ 87 type AFMT_60958_CS_CHANNEL_NUMBER_4;\ 88 type AFMT_60958_CS_CHANNEL_NUMBER_5;\ 89 type AFMT_60958_CS_CHANNEL_NUMBER_6;\ 90 type AFMT_60958_CS_CHANNEL_NUMBER_7;\ 91 type AFMT_AUDIO_SAMPLE_SEND;\ 92 type AFMT_MEM_PWR_FORCE 93 94 struct dcn30_afmt_shift { 95 AFMT_DCN3_REG_FIELD_LIST(uint8_t); 96 }; 97 98 struct dcn30_afmt_mask { 99 AFMT_DCN3_REG_FIELD_LIST(uint32_t); 100 }; 101 102 103 struct afmt; 104 105 struct afmt_funcs { 106 107 void (*setup_hdmi_audio)( 108 struct afmt *afmt); 109 110 void (*se_audio_setup)( 111 struct afmt *afmt, 112 unsigned int az_inst, 113 struct audio_info *audio_info); 114 115 void (*audio_mute_control)( 116 struct afmt *afmt, 117 bool mute); 118 119 void (*audio_info_immediate_update)( 120 struct afmt *afmt); 121 122 void (*setup_dp_audio)( 123 struct afmt *afmt); 124 125 void (*afmt_poweron)( 126 struct afmt *afmt); 127 128 void (*afmt_powerdown)( 129 struct afmt *afmt); 130 }; 131 132 struct afmt { 133 const struct afmt_funcs *funcs; 134 struct dc_context *ctx; 135 int inst; 136 }; 137 138 struct dcn30_afmt { 139 struct afmt base; 140 const struct dcn30_afmt_registers *regs; 141 const struct dcn30_afmt_shift *afmt_shift; 142 const struct dcn30_afmt_mask *afmt_mask; 143 }; 144 145 void afmt3_setup_hdmi_audio( 146 struct afmt *afmt); 147 148 void afmt3_se_audio_setup( 149 struct afmt *afmt, 150 unsigned int az_inst, 151 struct audio_info *audio_info); 152 153 void afmt3_audio_mute_control( 154 struct afmt *afmt, 155 bool mute); 156 157 void afmt3_audio_info_immediate_update( 158 struct afmt *afmt); 159 160 void afmt3_setup_dp_audio( 161 struct afmt *afmt); 162 163 void afmt3_construct(struct dcn30_afmt *afmt3, 164 struct dc_context *ctx, 165 uint32_t inst, 166 const struct dcn30_afmt_registers *afmt_regs, 167 const struct dcn30_afmt_shift *afmt_shift, 168 const struct dcn30_afmt_mask *afmt_mask); 169 170 171 #endif 172