1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Copyright(c) 2020 Intel Corporation. */
3
4 #ifndef __CXL_CORE_H__
5 #define __CXL_CORE_H__
6
7 extern const struct device_type cxl_nvdimm_bridge_type;
8 extern const struct device_type cxl_nvdimm_type;
9 extern const struct device_type cxl_pmu_type;
10
11 extern struct attribute_group cxl_base_attribute_group;
12
13 #ifdef CONFIG_CXL_REGION
14 extern struct device_attribute dev_attr_create_pmem_region;
15 extern struct device_attribute dev_attr_create_ram_region;
16 extern struct device_attribute dev_attr_delete_region;
17 extern struct device_attribute dev_attr_region;
18 extern const struct device_type cxl_pmem_region_type;
19 extern const struct device_type cxl_dax_region_type;
20 extern const struct device_type cxl_region_type;
21 void cxl_decoder_kill_region(struct cxl_endpoint_decoder *cxled);
22 #define CXL_REGION_ATTR(x) (&dev_attr_##x.attr)
23 #define CXL_REGION_TYPE(x) (&cxl_region_type)
24 #define SET_CXL_REGION_ATTR(x) (&dev_attr_##x.attr),
25 #define CXL_PMEM_REGION_TYPE(x) (&cxl_pmem_region_type)
26 #define CXL_DAX_REGION_TYPE(x) (&cxl_dax_region_type)
27 int cxl_region_init(void);
28 void cxl_region_exit(void);
29 int cxl_get_poison_by_endpoint(struct cxl_port *port);
30 #else
cxl_get_poison_by_endpoint(struct cxl_port * port)31 static inline int cxl_get_poison_by_endpoint(struct cxl_port *port)
32 {
33 return 0;
34 }
cxl_decoder_kill_region(struct cxl_endpoint_decoder * cxled)35 static inline void cxl_decoder_kill_region(struct cxl_endpoint_decoder *cxled)
36 {
37 }
cxl_region_init(void)38 static inline int cxl_region_init(void)
39 {
40 return 0;
41 }
cxl_region_exit(void)42 static inline void cxl_region_exit(void)
43 {
44 }
45 #define CXL_REGION_ATTR(x) NULL
46 #define CXL_REGION_TYPE(x) NULL
47 #define SET_CXL_REGION_ATTR(x)
48 #define CXL_PMEM_REGION_TYPE(x) NULL
49 #define CXL_DAX_REGION_TYPE(x) NULL
50 #endif
51
52 struct cxl_send_command;
53 struct cxl_mem_query_commands;
54 int cxl_query_cmd(struct cxl_memdev *cxlmd,
55 struct cxl_mem_query_commands __user *q);
56 int cxl_send_cmd(struct cxl_memdev *cxlmd, struct cxl_send_command __user *s);
57 void __iomem *devm_cxl_iomap_block(struct device *dev, resource_size_t addr,
58 resource_size_t length);
59
60 struct dentry *cxl_debugfs_create_dir(const char *dir);
61 int cxl_dpa_set_mode(struct cxl_endpoint_decoder *cxled,
62 enum cxl_decoder_mode mode);
63 int cxl_dpa_alloc(struct cxl_endpoint_decoder *cxled, unsigned long long size);
64 int cxl_dpa_free(struct cxl_endpoint_decoder *cxled);
65 resource_size_t cxl_dpa_size(struct cxl_endpoint_decoder *cxled);
66 resource_size_t cxl_dpa_resource_start(struct cxl_endpoint_decoder *cxled);
67
68 enum cxl_rcrb {
69 CXL_RCRB_DOWNSTREAM,
70 CXL_RCRB_UPSTREAM,
71 };
72 struct cxl_rcrb_info;
73 resource_size_t __rcrb_to_component(struct device *dev,
74 struct cxl_rcrb_info *ri,
75 enum cxl_rcrb which);
76
77 extern struct rw_semaphore cxl_dpa_rwsem;
78 extern struct rw_semaphore cxl_region_rwsem;
79
80 int cxl_memdev_init(void);
81 void cxl_memdev_exit(void);
82 void cxl_mbox_init(void);
83
84 enum cxl_poison_trace_type {
85 CXL_POISON_TRACE_LIST,
86 CXL_POISON_TRACE_INJECT,
87 CXL_POISON_TRACE_CLEAR,
88 };
89
90 #endif /* __CXL_CORE_H__ */
91