1 /*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22 #include <linux/pci.h>
23 #include <linux/i2c.h>
24 #include <linux/i2c-algo-bit.h>
25 #include <linux/kdev_t.h>
26 #include <linux/slab.h>
27
28 #include <media/v4l2-device.h>
29 #include <media/tuner.h>
30 #include <media/tveeprom.h>
31 #include <media/videobuf-dma-sg.h>
32 #include <media/videobuf-dvb.h>
33 #include <media/rc-core.h>
34
35 #include "btcx-risc.h"
36 #include "cx23885-reg.h"
37 #include "media/cx2341x.h"
38
39 #include <linux/mutex.h>
40
41 #define CX23885_VERSION "0.0.3"
42
43 #define UNSET (-1U)
44
45 #define CX23885_MAXBOARDS 8
46
47 /* Max number of inputs by card */
48 #define MAX_CX23885_INPUT 8
49 #define INPUT(nr) (&cx23885_boards[dev->board].input[nr])
50 #define RESOURCE_OVERLAY 1
51 #define RESOURCE_VIDEO 2
52 #define RESOURCE_VBI 4
53
54 #define BUFFER_TIMEOUT (HZ) /* 0.5 seconds */
55
56 #define CX23885_BOARD_NOAUTO UNSET
57 #define CX23885_BOARD_UNKNOWN 0
58 #define CX23885_BOARD_HAUPPAUGE_HVR1800lp 1
59 #define CX23885_BOARD_HAUPPAUGE_HVR1800 2
60 #define CX23885_BOARD_HAUPPAUGE_HVR1250 3
61 #define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP 4
62 #define CX23885_BOARD_HAUPPAUGE_HVR1500Q 5
63 #define CX23885_BOARD_HAUPPAUGE_HVR1500 6
64 #define CX23885_BOARD_HAUPPAUGE_HVR1200 7
65 #define CX23885_BOARD_HAUPPAUGE_HVR1700 8
66 #define CX23885_BOARD_HAUPPAUGE_HVR1400 9
67 #define CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP 10
68 #define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP 11
69 #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H 12
70 #define CX23885_BOARD_COMPRO_VIDEOMATE_E650F 13
71 #define CX23885_BOARD_TBS_6920 14
72 #define CX23885_BOARD_TEVII_S470 15
73 #define CX23885_BOARD_DVBWORLD_2005 16
74 #define CX23885_BOARD_NETUP_DUAL_DVBS2_CI 17
75 #define CX23885_BOARD_HAUPPAUGE_HVR1270 18
76 #define CX23885_BOARD_HAUPPAUGE_HVR1275 19
77 #define CX23885_BOARD_HAUPPAUGE_HVR1255 20
78 #define CX23885_BOARD_HAUPPAUGE_HVR1210 21
79 #define CX23885_BOARD_MYGICA_X8506 22
80 #define CX23885_BOARD_MAGICPRO_PROHDTVE2 23
81 #define CX23885_BOARD_HAUPPAUGE_HVR1850 24
82 #define CX23885_BOARD_COMPRO_VIDEOMATE_E800 25
83 #define CX23885_BOARD_HAUPPAUGE_HVR1290 26
84 #define CX23885_BOARD_MYGICA_X8558PRO 27
85 #define CX23885_BOARD_LEADTEK_WINFAST_PXTV1200 28
86 #define CX23885_BOARD_GOTVIEW_X5_3D_HYBRID 29
87 #define CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF 30
88 #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000 31
89 #define CX23885_BOARD_MPX885 32
90 #define CX23885_BOARD_MYGICA_X8507 33
91 #define CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL 34
92
93 #define GPIO_0 0x00000001
94 #define GPIO_1 0x00000002
95 #define GPIO_2 0x00000004
96 #define GPIO_3 0x00000008
97 #define GPIO_4 0x00000010
98 #define GPIO_5 0x00000020
99 #define GPIO_6 0x00000040
100 #define GPIO_7 0x00000080
101 #define GPIO_8 0x00000100
102 #define GPIO_9 0x00000200
103 #define GPIO_10 0x00000400
104 #define GPIO_11 0x00000800
105 #define GPIO_12 0x00001000
106 #define GPIO_13 0x00002000
107 #define GPIO_14 0x00004000
108 #define GPIO_15 0x00008000
109
110 /* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */
111 #define CX23885_NORMS (\
112 V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_443 | \
113 V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \
114 V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \
115 V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK)
116
117 struct cx23885_fmt {
118 char *name;
119 u32 fourcc; /* v4l2 format id */
120 int depth;
121 int flags;
122 u32 cxformat;
123 };
124
125 struct cx23885_ctrl {
126 struct v4l2_queryctrl v;
127 u32 off;
128 u32 reg;
129 u32 mask;
130 u32 shift;
131 };
132
133 struct cx23885_tvnorm {
134 char *name;
135 v4l2_std_id id;
136 u32 cxiformat;
137 u32 cxoformat;
138 };
139
140 struct cx23885_fh {
141 struct cx23885_dev *dev;
142 enum v4l2_buf_type type;
143 int radio;
144 u32 resources;
145
146 /* video overlay */
147 struct v4l2_window win;
148 struct v4l2_clip *clips;
149 unsigned int nclips;
150
151 /* video capture */
152 struct cx23885_fmt *fmt;
153 unsigned int width, height;
154
155 /* vbi capture */
156 struct videobuf_queue vidq;
157 struct videobuf_queue vbiq;
158
159 /* MPEG Encoder specifics ONLY */
160 struct videobuf_queue mpegq;
161 atomic_t v4l_reading;
162 };
163
164 enum cx23885_itype {
165 CX23885_VMUX_COMPOSITE1 = 1,
166 CX23885_VMUX_COMPOSITE2,
167 CX23885_VMUX_COMPOSITE3,
168 CX23885_VMUX_COMPOSITE4,
169 CX23885_VMUX_SVIDEO,
170 CX23885_VMUX_COMPONENT,
171 CX23885_VMUX_TELEVISION,
172 CX23885_VMUX_CABLE,
173 CX23885_VMUX_DVB,
174 CX23885_VMUX_DEBUG,
175 CX23885_RADIO,
176 };
177
178 enum cx23885_src_sel_type {
179 CX23885_SRC_SEL_EXT_656_VIDEO = 0,
180 CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
181 };
182
183 /* buffer for one video frame */
184 struct cx23885_buffer {
185 /* common v4l buffer stuff -- must be first */
186 struct videobuf_buffer vb;
187
188 /* cx23885 specific */
189 unsigned int bpl;
190 struct btcx_riscmem risc;
191 struct cx23885_fmt *fmt;
192 u32 count;
193 };
194
195 struct cx23885_input {
196 enum cx23885_itype type;
197 unsigned int vmux;
198 unsigned int amux;
199 u32 gpio0, gpio1, gpio2, gpio3;
200 };
201
202 typedef enum {
203 CX23885_MPEG_UNDEFINED = 0,
204 CX23885_MPEG_DVB,
205 CX23885_ANALOG_VIDEO,
206 CX23885_MPEG_ENCODER,
207 } port_t;
208
209 struct cx23885_board {
210 char *name;
211 port_t porta, portb, portc;
212 int num_fds_portb, num_fds_portc;
213 unsigned int tuner_type;
214 unsigned int radio_type;
215 unsigned char tuner_addr;
216 unsigned char radio_addr;
217 unsigned int tuner_bus;
218
219 /* Vendors can and do run the PCIe bridge at different
220 * clock rates, driven physically by crystals on the PCBs.
221 * The core has to accommodate this. This allows the user
222 * to add new boards with new frequencys. The value is
223 * expressed in Hz.
224 *
225 * The core framework will default this value based on
226 * current designs, but it can vary.
227 */
228 u32 clk_freq;
229 struct cx23885_input input[MAX_CX23885_INPUT];
230 int ci_type; /* for NetUP */
231 /* Force bottom field first during DMA (888 workaround) */
232 u32 force_bff;
233 };
234
235 struct cx23885_subid {
236 u16 subvendor;
237 u16 subdevice;
238 u32 card;
239 };
240
241 struct cx23885_i2c {
242 struct cx23885_dev *dev;
243
244 int nr;
245
246 /* i2c i/o */
247 struct i2c_adapter i2c_adap;
248 struct i2c_algo_bit_data i2c_algo;
249 struct i2c_client i2c_client;
250 u32 i2c_rc;
251
252 /* 885 registers used for raw addess */
253 u32 i2c_period;
254 u32 reg_ctrl;
255 u32 reg_stat;
256 u32 reg_addr;
257 u32 reg_rdata;
258 u32 reg_wdata;
259 };
260
261 struct cx23885_dmaqueue {
262 struct list_head active;
263 struct list_head queued;
264 struct timer_list timeout;
265 struct btcx_riscmem stopper;
266 u32 count;
267 };
268
269 struct cx23885_tsport {
270 struct cx23885_dev *dev;
271
272 int nr;
273 int sram_chno;
274
275 struct videobuf_dvb_frontends frontends;
276
277 /* dma queues */
278 struct cx23885_dmaqueue mpegq;
279 u32 ts_packet_size;
280 u32 ts_packet_count;
281
282 int width;
283 int height;
284
285 spinlock_t slock;
286
287 /* registers */
288 u32 reg_gpcnt;
289 u32 reg_gpcnt_ctl;
290 u32 reg_dma_ctl;
291 u32 reg_lngth;
292 u32 reg_hw_sop_ctrl;
293 u32 reg_gen_ctrl;
294 u32 reg_bd_pkt_status;
295 u32 reg_sop_status;
296 u32 reg_fifo_ovfl_stat;
297 u32 reg_vld_misc;
298 u32 reg_ts_clk_en;
299 u32 reg_ts_int_msk;
300 u32 reg_ts_int_stat;
301 u32 reg_src_sel;
302
303 /* Default register vals */
304 int pci_irqmask;
305 u32 dma_ctl_val;
306 u32 ts_int_msk_val;
307 u32 gen_ctrl_val;
308 u32 ts_clk_en_val;
309 u32 src_sel_val;
310 u32 vld_misc_val;
311 u32 hw_sop_ctrl_val;
312
313 /* Allow a single tsport to have multiple frontends */
314 u32 num_frontends;
315 void (*gate_ctrl)(struct cx23885_tsport *port, int open);
316 void *port_priv;
317
318 /* Workaround for a temp dvb_frontend that the tuner can attached to */
319 struct dvb_frontend analog_fe;
320 };
321
322 struct cx23885_kernel_ir {
323 struct cx23885_dev *cx;
324 char *name;
325 char *phys;
326
327 struct rc_dev *rc;
328 };
329
330 struct cx23885_audio_buffer {
331 unsigned int bpl;
332 struct btcx_riscmem risc;
333 struct videobuf_dmabuf dma;
334 };
335
336 struct cx23885_audio_dev {
337 struct cx23885_dev *dev;
338
339 struct pci_dev *pci;
340
341 struct snd_card *card;
342
343 spinlock_t lock;
344
345 atomic_t count;
346
347 unsigned int dma_size;
348 unsigned int period_size;
349 unsigned int num_periods;
350
351 struct videobuf_dmabuf *dma_risc;
352
353 struct cx23885_audio_buffer *buf;
354
355 struct snd_pcm_substream *substream;
356 };
357
358 struct cx23885_dev {
359 atomic_t refcount;
360 struct v4l2_device v4l2_dev;
361
362 /* pci stuff */
363 struct pci_dev *pci;
364 unsigned char pci_rev, pci_lat;
365 int pci_bus, pci_slot;
366 u32 __iomem *lmmio;
367 u8 __iomem *bmmio;
368 int pci_irqmask;
369 spinlock_t pci_irqmask_lock; /* protects mask reg too */
370 int hwrevision;
371
372 /* This valud is board specific and is used to configure the
373 * AV core so we see nice clean and stable video and audio. */
374 u32 clk_freq;
375
376 /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */
377 struct cx23885_i2c i2c_bus[3];
378
379 int nr;
380 struct mutex lock;
381 struct mutex gpio_lock;
382
383 /* board details */
384 unsigned int board;
385 char name[32];
386
387 struct cx23885_tsport ts1, ts2;
388
389 /* sram configuration */
390 struct sram_channel *sram_channels;
391
392 enum {
393 CX23885_BRIDGE_UNDEFINED = 0,
394 CX23885_BRIDGE_885 = 885,
395 CX23885_BRIDGE_887 = 887,
396 CX23885_BRIDGE_888 = 888,
397 } bridge;
398
399 /* Analog video */
400 u32 resources;
401 unsigned int input;
402 unsigned int audinput; /* Selectable audio input */
403 u32 tvaudio;
404 v4l2_std_id tvnorm;
405 unsigned int tuner_type;
406 unsigned char tuner_addr;
407 unsigned int tuner_bus;
408 unsigned int radio_type;
409 unsigned char radio_addr;
410 unsigned int has_radio;
411 struct v4l2_subdev *sd_cx25840;
412 struct work_struct cx25840_work;
413
414 /* Infrared */
415 struct v4l2_subdev *sd_ir;
416 struct work_struct ir_rx_work;
417 unsigned long ir_rx_notifications;
418 struct work_struct ir_tx_work;
419 unsigned long ir_tx_notifications;
420
421 struct cx23885_kernel_ir *kernel_ir;
422 atomic_t ir_input_stopping;
423
424 /* V4l */
425 u32 freq;
426 struct video_device *video_dev;
427 struct video_device *vbi_dev;
428 struct video_device *radio_dev;
429
430 struct cx23885_dmaqueue vidq;
431 struct cx23885_dmaqueue vbiq;
432 spinlock_t slock;
433
434 /* MPEG Encoder ONLY settings */
435 u32 cx23417_mailbox;
436 struct cx2341x_mpeg_params mpeg_params;
437 struct video_device *v4l_device;
438 atomic_t v4l_reader_count;
439 struct cx23885_tvnorm encodernorm;
440
441 /* Analog raw audio */
442 struct cx23885_audio_dev *audio_dev;
443
444 };
445
to_cx23885(struct v4l2_device * v4l2_dev)446 static inline struct cx23885_dev *to_cx23885(struct v4l2_device *v4l2_dev)
447 {
448 return container_of(v4l2_dev, struct cx23885_dev, v4l2_dev);
449 }
450
451 #define call_all(dev, o, f, args...) \
452 v4l2_device_call_all(&dev->v4l2_dev, 0, o, f, ##args)
453
454 #define CX23885_HW_888_IR (1 << 0)
455 #define CX23885_HW_AV_CORE (1 << 1)
456
457 #define call_hw(dev, grpid, o, f, args...) \
458 v4l2_device_call_all(&dev->v4l2_dev, grpid, o, f, ##args)
459
460 extern struct v4l2_subdev *cx23885_find_hw(struct cx23885_dev *dev, u32 hw);
461
462 #define SRAM_CH01 0 /* Video A */
463 #define SRAM_CH02 1 /* VBI A */
464 #define SRAM_CH03 2 /* Video B */
465 #define SRAM_CH04 3 /* Transport via B */
466 #define SRAM_CH05 4 /* VBI B */
467 #define SRAM_CH06 5 /* Video C */
468 #define SRAM_CH07 6 /* Transport via C */
469 #define SRAM_CH08 7 /* Audio Internal A */
470 #define SRAM_CH09 8 /* Audio Internal B */
471 #define SRAM_CH10 9 /* Audio External */
472 #define SRAM_CH11 10 /* COMB_3D_N */
473 #define SRAM_CH12 11 /* Comb 3D N1 */
474 #define SRAM_CH13 12 /* Comb 3D N2 */
475 #define SRAM_CH14 13 /* MOE Vid */
476 #define SRAM_CH15 14 /* MOE RSLT */
477
478 struct sram_channel {
479 char *name;
480 u32 cmds_start;
481 u32 ctrl_start;
482 u32 cdt;
483 u32 fifo_start;
484 u32 fifo_size;
485 u32 ptr1_reg;
486 u32 ptr2_reg;
487 u32 cnt1_reg;
488 u32 cnt2_reg;
489 u32 jumponly;
490 };
491
492 /* ----------------------------------------------------------- */
493
494 #define cx_read(reg) readl(dev->lmmio + ((reg)>>2))
495 #define cx_write(reg, value) writel((value), dev->lmmio + ((reg)>>2))
496
497 #define cx_andor(reg, mask, value) \
498 writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
499 ((value) & (mask)), dev->lmmio+((reg)>>2))
500
501 #define cx_set(reg, bit) cx_andor((reg), (bit), (bit))
502 #define cx_clear(reg, bit) cx_andor((reg), (bit), 0)
503
504 /* ----------------------------------------------------------- */
505 /* cx23885-core.c */
506
507 extern int cx23885_sram_channel_setup(struct cx23885_dev *dev,
508 struct sram_channel *ch,
509 unsigned int bpl, u32 risc);
510
511 extern void cx23885_sram_channel_dump(struct cx23885_dev *dev,
512 struct sram_channel *ch);
513
514 extern int cx23885_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
515 u32 reg, u32 mask, u32 value);
516
517 extern int cx23885_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
518 struct scatterlist *sglist,
519 unsigned int top_offset, unsigned int bottom_offset,
520 unsigned int bpl, unsigned int padding, unsigned int lines);
521
522 extern int cx23885_risc_vbibuffer(struct pci_dev *pci,
523 struct btcx_riscmem *risc, struct scatterlist *sglist,
524 unsigned int top_offset, unsigned int bottom_offset,
525 unsigned int bpl, unsigned int padding, unsigned int lines);
526
527 void cx23885_cancel_buffers(struct cx23885_tsport *port);
528
529 extern int cx23885_restart_queue(struct cx23885_tsport *port,
530 struct cx23885_dmaqueue *q);
531
532 extern void cx23885_wakeup(struct cx23885_tsport *port,
533 struct cx23885_dmaqueue *q, u32 count);
534
535 extern void cx23885_gpio_set(struct cx23885_dev *dev, u32 mask);
536 extern void cx23885_gpio_clear(struct cx23885_dev *dev, u32 mask);
537 extern u32 cx23885_gpio_get(struct cx23885_dev *dev, u32 mask);
538 extern void cx23885_gpio_enable(struct cx23885_dev *dev, u32 mask,
539 int asoutput);
540
541 extern void cx23885_irq_add_enable(struct cx23885_dev *dev, u32 mask);
542 extern void cx23885_irq_enable(struct cx23885_dev *dev, u32 mask);
543 extern void cx23885_irq_disable(struct cx23885_dev *dev, u32 mask);
544 extern void cx23885_irq_remove(struct cx23885_dev *dev, u32 mask);
545
546 /* ----------------------------------------------------------- */
547 /* cx23885-cards.c */
548 extern struct cx23885_board cx23885_boards[];
549 extern const unsigned int cx23885_bcount;
550
551 extern struct cx23885_subid cx23885_subids[];
552 extern const unsigned int cx23885_idcount;
553
554 extern int cx23885_tuner_callback(void *priv, int component,
555 int command, int arg);
556 extern void cx23885_card_list(struct cx23885_dev *dev);
557 extern int cx23885_ir_init(struct cx23885_dev *dev);
558 extern void cx23885_ir_pci_int_enable(struct cx23885_dev *dev);
559 extern void cx23885_ir_fini(struct cx23885_dev *dev);
560 extern void cx23885_gpio_setup(struct cx23885_dev *dev);
561 extern void cx23885_card_setup(struct cx23885_dev *dev);
562 extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev);
563
564 extern int cx23885_dvb_register(struct cx23885_tsport *port);
565 extern int cx23885_dvb_unregister(struct cx23885_tsport *port);
566
567 extern int cx23885_buf_prepare(struct videobuf_queue *q,
568 struct cx23885_tsport *port,
569 struct cx23885_buffer *buf,
570 enum v4l2_field field);
571 extern void cx23885_buf_queue(struct cx23885_tsport *port,
572 struct cx23885_buffer *buf);
573 extern void cx23885_free_buffer(struct videobuf_queue *q,
574 struct cx23885_buffer *buf);
575
576 /* ----------------------------------------------------------- */
577 /* cx23885-video.c */
578 /* Video */
579 extern int cx23885_video_register(struct cx23885_dev *dev);
580 extern void cx23885_video_unregister(struct cx23885_dev *dev);
581 extern int cx23885_video_irq(struct cx23885_dev *dev, u32 status);
582 extern void cx23885_video_wakeup(struct cx23885_dev *dev,
583 struct cx23885_dmaqueue *q, u32 count);
584 int cx23885_enum_input(struct cx23885_dev *dev, struct v4l2_input *i);
585 int cx23885_set_input(struct file *file, void *priv, unsigned int i);
586 int cx23885_get_input(struct file *file, void *priv, unsigned int *i);
587 int cx23885_set_frequency(struct file *file, void *priv, struct v4l2_frequency *f);
588 int cx23885_set_control(struct cx23885_dev *dev, struct v4l2_control *ctl);
589 int cx23885_get_control(struct cx23885_dev *dev, struct v4l2_control *ctl);
590 int cx23885_set_tvnorm(struct cx23885_dev *dev, v4l2_std_id norm);
591
592 /* ----------------------------------------------------------- */
593 /* cx23885-vbi.c */
594 extern int cx23885_vbi_fmt(struct file *file, void *priv,
595 struct v4l2_format *f);
596 extern void cx23885_vbi_timeout(unsigned long data);
597 extern struct videobuf_queue_ops cx23885_vbi_qops;
598 extern int cx23885_restart_vbi_queue(struct cx23885_dev *dev,
599 struct cx23885_dmaqueue *q);
600 extern int cx23885_vbi_irq(struct cx23885_dev *dev, u32 status);
601
602 /* cx23885-i2c.c */
603 extern int cx23885_i2c_register(struct cx23885_i2c *bus);
604 extern int cx23885_i2c_unregister(struct cx23885_i2c *bus);
605 extern void cx23885_av_clk(struct cx23885_dev *dev, int enable);
606
607 /* ----------------------------------------------------------- */
608 /* cx23885-417.c */
609 extern int cx23885_417_register(struct cx23885_dev *dev);
610 extern void cx23885_417_unregister(struct cx23885_dev *dev);
611 extern int cx23885_irq_417(struct cx23885_dev *dev, u32 status);
612 extern void cx23885_417_check_encoder(struct cx23885_dev *dev);
613 extern void cx23885_mc417_init(struct cx23885_dev *dev);
614 extern int mc417_memory_read(struct cx23885_dev *dev, u32 address, u32 *value);
615 extern int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value);
616 extern int mc417_register_read(struct cx23885_dev *dev,
617 u16 address, u32 *value);
618 extern int mc417_register_write(struct cx23885_dev *dev,
619 u16 address, u32 value);
620 extern void mc417_gpio_set(struct cx23885_dev *dev, u32 mask);
621 extern void mc417_gpio_clear(struct cx23885_dev *dev, u32 mask);
622 extern void mc417_gpio_enable(struct cx23885_dev *dev, u32 mask, int asoutput);
623
624 /* ----------------------------------------------------------- */
625 /* cx23885-alsa.c */
626 extern struct cx23885_audio_dev *cx23885_audio_register(
627 struct cx23885_dev *dev);
628 extern void cx23885_audio_unregister(struct cx23885_dev *dev);
629 extern int cx23885_audio_irq(struct cx23885_dev *dev, u32 status, u32 mask);
630 extern int cx23885_risc_databuffer(struct pci_dev *pci,
631 struct btcx_riscmem *risc,
632 struct scatterlist *sglist,
633 unsigned int bpl,
634 unsigned int lines,
635 unsigned int lpi);
636
637 /* ----------------------------------------------------------- */
638 /* tv norms */
639
norm_maxw(v4l2_std_id norm)640 static inline unsigned int norm_maxw(v4l2_std_id norm)
641 {
642 return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 720 : 768;
643 }
644
norm_maxh(v4l2_std_id norm)645 static inline unsigned int norm_maxh(v4l2_std_id norm)
646 {
647 return (norm & V4L2_STD_625_50) ? 576 : 480;
648 }
649
norm_swidth(v4l2_std_id norm)650 static inline unsigned int norm_swidth(v4l2_std_id norm)
651 {
652 return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 754 : 922;
653 }
654