1 /* 2 * This file is part of the Chelsio T4 Ethernet driver for Linux. 3 * 4 * Copyright (c) 2003-2010 Chelsio Communications, Inc. All rights reserved. 5 * 6 * This software is available to you under a choice of one of two 7 * licenses. You may choose to be licensed under the terms of the GNU 8 * General Public License (GPL) Version 2, available from the file 9 * COPYING in the main directory of this source tree, or the 10 * OpenIB.org BSD license below: 11 * 12 * Redistribution and use in source and binary forms, with or 13 * without modification, are permitted provided that the following 14 * conditions are met: 15 * 16 * - Redistributions of source code must retain the above 17 * copyright notice, this list of conditions and the following 18 * disclaimer. 19 * 20 * - Redistributions in binary form must reproduce the above 21 * copyright notice, this list of conditions and the following 22 * disclaimer in the documentation and/or other materials 23 * provided with the distribution. 24 * 25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 32 * SOFTWARE. 33 */ 34 35 #ifndef __T4_MSG_H 36 #define __T4_MSG_H 37 38 #include <linux/types.h> 39 40 enum { 41 CPL_PASS_OPEN_REQ = 0x1, 42 CPL_PASS_ACCEPT_RPL = 0x2, 43 CPL_ACT_OPEN_REQ = 0x3, 44 CPL_SET_TCB_FIELD = 0x5, 45 CPL_GET_TCB = 0x6, 46 CPL_CLOSE_CON_REQ = 0x8, 47 CPL_CLOSE_LISTSRV_REQ = 0x9, 48 CPL_ABORT_REQ = 0xA, 49 CPL_ABORT_RPL = 0xB, 50 CPL_RX_DATA_ACK = 0xD, 51 CPL_TX_PKT = 0xE, 52 CPL_L2T_WRITE_REQ = 0x12, 53 CPL_TID_RELEASE = 0x1A, 54 55 CPL_CLOSE_LISTSRV_RPL = 0x20, 56 CPL_L2T_WRITE_RPL = 0x23, 57 CPL_PASS_OPEN_RPL = 0x24, 58 CPL_ACT_OPEN_RPL = 0x25, 59 CPL_PEER_CLOSE = 0x26, 60 CPL_ABORT_REQ_RSS = 0x2B, 61 CPL_ABORT_RPL_RSS = 0x2D, 62 63 CPL_CLOSE_CON_RPL = 0x32, 64 CPL_ISCSI_HDR = 0x33, 65 CPL_RDMA_CQE = 0x35, 66 CPL_RDMA_CQE_READ_RSP = 0x36, 67 CPL_RDMA_CQE_ERR = 0x37, 68 CPL_RX_DATA = 0x39, 69 CPL_SET_TCB_RPL = 0x3A, 70 CPL_RX_PKT = 0x3B, 71 CPL_RX_DDP_COMPLETE = 0x3F, 72 73 CPL_ACT_ESTABLISH = 0x40, 74 CPL_PASS_ESTABLISH = 0x41, 75 CPL_RX_DATA_DDP = 0x42, 76 CPL_PASS_ACCEPT_REQ = 0x44, 77 78 CPL_RDMA_READ_REQ = 0x60, 79 80 CPL_PASS_OPEN_REQ6 = 0x81, 81 CPL_ACT_OPEN_REQ6 = 0x83, 82 83 CPL_RDMA_TERMINATE = 0xA2, 84 CPL_RDMA_WRITE = 0xA4, 85 CPL_SGE_EGR_UPDATE = 0xA5, 86 87 CPL_TRACE_PKT = 0xB0, 88 89 CPL_FW4_MSG = 0xC0, 90 CPL_FW4_PLD = 0xC1, 91 CPL_FW4_ACK = 0xC3, 92 93 CPL_FW6_MSG = 0xE0, 94 CPL_FW6_PLD = 0xE1, 95 CPL_TX_PKT_LSO = 0xED, 96 CPL_TX_PKT_XT = 0xEE, 97 98 NUM_CPL_CMDS 99 }; 100 101 enum CPL_error { 102 CPL_ERR_NONE = 0, 103 CPL_ERR_TCAM_FULL = 3, 104 CPL_ERR_BAD_LENGTH = 15, 105 CPL_ERR_BAD_ROUTE = 18, 106 CPL_ERR_CONN_RESET = 20, 107 CPL_ERR_CONN_EXIST_SYNRECV = 21, 108 CPL_ERR_CONN_EXIST = 22, 109 CPL_ERR_ARP_MISS = 23, 110 CPL_ERR_BAD_SYN = 24, 111 CPL_ERR_CONN_TIMEDOUT = 30, 112 CPL_ERR_XMIT_TIMEDOUT = 31, 113 CPL_ERR_PERSIST_TIMEDOUT = 32, 114 CPL_ERR_FINWAIT2_TIMEDOUT = 33, 115 CPL_ERR_KEEPALIVE_TIMEDOUT = 34, 116 CPL_ERR_RTX_NEG_ADVICE = 35, 117 CPL_ERR_PERSIST_NEG_ADVICE = 36, 118 CPL_ERR_ABORT_FAILED = 42, 119 CPL_ERR_IWARP_FLM = 50, 120 }; 121 122 enum { 123 ULP_MODE_NONE = 0, 124 ULP_MODE_ISCSI = 2, 125 ULP_MODE_RDMA = 4, 126 ULP_MODE_TCPDDP = 5, 127 ULP_MODE_FCOE = 6, 128 }; 129 130 enum { 131 ULP_CRC_HEADER = 1 << 0, 132 ULP_CRC_DATA = 1 << 1 133 }; 134 135 enum { 136 CPL_ABORT_SEND_RST = 0, 137 CPL_ABORT_NO_RST, 138 }; 139 140 enum { /* TX_PKT_XT checksum types */ 141 TX_CSUM_TCP = 0, 142 TX_CSUM_UDP = 1, 143 TX_CSUM_CRC16 = 4, 144 TX_CSUM_CRC32 = 5, 145 TX_CSUM_CRC32C = 6, 146 TX_CSUM_FCOE = 7, 147 TX_CSUM_TCPIP = 8, 148 TX_CSUM_UDPIP = 9, 149 TX_CSUM_TCPIP6 = 10, 150 TX_CSUM_UDPIP6 = 11, 151 TX_CSUM_IP = 12, 152 }; 153 154 union opcode_tid { 155 __be32 opcode_tid; 156 u8 opcode; 157 }; 158 159 #define CPL_OPCODE(x) ((x) << 24) 160 #define MK_OPCODE_TID(opcode, tid) (CPL_OPCODE(opcode) | (tid)) 161 #define OPCODE_TID(cmd) ((cmd)->ot.opcode_tid) 162 #define GET_TID(cmd) (ntohl(OPCODE_TID(cmd)) & 0xFFFFFF) 163 164 /* partitioning of TID fields that also carry a queue id */ 165 #define GET_TID_TID(x) ((x) & 0x3fff) 166 #define GET_TID_QID(x) (((x) >> 14) & 0x3ff) 167 #define TID_QID(x) ((x) << 14) 168 169 struct rss_header { 170 u8 opcode; 171 #if defined(__LITTLE_ENDIAN_BITFIELD) 172 u8 channel:2; 173 u8 filter_hit:1; 174 u8 filter_tid:1; 175 u8 hash_type:2; 176 u8 ipv6:1; 177 u8 send2fw:1; 178 #else 179 u8 send2fw:1; 180 u8 ipv6:1; 181 u8 hash_type:2; 182 u8 filter_tid:1; 183 u8 filter_hit:1; 184 u8 channel:2; 185 #endif 186 __be16 qid; 187 __be32 hash_val; 188 }; 189 190 struct work_request_hdr { 191 __be32 wr_hi; 192 __be32 wr_mid; 193 __be64 wr_lo; 194 }; 195 196 #define WR_HDR struct work_request_hdr wr 197 198 struct cpl_pass_open_req { 199 WR_HDR; 200 union opcode_tid ot; 201 __be16 local_port; 202 __be16 peer_port; 203 __be32 local_ip; 204 __be32 peer_ip; 205 __be64 opt0; 206 #define TX_CHAN(x) ((x) << 2) 207 #define DELACK(x) ((x) << 5) 208 #define ULP_MODE(x) ((x) << 8) 209 #define RCV_BUFSIZ(x) ((x) << 12) 210 #define DSCP(x) ((x) << 22) 211 #define SMAC_SEL(x) ((u64)(x) << 28) 212 #define L2T_IDX(x) ((u64)(x) << 36) 213 #define NAGLE(x) ((u64)(x) << 49) 214 #define WND_SCALE(x) ((u64)(x) << 50) 215 #define KEEP_ALIVE(x) ((u64)(x) << 54) 216 #define MSS_IDX(x) ((u64)(x) << 60) 217 __be64 opt1; 218 #define SYN_RSS_ENABLE (1 << 0) 219 #define SYN_RSS_QUEUE(x) ((x) << 2) 220 #define CONN_POLICY_ASK (1 << 22) 221 }; 222 223 struct cpl_pass_open_req6 { 224 WR_HDR; 225 union opcode_tid ot; 226 __be16 local_port; 227 __be16 peer_port; 228 __be64 local_ip_hi; 229 __be64 local_ip_lo; 230 __be64 peer_ip_hi; 231 __be64 peer_ip_lo; 232 __be64 opt0; 233 __be64 opt1; 234 }; 235 236 struct cpl_pass_open_rpl { 237 union opcode_tid ot; 238 u8 rsvd[3]; 239 u8 status; 240 }; 241 242 struct cpl_pass_accept_rpl { 243 WR_HDR; 244 union opcode_tid ot; 245 __be32 opt2; 246 #define RSS_QUEUE(x) ((x) << 0) 247 #define RSS_QUEUE_VALID (1 << 10) 248 #define RX_COALESCE_VALID(x) ((x) << 11) 249 #define RX_COALESCE(x) ((x) << 12) 250 #define TX_QUEUE(x) ((x) << 23) 251 #define RX_CHANNEL(x) ((x) << 26) 252 #define WND_SCALE_EN(x) ((x) << 28) 253 #define TSTAMPS_EN(x) ((x) << 29) 254 #define SACK_EN(x) ((x) << 30) 255 __be64 opt0; 256 }; 257 258 struct cpl_act_open_req { 259 WR_HDR; 260 union opcode_tid ot; 261 __be16 local_port; 262 __be16 peer_port; 263 __be32 local_ip; 264 __be32 peer_ip; 265 __be64 opt0; 266 __be32 params; 267 __be32 opt2; 268 }; 269 270 struct cpl_act_open_req6 { 271 WR_HDR; 272 union opcode_tid ot; 273 __be16 local_port; 274 __be16 peer_port; 275 __be64 local_ip_hi; 276 __be64 local_ip_lo; 277 __be64 peer_ip_hi; 278 __be64 peer_ip_lo; 279 __be64 opt0; 280 __be32 params; 281 __be32 opt2; 282 }; 283 284 struct cpl_act_open_rpl { 285 union opcode_tid ot; 286 __be32 atid_status; 287 #define GET_AOPEN_STATUS(x) ((x) & 0xff) 288 #define GET_AOPEN_ATID(x) (((x) >> 8) & 0xffffff) 289 }; 290 291 struct cpl_pass_establish { 292 union opcode_tid ot; 293 __be32 rsvd; 294 __be32 tos_stid; 295 #define GET_POPEN_TID(x) ((x) & 0xffffff) 296 #define GET_POPEN_TOS(x) (((x) >> 24) & 0xff) 297 __be16 mac_idx; 298 __be16 tcp_opt; 299 #define GET_TCPOPT_WSCALE_OK(x) (((x) >> 5) & 1) 300 #define GET_TCPOPT_SACK(x) (((x) >> 6) & 1) 301 #define GET_TCPOPT_TSTAMP(x) (((x) >> 7) & 1) 302 #define GET_TCPOPT_SND_WSCALE(x) (((x) >> 8) & 0xf) 303 #define GET_TCPOPT_MSS(x) (((x) >> 12) & 0xf) 304 __be32 snd_isn; 305 __be32 rcv_isn; 306 }; 307 308 struct cpl_act_establish { 309 union opcode_tid ot; 310 __be32 rsvd; 311 __be32 tos_atid; 312 __be16 mac_idx; 313 __be16 tcp_opt; 314 __be32 snd_isn; 315 __be32 rcv_isn; 316 }; 317 318 struct cpl_get_tcb { 319 WR_HDR; 320 union opcode_tid ot; 321 __be16 reply_ctrl; 322 #define QUEUENO(x) ((x) << 0) 323 #define REPLY_CHAN(x) ((x) << 14) 324 #define NO_REPLY(x) ((x) << 15) 325 __be16 cookie; 326 }; 327 328 struct cpl_set_tcb_field { 329 WR_HDR; 330 union opcode_tid ot; 331 __be16 reply_ctrl; 332 __be16 word_cookie; 333 #define TCB_WORD(x) ((x) << 0) 334 #define TCB_COOKIE(x) ((x) << 5) 335 __be64 mask; 336 __be64 val; 337 }; 338 339 struct cpl_set_tcb_rpl { 340 union opcode_tid ot; 341 __be16 rsvd; 342 u8 cookie; 343 u8 status; 344 __be64 oldval; 345 }; 346 347 struct cpl_close_con_req { 348 WR_HDR; 349 union opcode_tid ot; 350 __be32 rsvd; 351 }; 352 353 struct cpl_close_con_rpl { 354 union opcode_tid ot; 355 u8 rsvd[3]; 356 u8 status; 357 __be32 snd_nxt; 358 __be32 rcv_nxt; 359 }; 360 361 struct cpl_close_listsvr_req { 362 WR_HDR; 363 union opcode_tid ot; 364 __be16 reply_ctrl; 365 #define LISTSVR_IPV6 (1 << 14) 366 __be16 rsvd; 367 }; 368 369 struct cpl_close_listsvr_rpl { 370 union opcode_tid ot; 371 u8 rsvd[3]; 372 u8 status; 373 }; 374 375 struct cpl_abort_req_rss { 376 union opcode_tid ot; 377 u8 rsvd[3]; 378 u8 status; 379 }; 380 381 struct cpl_abort_req { 382 WR_HDR; 383 union opcode_tid ot; 384 __be32 rsvd0; 385 u8 rsvd1; 386 u8 cmd; 387 u8 rsvd2[6]; 388 }; 389 390 struct cpl_abort_rpl_rss { 391 union opcode_tid ot; 392 u8 rsvd[3]; 393 u8 status; 394 }; 395 396 struct cpl_abort_rpl { 397 WR_HDR; 398 union opcode_tid ot; 399 __be32 rsvd0; 400 u8 rsvd1; 401 u8 cmd; 402 u8 rsvd2[6]; 403 }; 404 405 struct cpl_peer_close { 406 union opcode_tid ot; 407 __be32 rcv_nxt; 408 }; 409 410 struct cpl_tid_release { 411 WR_HDR; 412 union opcode_tid ot; 413 __be32 rsvd; 414 }; 415 416 struct cpl_tx_pkt_core { 417 __be32 ctrl0; 418 #define TXPKT_VF(x) ((x) << 0) 419 #define TXPKT_PF(x) ((x) << 8) 420 #define TXPKT_VF_VLD (1 << 11) 421 #define TXPKT_OVLAN_IDX(x) ((x) << 12) 422 #define TXPKT_INTF(x) ((x) << 16) 423 #define TXPKT_INS_OVLAN (1 << 21) 424 #define TXPKT_OPCODE(x) ((x) << 24) 425 __be16 pack; 426 __be16 len; 427 __be64 ctrl1; 428 #define TXPKT_CSUM_END(x) ((x) << 12) 429 #define TXPKT_CSUM_START(x) ((x) << 20) 430 #define TXPKT_IPHDR_LEN(x) ((u64)(x) << 20) 431 #define TXPKT_CSUM_LOC(x) ((u64)(x) << 30) 432 #define TXPKT_ETHHDR_LEN(x) ((u64)(x) << 34) 433 #define TXPKT_CSUM_TYPE(x) ((u64)(x) << 40) 434 #define TXPKT_VLAN(x) ((u64)(x) << 44) 435 #define TXPKT_VLAN_VLD (1ULL << 60) 436 #define TXPKT_IPCSUM_DIS (1ULL << 62) 437 #define TXPKT_L4CSUM_DIS (1ULL << 63) 438 }; 439 440 struct cpl_tx_pkt { 441 WR_HDR; 442 struct cpl_tx_pkt_core c; 443 }; 444 445 #define cpl_tx_pkt_xt cpl_tx_pkt 446 447 struct cpl_tx_pkt_lso_core { 448 __be32 lso_ctrl; 449 #define LSO_TCPHDR_LEN(x) ((x) << 0) 450 #define LSO_IPHDR_LEN(x) ((x) << 4) 451 #define LSO_ETHHDR_LEN(x) ((x) << 16) 452 #define LSO_IPV6(x) ((x) << 20) 453 #define LSO_LAST_SLICE (1 << 22) 454 #define LSO_FIRST_SLICE (1 << 23) 455 #define LSO_OPCODE(x) ((x) << 24) 456 __be16 ipid_ofst; 457 __be16 mss; 458 __be32 seqno_offset; 459 __be32 len; 460 /* encapsulated CPL (TX_PKT, TX_PKT_XT or TX_DATA) follows here */ 461 }; 462 463 struct cpl_tx_pkt_lso { 464 WR_HDR; 465 struct cpl_tx_pkt_lso_core c; 466 /* encapsulated CPL (TX_PKT, TX_PKT_XT or TX_DATA) follows here */ 467 }; 468 469 struct cpl_iscsi_hdr { 470 union opcode_tid ot; 471 __be16 pdu_len_ddp; 472 #define ISCSI_PDU_LEN(x) ((x) & 0x7FFF) 473 #define ISCSI_DDP (1 << 15) 474 __be16 len; 475 __be32 seq; 476 __be16 urg; 477 u8 rsvd; 478 u8 status; 479 }; 480 481 struct cpl_rx_data { 482 union opcode_tid ot; 483 __be16 rsvd; 484 __be16 len; 485 __be32 seq; 486 __be16 urg; 487 #if defined(__LITTLE_ENDIAN_BITFIELD) 488 u8 dack_mode:2; 489 u8 psh:1; 490 u8 heartbeat:1; 491 u8 ddp_off:1; 492 u8 :3; 493 #else 494 u8 :3; 495 u8 ddp_off:1; 496 u8 heartbeat:1; 497 u8 psh:1; 498 u8 dack_mode:2; 499 #endif 500 u8 status; 501 }; 502 503 struct cpl_rx_data_ack { 504 WR_HDR; 505 union opcode_tid ot; 506 __be32 credit_dack; 507 #define RX_CREDITS(x) ((x) << 0) 508 #define RX_FORCE_ACK(x) ((x) << 28) 509 }; 510 511 struct cpl_rx_pkt { 512 struct rss_header rsshdr; 513 u8 opcode; 514 #if defined(__LITTLE_ENDIAN_BITFIELD) 515 u8 iff:4; 516 u8 csum_calc:1; 517 u8 ipmi_pkt:1; 518 u8 vlan_ex:1; 519 u8 ip_frag:1; 520 #else 521 u8 ip_frag:1; 522 u8 vlan_ex:1; 523 u8 ipmi_pkt:1; 524 u8 csum_calc:1; 525 u8 iff:4; 526 #endif 527 __be16 csum; 528 __be16 vlan; 529 __be16 len; 530 __be32 l2info; 531 #define RXF_UDP (1 << 22) 532 #define RXF_TCP (1 << 23) 533 #define RXF_IP (1 << 24) 534 #define RXF_IP6 (1 << 25) 535 __be16 hdr_len; 536 __be16 err_vec; 537 }; 538 539 struct cpl_trace_pkt { 540 u8 opcode; 541 u8 intf; 542 #if defined(__LITTLE_ENDIAN_BITFIELD) 543 u8 runt:4; 544 u8 filter_hit:4; 545 u8 :6; 546 u8 err:1; 547 u8 trunc:1; 548 #else 549 u8 filter_hit:4; 550 u8 runt:4; 551 u8 trunc:1; 552 u8 err:1; 553 u8 :6; 554 #endif 555 __be16 rsvd; 556 __be16 len; 557 __be64 tstamp; 558 }; 559 560 struct cpl_l2t_write_req { 561 WR_HDR; 562 union opcode_tid ot; 563 __be16 params; 564 #define L2T_W_INFO(x) ((x) << 2) 565 #define L2T_W_PORT(x) ((x) << 8) 566 #define L2T_W_NOREPLY(x) ((x) << 15) 567 __be16 l2t_idx; 568 __be16 vlan; 569 u8 dst_mac[6]; 570 }; 571 572 struct cpl_l2t_write_rpl { 573 union opcode_tid ot; 574 u8 status; 575 u8 rsvd[3]; 576 }; 577 578 struct cpl_rdma_terminate { 579 union opcode_tid ot; 580 __be16 rsvd; 581 __be16 len; 582 }; 583 584 struct cpl_sge_egr_update { 585 __be32 opcode_qid; 586 #define EGR_QID(x) ((x) & 0x1FFFF) 587 __be16 cidx; 588 __be16 pidx; 589 }; 590 591 struct cpl_fw4_pld { 592 u8 opcode; 593 u8 rsvd0[3]; 594 u8 type; 595 u8 rsvd1; 596 __be16 len; 597 __be64 data; 598 __be64 rsvd2; 599 }; 600 601 struct cpl_fw6_pld { 602 u8 opcode; 603 u8 rsvd[5]; 604 __be16 len; 605 __be64 data[4]; 606 }; 607 608 struct cpl_fw4_msg { 609 u8 opcode; 610 u8 type; 611 __be16 rsvd0; 612 __be32 rsvd1; 613 __be64 data[2]; 614 }; 615 616 struct cpl_fw4_ack { 617 union opcode_tid ot; 618 u8 credits; 619 u8 rsvd0[2]; 620 u8 seq_vld; 621 __be32 snd_nxt; 622 __be32 snd_una; 623 __be64 rsvd1; 624 }; 625 626 struct cpl_fw6_msg { 627 u8 opcode; 628 u8 type; 629 __be16 rsvd0; 630 __be32 rsvd1; 631 __be64 data[4]; 632 }; 633 634 /* cpl_fw6_msg.type values */ 635 enum { 636 FW6_TYPE_CMD_RPL = 0, 637 }; 638 639 enum { 640 ULP_TX_MEM_READ = 2, 641 ULP_TX_MEM_WRITE = 3, 642 ULP_TX_PKT = 4 643 }; 644 645 enum { 646 ULP_TX_SC_NOOP = 0x80, 647 ULP_TX_SC_IMM = 0x81, 648 ULP_TX_SC_DSGL = 0x82, 649 ULP_TX_SC_ISGL = 0x83 650 }; 651 652 struct ulptx_sge_pair { 653 __be32 len[2]; 654 __be64 addr[2]; 655 }; 656 657 struct ulptx_sgl { 658 __be32 cmd_nsge; 659 #define ULPTX_CMD(x) ((x) << 24) 660 #define ULPTX_NSGE(x) ((x) << 0) 661 __be32 len0; 662 __be64 addr0; 663 struct ulptx_sge_pair sge[0]; 664 }; 665 666 struct ulp_mem_io { 667 WR_HDR; 668 __be32 cmd; 669 #define ULP_MEMIO_ORDER(x) ((x) << 23) 670 __be32 len16; /* command length */ 671 __be32 dlen; /* data length in 32-byte units */ 672 #define ULP_MEMIO_DATA_LEN(x) ((x) << 0) 673 __be32 lock_addr; 674 #define ULP_MEMIO_ADDR(x) ((x) << 0) 675 #define ULP_MEMIO_LOCK(x) ((x) << 31) 676 }; 677 678 #endif /* __T4_MSG_H */ 679