1 /* 2 * CPCI-405 board specific definitions 3 * 4 * Copyright (c) 2001 Stefan Roese (stefan.roese@esd-electronics.com) 5 */ 6 7 #ifdef __KERNEL__ 8 #ifndef __ASM_CPCI405_H__ 9 #define __ASM_CPCI405_H__ 10 11 #include <linux/config.h> 12 13 /* We have a 405GP core */ 14 #include <platforms/ibm405gp.h> 15 16 #include <asm/ppcboot.h> 17 18 #ifndef __ASSEMBLY__ 19 /* Some 4xx parts use a different timebase frequency from the internal clock. 20 */ 21 #define bi_tbfreq bi_intfreq 22 23 /* Map for the NVRAM space */ 24 #define CPCI405_NVRAM_PADDR ((uint)0xf0200000) 25 #define CPCI405_NVRAM_SIZE ((uint)32*1024) 26 27 #if defined(CONFIG_UART0_TTYS0) 28 #define ACTING_UART0_IO_BASE UART0_IO_BASE 29 #define ACTING_UART1_IO_BASE UART1_IO_BASE 30 #define ACTING_UART0_INT UART0_INT 31 #define ACTING_UART1_INT UART1_INT 32 #else 33 #define ACTING_UART0_IO_BASE UART1_IO_BASE 34 #define ACTING_UART1_IO_BASE UART0_IO_BASE 35 #define ACTING_UART0_INT UART1_INT 36 #define ACTING_UART1_INT UART0_INT 37 #endif 38 39 /* The UART clock is based off an internal clock - 40 * define BASE_BAUD based on the internal clock and divider(s). 41 * Since BASE_BAUD must be a constant, we will initialize it 42 * using clock/divider values which U-Boot initializes 43 * for typical configurations at various CPU speeds. 44 * The base baud is calculated as (FWDA / EXT UART DIV / 16) 45 */ 46 #define BASE_BAUD 0 47 48 #define PPC4xx_MACHINE_NAME "esd CPCI-405" 49 50 #endif /* !__ASSEMBLY__ */ 51 #endif /* __ASM_CPCI405_H__ */ 52 #endif /* __KERNEL__ */ 53