1# 2# DSP Bridge Driver Support 3# 4 5menuconfig TIDSPBRIDGE 6 tristate "DSP Bridge driver" 7 depends on ARCH_OMAP3 8 select OMAP_MBOX_FWK 9 help 10 DSP/BIOS Bridge is designed for platforms that contain a GPP and 11 one or more attached DSPs. The GPP is considered the master or 12 "host" processor, and the attached DSPs are processing resources 13 that can be utilized by applications and drivers running on the GPP. 14 15 This driver depends on OMAP Mailbox (OMAP_MBOX_FWK). 16 17config TIDSPBRIDGE_DVFS 18 bool "Enable Bridge Dynamic Voltage and Frequency Scaling (DVFS)" 19 depends on TIDSPBRIDGE && OMAP_PM_SRF && CPU_FREQ 20 help 21 DVFS allows DSP Bridge to initiate the operating point change to 22 scale the chip voltage and frequency in order to match the 23 performance and power consumption to the current processing 24 requirements. 25 26config TIDSPBRIDGE_MEMPOOL_SIZE 27 hex "Physical memory pool size (Byte)" 28 depends on TIDSPBRIDGE 29 default 0x600000 30 help 31 Allocate specified size of memory at booting time to avoid allocation 32 failure under heavy memory fragmentation after some use time. 33 34config TIDSPBRIDGE_DEBUG 35 bool "Debug Support" 36 depends on TIDSPBRIDGE 37 help 38 Say Y to enable Bridge debugging capabilities 39 40config TIDSPBRIDGE_RECOVERY 41 bool "Recovery Support" 42 depends on TIDSPBRIDGE 43 default y 44 help 45 In case of DSP fatal error, BRIDGE driver will try to 46 recover itself. 47 48config TIDSPBRIDGE_CACHE_LINE_CHECK 49 bool "Check buffers to be 128 byte aligned" 50 depends on TIDSPBRIDGE 51 help 52 When the DSP processes data, the DSP cache controller loads 128-Byte 53 chunks (lines) from SDRAM and writes the data back in 128-Byte chunks. 54 If a DMM buffer does not start and end on a 128-Byte boundary, the data 55 preceding the start address (SA) from the 128-Byte boundary to the SA 56 and the data at addresses trailing the end address (EA) from the EA to 57 the next 128-Byte boundary will be loaded and written back as well. 58 This can lead to heap corruption. Say Y, to enforce the check for 128 59 byte alignment, buffers failing this check will be rejected. 60 61config TIDSPBRIDGE_WDT3 62 bool "Enable watchdog timer" 63 depends on TIDSPBRIDGE 64 help 65 WTD3 is managed by DSP and once it is enabled, DSP side bridge is in 66 charge of refreshing the timer before overflow, if the DSP hangs MPU 67 will caught the interrupt and try to recover DSP. 68 69config TIDSPBRIDGE_WDT_TIMEOUT 70 int "Watchdog timer timeout (in secs)" 71 depends on TIDSPBRIDGE && TIDSPBRIDGE_WDT3 72 default 5 73 help 74 Watchdog timer timeout value, after that time if the watchdog timer 75 counter is not reset the wdt overflow interrupt will be triggered 76 77config TIDSPBRIDGE_NTFY_PWRERR 78 bool "Notify power errors" 79 depends on TIDSPBRIDGE 80 help 81 Enable notifications to registered clients on the event of power errror 82 trying to suspend bridge driver. Say Y, to signal this event as a fatal 83 error, this will require a bridge restart to recover. 84 85config TIDSPBRIDGE_BACKTRACE 86 bool "Dump backtraces on fatal errors" 87 depends on TIDSPBRIDGE 88 help 89 Enable useful information to backtrace fatal errors. Say Y if you 90 want to dump information for testing purposes. 91