1# arch/arm/plat-samsung/Kconfig
2#
3# Copyright 2009 Simtec Electronics
4#
5# Licensed under GPLv2
6
7config PLAT_SAMSUNG
8	bool
9	depends on PLAT_S3C24XX || ARCH_S3C64XX || PLAT_S5P
10	select NO_IOPORT
11	select GENERIC_IRQ_CHIP
12	default y
13	help
14	  Base platform code for all Samsung SoC based systems
15
16if PLAT_SAMSUNG
17
18# boot configurations
19
20comment "Boot options"
21
22config S3C_BOOT_WATCHDOG
23	bool "S3C Initialisation watchdog"
24	depends on S3C2410_WATCHDOG
25	help
26	  Say y to enable the watchdog during the kernel decompression
27	  stage. If the kernel fails to uncompress, then the watchdog
28	  will trigger a reset and the system should restart.
29
30config S3C_BOOT_ERROR_RESET
31	bool "S3C Reboot on decompression error"
32	help
33	  Say y here to use the watchdog to reset the system if the
34	  kernel decompressor detects an error during decompression.
35
36config S3C_BOOT_UART_FORCE_FIFO
37       bool "Force UART FIFO on during boot process"
38       default y
39       help
40         Say Y here to force the UART FIFOs on during the kernel
41	 uncompressor
42
43
44config S3C_LOWLEVEL_UART_PORT
45	int "S3C UART to use for low-level messages"
46	default 0
47	help
48	  Choice of which UART port to use for the low-level messages,
49	  such as the `Uncompressing...` at start time. The value of
50	  this configuration should be between zero and two. The port
51	  must have been initialised by the boot-loader before use.
52
53# clock options
54
55config SAMSUNG_CLKSRC
56	bool
57	help
58	  Select the clock code for the clksrc implementation
59	  used by newer systems such as the S3C64XX.
60
61# options for IRQ support
62
63config SAMSUNG_IRQ_VIC_TIMER
64       bool
65       help
66         Internal configuration to build the VIC timer interrupt code.
67
68# options for gpio configuration support
69
70config SAMSUNG_GPIOLIB_4BIT
71	bool
72	help
73	  GPIOlib file contains the 4 bit modification functions for gpio
74	  configuration. GPIOlib shall be compiled only for S3C64XX and S5P
75	  series of processors.
76
77config S3C_GPIO_CFG_S3C64XX
78	bool
79	help
80	  Internal configuration to enable S3C64XX style GPIO configuration
81	  functions.
82
83config S5P_GPIO_DRVSTR
84	bool
85	help
86	  Internal configuration to get and set correct GPIO driver strength
87	  helper
88
89config SAMSUNG_GPIO_EXTRA
90	int "Number of additional GPIO pins"
91	default 128 if SAMSUNG_GPIO_EXTRA128
92	default 64 if SAMSUNG_GPIO_EXTRA64
93	default 0
94	help
95	  Use additional GPIO space in addition to the GPIO's the SOC
96	  provides. This allows expanding the GPIO space for use with
97	  GPIO expanders.
98
99config SAMSUNG_GPIO_EXTRA64
100	bool
101
102config SAMSUNG_GPIO_EXTRA128
103	bool
104
105config S3C_GPIO_SPACE
106	int "Space between gpio banks"
107	default 0
108	help
109	  Add a number of spare GPIO entries between each bank for debugging
110	  purposes. This allows any problems where an counter overflows from
111	  one bank to another to be caught, at the expense of using a little
112	  more memory.
113
114config S3C_GPIO_TRACK
115	bool
116	help
117	  Internal configuration option to enable the s3c specific gpio
118	  chip tracking if the platform requires it.
119
120# ADC driver
121
122config S3C_ADC
123	bool "ADC common driver support"
124	help
125	  Core support for the ADC block found in the Samsung SoC systems
126	  for drivers such as the touchscreen and hwmon to use to share
127	  this resource.
128
129# device definitions to compile in
130
131config S3C_DEV_HSMMC
132	bool
133	help
134	  Compile in platform device definitions for HSMMC code
135
136config S3C_DEV_HSMMC1
137	bool
138	help
139	  Compile in platform device definitions for HSMMC channel 1
140
141config S3C_DEV_HSMMC2
142	bool
143	help
144	  Compile in platform device definitions for HSMMC channel 2
145
146config S3C_DEV_HSMMC3
147	bool
148	help
149	  Compile in platform device definitions for HSMMC channel 3
150
151config S3C_DEV_HWMON
152	bool
153	help
154	    Compile in platform device definitions for HWMON
155
156config S3C_DEV_I2C1
157	bool
158	help
159	  Compile in platform device definitions for I2C channel 1
160
161config S3C_DEV_I2C2
162	bool
163	help
164	  Compile in platform device definitions for I2C channel 2
165
166config S3C_DEV_I2C3
167	bool
168	help
169	  Compile in platform device definition for I2C controller 3
170
171config S3C_DEV_I2C4
172	bool
173	help
174	  Compile in platform device definition for I2C controller 4
175
176config S3C_DEV_I2C5
177	bool
178	help
179	  Compile in platform device definition for I2C controller 5
180
181config S3C_DEV_I2C6
182	bool
183	help
184	  Compile in platform device definition for I2C controller 6
185
186config S3C_DEV_I2C7
187	bool
188	help
189	  Compile in platform device definition for I2C controller 7
190
191config S3C_DEV_FB
192	bool
193	help
194	  Compile in platform device definition for framebuffer
195
196config S3C_DEV_USB_HOST
197	bool
198	help
199	  Compile in platform device definition for USB host.
200
201config S3C_DEV_USB_HSOTG
202	bool
203	help
204	  Compile in platform device definition for USB high-speed OtG
205
206config S3C_DEV_WDT
207	bool
208	default y if ARCH_S3C24XX
209	help
210	  Complie in platform device definition for Watchdog Timer
211
212config S3C_DEV_NAND
213	bool
214	help
215	  Compile in platform device definition for NAND controller
216
217config S3C_DEV_ONENAND
218	bool
219	help
220	  Compile in platform device definition for OneNAND controller
221
222config S3C_DEV_RTC
223	bool
224	help
225	  Complie in platform device definition for RTC
226
227config SAMSUNG_DEV_ADC
228	bool
229	help
230	  Compile in platform device definition for ADC controller
231
232config SAMSUNG_DEV_IDE
233	bool
234	help
235	  Compile in platform device definitions for IDE
236
237config S3C64XX_DEV_SPI0
238	bool
239	help
240	  Compile in platform device definitions for S3C64XX's type
241	  SPI controller 0
242
243config S3C64XX_DEV_SPI1
244	bool
245	help
246	  Compile in platform device definitions for S3C64XX's type
247	  SPI controller 1
248
249config S3C64XX_DEV_SPI2
250	bool
251	help
252	  Compile in platform device definitions for S3C64XX's type
253	  SPI controller 2
254
255config SAMSUNG_DEV_TS
256	bool
257	help
258	    Common in platform device definitions for touchscreen device
259
260config SAMSUNG_DEV_KEYPAD
261	bool
262	help
263	  Compile in platform device definitions for keypad
264
265config SAMSUNG_DEV_PWM
266	bool
267	default y if ARCH_S3C24XX
268	help
269	  Compile in platform device definition for PWM Timer
270
271config SAMSUNG_DEV_BACKLIGHT
272	bool
273	depends on SAMSUNG_DEV_PWM
274	help
275	  Compile in platform device definition LCD backlight with PWM Timer
276
277config S3C24XX_PWM
278	bool "PWM device support"
279	select HAVE_PWM
280	help
281	  Support for exporting the PWM timer blocks via the pwm device
282	  system
283
284# DMA
285
286config S3C_DMA
287	bool
288	help
289	  Internal configuration for S3C DMA core
290
291config SAMSUNG_DMADEV
292	bool
293	select DMADEVICES
294	select PL330_DMA if (CPU_EXYNOS4210 || CPU_S5PV210 || CPU_S5PC100 || \
295					CPU_S5P6450 || CPU_S5P6440)
296	select ARM_AMBA
297	help
298	  Use DMA device engine for PL330 DMAC.
299
300comment "Power management"
301
302config SAMSUNG_PM_DEBUG
303	bool "S3C2410 PM Suspend debug"
304	depends on PM
305	select DEBUG_LL
306	help
307	  Say Y here if you want verbose debugging from the PM Suspend and
308	  Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
309	  for more information.
310
311config S3C_PM_DEBUG_LED_SMDK
312       bool "SMDK LED suspend/resume debugging"
313       depends on PM && (MACH_SMDK6410)
314       help
315         Say Y here to enable the use of the SMDK LEDs on the baseboard
316	 for debugging of the state of the suspend and resume process.
317
318	 Note, this currently only works for S3C64XX based SMDK boards.
319
320config SAMSUNG_PM_CHECK
321	bool "S3C2410 PM Suspend Memory CRC"
322	depends on PM && CRC32
323	help
324	  Enable the PM code's memory area checksum over sleep. This option
325	  will generate CRCs of all blocks of memory, and store them before
326	  going to sleep. The blocks are then checked on resume for any
327	  errors.
328
329	  Note, this can take several seconds depending on memory size
330	  and CPU speed.
331
332	  See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
333
334config SAMSUNG_PM_CHECK_CHUNKSIZE
335	int "S3C2410 PM Suspend CRC Chunksize (KiB)"
336	depends on PM && SAMSUNG_PM_CHECK
337	default 64
338	help
339	  Set the chunksize in Kilobytes of the CRC for checking memory
340	  corruption over suspend and resume. A smaller value will mean that
341	  the CRC data block will take more memory, but wil identify any
342	  faults with better precision.
343
344	  See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
345
346config SAMSUNG_WAKEMASK
347	bool
348	depends on PM
349	help
350	  Compile support for wakeup-mask controls found on the S3C6400
351	  and above. This code allows a set of interrupt to wakeup-mask
352	  mappings. See <plat/wakeup-mask.h>
353
354comment "Power Domain"
355
356config SAMSUNG_PD
357	bool "Samsung Power Domain"
358	depends on PM_RUNTIME
359	help
360	  Say Y here if you want to control Power Domain by Runtime PM.
361
362config DEBUG_S3C_UART
363	depends on PLAT_SAMSUNG
364	int
365	default "0" if DEBUG_S3C_UART0
366	default "1" if DEBUG_S3C_UART1
367	default "2" if DEBUG_S3C_UART2
368
369endif
370