1# arch/arm/plat-samsung/Kconfig
2#
3# Copyright 2009 Simtec Electronics
4#
5# Licensed under GPLv2
6
7config PLAT_SAMSUNG
8	bool
9	depends on PLAT_S3C24XX || ARCH_S3C64XX || PLAT_S5P
10	select NO_IOPORT
11	default y
12	help
13	  Base platform code for all Samsung SoC based systems
14
15if PLAT_SAMSUNG
16
17# boot configurations
18
19comment "Boot options"
20
21config S3C_BOOT_WATCHDOG
22	bool "S3C Initialisation watchdog"
23	depends on S3C2410_WATCHDOG
24	help
25	  Say y to enable the watchdog during the kernel decompression
26	  stage. If the kernel fails to uncompress, then the watchdog
27	  will trigger a reset and the system should restart.
28
29config S3C_BOOT_ERROR_RESET
30	bool "S3C Reboot on decompression error"
31	help
32	  Say y here to use the watchdog to reset the system if the
33	  kernel decompressor detects an error during decompression.
34
35config S3C_BOOT_UART_FORCE_FIFO
36       bool "Force UART FIFO on during boot process"
37       default y
38       help
39         Say Y here to force the UART FIFOs on during the kernel
40	 uncompressor
41
42
43config S3C_LOWLEVEL_UART_PORT
44	int "S3C UART to use for low-level messages"
45	default 0
46	help
47	  Choice of which UART port to use for the low-level messages,
48	  such as the `Uncompressing...` at start time. The value of
49	  this configuration should be between zero and two. The port
50	  must have been initialised by the boot-loader before use.
51
52# clock options
53
54config SAMSUNG_CLKSRC
55	bool
56	help
57	  Select the clock code for the clksrc implementation
58	  used by newer systems such as the S3C64XX.
59
60# options for IRQ support
61
62config SAMSUNG_IRQ_VIC_TIMER
63       bool
64       help
65         Internal configuration to build the VIC timer interrupt code.
66
67config SAMSUNG_IRQ_UART
68       bool
69       help
70         Internal configuration to build the IRQ UART demux code.
71
72# options for gpio configuration support
73
74config SAMSUNG_GPIOLIB_4BIT
75	bool
76	help
77	  GPIOlib file contains the 4 bit modification functions for gpio
78	  configuration. GPIOlib shall be compiled only for S3C64XX and S5P
79	  series of processors.
80
81config S3C_GPIO_CFG_S3C24XX
82	bool
83	help
84	  Internal configuration to enable S3C24XX style GPIO configuration
85	  functions.
86
87config S3C_GPIO_CFG_S3C64XX
88	bool
89	help
90	  Internal configuration to enable S3C64XX style GPIO configuration
91	  functions.
92
93config S3C_GPIO_PULL_UPDOWN
94	bool
95	help
96	  Internal configuration to enable the correct GPIO pull helper
97
98config S3C_GPIO_PULL_S3C2443
99	bool
100	select S3C_GPIO_PULL_UPDOWN
101	help
102	  Internal configuration to enable the correct GPIO pull helper for S3C2443-style GPIO
103
104config S3C_GPIO_PULL_DOWN
105	bool
106	help
107	  Internal configuration to enable the correct GPIO pull helper
108
109config S3C_GPIO_PULL_UP
110	bool
111	help
112	  Internal configuration to enable the correct GPIO pull helper
113
114config S5P_GPIO_DRVSTR
115	bool
116	help
117	  Internal configuration to get and set correct GPIO driver strength
118	  helper
119
120config SAMSUNG_GPIO_EXTRA
121	int "Number of additional GPIO pins"
122	default 0
123	help
124	  Use additional GPIO space in addition to the GPIO's the SOC
125	  provides. This allows expanding the GPIO space for use with
126	  GPIO expanders.
127
128config S3C_GPIO_SPACE
129	int "Space between gpio banks"
130	default 0
131	help
132	  Add a number of spare GPIO entries between each bank for debugging
133	  purposes. This allows any problems where an counter overflows from
134	  one bank to another to be caught, at the expense of using a little
135	  more memory.
136
137config S3C_GPIO_TRACK
138	bool
139	help
140	  Internal configuration option to enable the s3c specific gpio
141	  chip tracking if the platform requires it.
142
143# ADC driver
144
145config S3C_ADC
146	bool "ADC common driver support"
147	help
148	  Core support for the ADC block found in the Samsung SoC systems
149	  for drivers such as the touchscreen and hwmon to use to share
150	  this resource.
151
152# device definitions to compile in
153
154config S3C_DEV_HSMMC
155	bool
156	help
157	  Compile in platform device definitions for HSMMC code
158
159config S3C_DEV_HSMMC1
160	bool
161	help
162	  Compile in platform device definitions for HSMMC channel 1
163
164config S3C_DEV_HSMMC2
165	bool
166	help
167	  Compile in platform device definitions for HSMMC channel 2
168
169config S3C_DEV_HSMMC3
170	bool
171	help
172	  Compile in platform device definitions for HSMMC channel 3
173
174config S3C_DEV_HWMON
175	bool
176	help
177	    Compile in platform device definitions for HWMON
178
179config S3C_DEV_I2C1
180	bool
181	help
182	  Compile in platform device definitions for I2C channel 1
183
184config S3C_DEV_I2C2
185	bool
186	help
187	  Compile in platform device definitions for I2C channel 2
188
189config S3C_DEV_I2C3
190	bool
191	help
192	  Compile in platform device definition for I2C controller 3
193
194config S3C_DEV_I2C4
195	bool
196	help
197	  Compile in platform device definition for I2C controller 4
198
199config S3C_DEV_I2C5
200	bool
201	help
202	  Compile in platform device definition for I2C controller 5
203
204config S3C_DEV_I2C6
205	bool
206	help
207	  Compile in platform device definition for I2C controller 6
208
209config S3C_DEV_I2C7
210	bool
211	help
212	  Compile in platform device definition for I2C controller 7
213
214config S3C_DEV_FB
215	bool
216	help
217	  Compile in platform device definition for framebuffer
218
219config S3C_DEV_USB_HOST
220	bool
221	help
222	  Compile in platform device definition for USB host.
223
224config S3C_DEV_USB_HSOTG
225	bool
226	help
227	  Compile in platform device definition for USB high-speed OtG
228
229config S3C_DEV_WDT
230	bool
231	default y if ARCH_S3C2410
232	help
233	  Complie in platform device definition for Watchdog Timer
234
235config S3C_DEV_NAND
236	bool
237	help
238	  Compile in platform device definition for NAND controller
239
240config S3C_DEV_ONENAND
241	bool
242	help
243	  Compile in platform device definition for OneNAND controller
244
245config S3C_DEV_RTC
246	bool
247	help
248	  Complie in platform device definition for RTC
249
250config SAMSUNG_DEV_ADC
251	bool
252	help
253	  Compile in platform device definition for ADC controller
254
255config SAMSUNG_DEV_IDE
256	bool
257	help
258	  Compile in platform device definitions for IDE
259
260config S3C64XX_DEV_SPI
261	bool
262	help
263	  Compile in platform device definitions for S3C64XX's type
264	  SPI controllers.
265
266config SAMSUNG_DEV_TS
267	bool
268	help
269	    Common in platform device definitions for touchscreen device
270
271config SAMSUNG_DEV_KEYPAD
272	bool
273	help
274	  Compile in platform device definitions for keypad
275
276config SAMSUNG_DEV_PWM
277	bool
278	default y if ARCH_S3C2410
279	help
280	  Compile in platform device definition for PWM Timer
281
282config S3C24XX_PWM
283	bool "PWM device support"
284	select HAVE_PWM
285	help
286	  Support for exporting the PWM timer blocks via the pwm device
287	  system
288
289# DMA
290
291config S3C_DMA
292	bool
293	help
294	  Internal configuration for S3C DMA core
295
296config S3C_PL330_DMA
297	bool
298	select PL330
299	help
300	  S3C DMA API Driver for PL330 DMAC.
301
302comment "Power management"
303
304config SAMSUNG_PM_DEBUG
305	bool "S3C2410 PM Suspend debug"
306	depends on PM
307	help
308	  Say Y here if you want verbose debugging from the PM Suspend and
309	  Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
310	  for more information.
311
312config S3C_PM_DEBUG_LED_SMDK
313       bool "SMDK LED suspend/resume debugging"
314       depends on PM && (MACH_SMDK6410)
315       help
316         Say Y here to enable the use of the SMDK LEDs on the baseboard
317	 for debugging of the state of the suspend and resume process.
318
319	 Note, this currently only works for S3C64XX based SMDK boards.
320
321config SAMSUNG_PM_CHECK
322	bool "S3C2410 PM Suspend Memory CRC"
323	depends on PM && CRC32
324	help
325	  Enable the PM code's memory area checksum over sleep. This option
326	  will generate CRCs of all blocks of memory, and store them before
327	  going to sleep. The blocks are then checked on resume for any
328	  errors.
329
330	  Note, this can take several seconds depending on memory size
331	  and CPU speed.
332
333	  See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
334
335config SAMSUNG_PM_CHECK_CHUNKSIZE
336	int "S3C2410 PM Suspend CRC Chunksize (KiB)"
337	depends on PM && SAMSUNG_PM_CHECK
338	default 64
339	help
340	  Set the chunksize in Kilobytes of the CRC for checking memory
341	  corruption over suspend and resume. A smaller value will mean that
342	  the CRC data block will take more memory, but wil identify any
343	  faults with better precision.
344
345	  See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
346
347config SAMSUNG_WAKEMASK
348	bool
349	depends on PM
350	help
351	  Compile support for wakeup-mask controls found on the S3C6400
352	  and above. This code allows a set of interrupt to wakeup-mask
353	  mappings. See <plat/wakeup-mask.h>
354
355comment "Power Domain"
356
357config SAMSUNG_PD
358	bool "Samsung Power Domain"
359	depends on PM_RUNTIME
360	help
361	  Say Y here if you want to control Power Domain by Runtime PM.
362
363endif
364