1# SPDX-License-Identifier: GPL-2.0
2config PPC32
3	bool
4	default y if !PPC64
5	select KASAN_VMALLOC if KASAN && MODULES
6
7config PPC64
8	bool "64-bit kernel"
9	select ZLIB_DEFLATE
10	help
11	  This option selects whether a 32-bit or a 64-bit kernel
12	  will be built.
13
14menu "Processor support"
15choice
16	prompt "Processor Type"
17	depends on PPC32
18	help
19	  There are five families of 32 bit PowerPC chips supported.
20	  The most common ones are the desktop and server CPUs (603,
21	  604, 740, 750, 74xx) CPUs from Freescale and IBM, with their
22	  embedded 512x/52xx/82xx/83xx/86xx counterparts.
23	  The other embedded parts, namely 4xx, 8xx and e500
24	  (85xx) each form a family of their own that is not compatible
25	  with the others.
26
27	  If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx.
28
29config PPC_BOOK3S_32
30	bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx"
31	imply PPC_FPU
32	select PPC_HAVE_PMU_SUPPORT
33	select HAVE_ARCH_VMAP_STACK
34
35config PPC_85xx
36	bool "Freescale 85xx"
37	select E500
38
39config PPC_8xx
40	bool "Freescale 8xx"
41	select ARCH_SUPPORTS_HUGETLBFS
42	select FSL_SOC
43	select PPC_KUEP
44	select HAVE_ARCH_VMAP_STACK
45	select HUGETLBFS
46
47config 40x
48	bool "AMCC 40x"
49	select PPC_DCR_NATIVE
50	select PPC_UDBG_16550
51	select 4xx_SOC
52	select HAVE_PCI
53	select PPC_KUEP if PPC_KUAP
54
55config 44x
56	bool "AMCC 44x, 46x or 47x"
57	select PPC_DCR_NATIVE
58	select PPC_UDBG_16550
59	select 4xx_SOC
60	select HAVE_PCI
61	select PHYS_64BIT
62	select PPC_KUEP
63
64endchoice
65
66config PPC_BOOK3S_603
67	bool "Support for 603 SW loaded TLB"
68	depends on PPC_BOOK3S_32
69	default y
70	help
71	  Provide support for processors based on the 603 cores. Those
72	  processors don't have a HASH MMU and provide SW TLB loading.
73
74config PPC_BOOK3S_604
75	bool "Support for 604+ HASH MMU" if PPC_BOOK3S_603
76	depends on PPC_BOOK3S_32
77	default y
78	help
79	  Provide support for processors not based on the 603 cores.
80	  Those processors have a HASH MMU.
81
82choice
83	prompt "Processor Type"
84	depends on PPC64
85	help
86	  There are two families of 64 bit PowerPC chips supported.
87	  The most common ones are the desktop and server CPUs
88	  (POWER5, 970, POWER5+, POWER6, POWER7, POWER8, POWER9 ...)
89
90	  The other are the "embedded" processors compliant with the
91	  "Book 3E" variant of the architecture
92
93config PPC_BOOK3S_64
94	bool "Server processors"
95	select PPC_FPU
96	select PPC_HAVE_PMU_SUPPORT
97	select HAVE_ARCH_TRANSPARENT_HUGEPAGE
98	select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION
99	select ARCH_ENABLE_SPLIT_PMD_PTLOCK
100	select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE
101	select ARCH_SUPPORTS_HUGETLBFS
102	select ARCH_SUPPORTS_NUMA_BALANCING
103	select HAVE_MOVE_PMD
104	select HAVE_MOVE_PUD
105	select IRQ_WORK
106	select PPC_64S_HASH_MMU if !PPC_RADIX_MMU
107	select KASAN_VMALLOC if KASAN
108
109config PPC_BOOK3E_64
110	bool "Embedded processors"
111	select PPC_FSL_BOOK3E
112	select PPC_FPU # Make it a choice ?
113	select PPC_SMP_MUXED_IPI
114	select PPC_DOORBELL
115	select ZONE_DMA
116
117endchoice
118
119choice
120	prompt "CPU selection"
121	default GENERIC_CPU
122	help
123	  This will create a kernel which is optimised for a particular CPU.
124	  The resulting kernel may not run on other CPUs, so use this with care.
125
126	  If unsure, select Generic.
127
128config GENERIC_CPU
129	bool "Generic (POWER4 and above)"
130	depends on PPC64 && !CPU_LITTLE_ENDIAN
131	select PPC_64S_HASH_MMU if PPC_BOOK3S_64
132
133config GENERIC_CPU
134	bool "Generic (POWER8 and above)"
135	depends on PPC64 && CPU_LITTLE_ENDIAN
136	select ARCH_HAS_FAST_MULTIPLIER
137	select PPC_64S_HASH_MMU
138
139config POWERPC_CPU
140	bool "Generic 32 bits powerpc"
141	depends on PPC32 && !PPC_8xx && !PPC_85xx
142
143config CELL_CPU
144	bool "Cell Broadband Engine"
145	depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN
146	select PPC_64S_HASH_MMU
147
148config POWER5_CPU
149	bool "POWER5"
150	depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN
151	select PPC_64S_HASH_MMU
152
153config POWER6_CPU
154	bool "POWER6"
155	depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN
156	select PPC_64S_HASH_MMU
157
158config POWER7_CPU
159	bool "POWER7"
160	depends on PPC_BOOK3S_64
161	select ARCH_HAS_FAST_MULTIPLIER
162	select PPC_64S_HASH_MMU
163
164config POWER8_CPU
165	bool "POWER8"
166	depends on PPC_BOOK3S_64
167	select ARCH_HAS_FAST_MULTIPLIER
168	select PPC_64S_HASH_MMU
169
170config POWER9_CPU
171	bool "POWER9"
172	depends on PPC_BOOK3S_64
173	select ARCH_HAS_FAST_MULTIPLIER
174
175config E5500_CPU
176	bool "Freescale e5500"
177	depends on PPC64 && E500
178
179config E6500_CPU
180	bool "Freescale e6500"
181	depends on PPC64 && E500
182
183config 860_CPU
184	bool "8xx family"
185	depends on PPC_8xx
186
187config E300C2_CPU
188	bool "e300c2 (832x)"
189	depends on PPC_BOOK3S_32
190
191config E300C3_CPU
192	bool "e300c3 (831x)"
193	depends on PPC_BOOK3S_32
194
195config G4_CPU
196	bool "G4 (74xx)"
197	depends on PPC_BOOK3S_32
198	select ALTIVEC
199
200config E500_CPU
201	bool "e500 (8540)"
202	depends on PPC_85xx && !PPC_E500MC
203
204config E500MC_CPU
205	bool "e500mc"
206	depends on PPC_85xx && PPC_E500MC
207
208config TOOLCHAIN_DEFAULT_CPU
209	bool "Rely on the toolchain's implicit default CPU"
210	depends on PPC32
211
212endchoice
213
214config TARGET_CPU_BOOL
215	bool
216	default !GENERIC_CPU && !TOOLCHAIN_DEFAULT_CPU
217
218config TARGET_CPU
219	string
220	depends on TARGET_CPU_BOOL
221	default "cell" if CELL_CPU
222	default "power5" if POWER5_CPU
223	default "power6" if POWER6_CPU
224	default "power7" if POWER7_CPU
225	default "power8" if POWER8_CPU
226	default "power9" if POWER9_CPU
227	default "860" if 860_CPU
228	default "e300c2" if E300C2_CPU
229	default "e300c3" if E300C3_CPU
230	default "G4" if G4_CPU
231	default "8540" if E500_CPU
232	default "e500mc" if E500MC_CPU
233	default "powerpc" if POWERPC_CPU
234
235config PPC_BOOK3S
236	def_bool y
237	depends on PPC_BOOK3S_32 || PPC_BOOK3S_64
238
239config PPC_BOOK3E
240	def_bool y
241	depends on PPC_BOOK3E_64
242
243config E500
244	select FSL_EMB_PERFMON
245	select PPC_FSL_BOOK3E
246	bool
247
248config PPC_E500MC
249	bool "e500mc Support"
250	select PPC_FPU
251	select COMMON_CLK
252	depends on E500
253	help
254	  This must be enabled for running on e500mc (and derivatives
255	  such as e5500/e6500), and must be disabled for running on
256	  e500v1 or e500v2.
257
258config PPC_FPU_REGS
259	bool
260
261config PPC_FPU
262	bool "Support for Floating Point Unit (FPU)" if PPC_MPC832x
263	default y if PPC64
264	select PPC_FPU_REGS
265	help
266	  This must be enabled to support the Floating Point Unit
267	  Most 6xx have an FPU but e300c2 core (mpc832x) don't have
268	  an FPU, so when building an embedded kernel for that target
269	  you can disable FPU support.
270
271	  If unsure say Y.
272
273config FSL_EMB_PERFMON
274	bool "Freescale Embedded Perfmon"
275	depends on E500 || PPC_83xx
276	help
277	  This is the Performance Monitor support found on the e500 core
278	  and some e300 cores (c3 and c4).  Select this only if your
279	  core supports the Embedded Performance Monitor APU
280
281config FSL_EMB_PERF_EVENT
282	bool
283	depends on FSL_EMB_PERFMON && PERF_EVENTS && !PPC_PERF_CTRS
284	default y
285
286config FSL_EMB_PERF_EVENT_E500
287	bool
288	depends on FSL_EMB_PERF_EVENT && E500
289	default y
290
291config 4xx
292	bool
293	depends on 40x || 44x
294	default y
295
296config BOOKE
297	bool
298	depends on E500 || 44x || PPC_BOOK3E
299	default y
300
301config BOOKE_OR_40x
302	bool
303	depends on BOOKE || 40x
304	default y
305
306config FSL_BOOKE
307	bool
308	depends on E500 && PPC32
309	default y
310
311# this is for common code between PPC32 & PPC64 FSL BOOKE
312config PPC_FSL_BOOK3E
313	bool
314	select ARCH_SUPPORTS_HUGETLBFS if PHYS_64BIT || PPC64
315	imply FSL_EMB_PERFMON
316	select PPC_SMP_MUXED_IPI
317	select PPC_DOORBELL
318	select PPC_KUEP
319	default y if FSL_BOOKE
320
321config PTE_64BIT
322	bool
323	depends on 44x || E500 || PPC_86xx
324	default y if PHYS_64BIT
325
326config PHYS_64BIT
327	bool 'Large physical address support' if E500 || PPC_86xx
328	depends on (44x || E500 || PPC_86xx) && !PPC_83xx && !PPC_82xx
329	select PHYS_ADDR_T_64BIT
330	help
331	  This option enables kernel support for larger than 32-bit physical
332	  addresses.  This feature may not be available on all cores.
333
334	  If you have more than 3.5GB of RAM or so, you also need to enable
335	  SWIOTLB under Kernel Options for this to work.  The actual number
336	  is platform-dependent.
337
338	  If in doubt, say N here.
339
340config ALTIVEC
341	bool "AltiVec Support"
342	depends on PPC_BOOK3S_32 || PPC_BOOK3S_64 || (PPC_E500MC && PPC64)
343	select PPC_FPU
344	help
345	  This option enables kernel support for the Altivec extensions to the
346	  PowerPC processor. The kernel currently supports saving and restoring
347	  altivec registers, and turning on the 'altivec enable' bit so user
348	  processes can execute altivec instructions.
349
350	  This option is only usefully if you have a processor that supports
351	  altivec (G4, otherwise known as 74xx series), but does not have
352	  any affect on a non-altivec cpu (it does, however add code to the
353	  kernel).
354
355	  If in doubt, say Y here.
356
357config VSX
358	bool "VSX Support"
359	depends on PPC_BOOK3S_64 && ALTIVEC && PPC_FPU
360	help
361
362	  This option enables kernel support for the Vector Scaler extensions
363	  to the PowerPC processor. The kernel currently supports saving and
364	  restoring VSX registers, and turning on the 'VSX enable' bit so user
365	  processes can execute VSX instructions.
366
367	  This option is only useful if you have a processor that supports
368	  VSX (P7 and above), but does not have any affect on a non-VSX
369	  CPUs (it does, however add code to the kernel).
370
371	  If in doubt, say Y here.
372
373config SPE_POSSIBLE
374	def_bool y
375	depends on E500 && !PPC_E500MC
376
377config SPE
378	bool "SPE Support"
379	depends on SPE_POSSIBLE
380	default y
381	help
382	  This option enables kernel support for the Signal Processing
383	  Extensions (SPE) to the PowerPC processor. The kernel currently
384	  supports saving and restoring SPE registers, and turning on the
385	  'spe enable' bit so user processes can execute SPE instructions.
386
387	  This option is only useful if you have a processor that supports
388	  SPE (e500, otherwise known as 85xx series), but does not have any
389	  effect on a non-spe cpu (it does, however add code to the kernel).
390
391	  If in doubt, say Y here.
392
393config PPC_64S_HASH_MMU
394	bool "Hash MMU Support"
395	depends on PPC_BOOK3S_64
396	default y
397	help
398	  Enable support for the Power ISA Hash style MMU. This is implemented
399	  by all IBM Power and other 64-bit Book3S CPUs before ISA v3.0. The
400	  OpenPOWER ISA does not mandate the hash MMU and some CPUs do not
401	  implement it (e.g., Microwatt).
402
403	  Note that POWER9 PowerVM platforms only support the hash
404	  MMU. From POWER10 radix is also supported by PowerVM.
405
406	  If you're unsure, say Y.
407
408config PPC_RADIX_MMU
409	bool "Radix MMU Support"
410	depends on PPC_BOOK3S_64
411	select ARCH_HAS_GIGANTIC_PAGE
412	default y
413	help
414	  Enable support for the Power ISA 3.0 Radix style MMU. Currently this
415	  is only implemented by IBM Power9 CPUs, if you don't have one of them
416	  you can probably disable this.
417
418config PPC_RADIX_MMU_DEFAULT
419	bool "Default to using the Radix MMU when possible" if PPC_64S_HASH_MMU
420	depends on PPC_BOOK3S_64
421	depends on PPC_RADIX_MMU
422	default y
423	help
424	  When the hardware supports the Radix MMU, default to using it unless
425	  "disable_radix[=yes]" is specified on the kernel command line.
426
427	  If this option is disabled, the Hash MMU will be used by default,
428	  unless "disable_radix=no" is specified on the kernel command line.
429
430	  If you're unsure, say Y.
431
432config PPC_KUEP
433	bool "Kernel Userspace Execution Prevention" if !40x
434	default y if !40x
435	help
436	  Enable support for Kernel Userspace Execution Prevention (KUEP)
437
438	  If you're unsure, say Y.
439
440config PPC_KUAP
441	bool "Kernel Userspace Access Protection"
442	default y
443	help
444	  Enable support for Kernel Userspace Access Protection (KUAP)
445
446	  If you're unsure, say Y.
447
448config PPC_KUAP_DEBUG
449	bool "Extra debugging for Kernel Userspace Access Protection"
450	depends on PPC_KUAP
451	help
452	  Add extra debugging for Kernel Userspace Access Protection (KUAP)
453	  If you're unsure, say N.
454
455config PPC_PKEY
456	def_bool y
457	depends on PPC_BOOK3S_64
458	depends on PPC_MEM_KEYS || PPC_KUAP || PPC_KUEP
459
460
461config PPC_MMU_NOHASH
462	def_bool y
463	depends on !PPC_BOOK3S
464
465config PPC_BOOK3E_MMU
466	def_bool y
467	depends on FSL_BOOKE || PPC_BOOK3E
468
469config PPC_HAVE_PMU_SUPPORT
470	bool
471
472config PMU_SYSFS
473	bool "Create PMU SPRs sysfs file"
474	default n
475	help
476	  This option enables sysfs file creation for PMU SPRs like MMCR* and PMC*.
477
478config PPC_PERF_CTRS
479	def_bool y
480	depends on PERF_EVENTS && PPC_HAVE_PMU_SUPPORT
481	help
482	 This enables the powerpc-specific perf_event back-end.
483
484config FORCE_SMP
485	# Allow platforms to force SMP=y by selecting this
486	bool
487	select SMP
488
489config SMP
490	depends on PPC_BOOK3S || PPC_BOOK3E || FSL_BOOKE || PPC_47x
491	select GENERIC_IRQ_MIGRATION
492	bool "Symmetric multi-processing support" if !FORCE_SMP
493	help
494	  This enables support for systems with more than one CPU. If you have
495	  a system with only one CPU, say N. If you have a system with more
496	  than one CPU, say Y.  Note that the kernel does not currently
497	  support SMP machines with 603/603e/603ev or PPC750 ("G3") processors
498	  since they have inadequate hardware support for multiprocessor
499	  operation.
500
501	  If you say N here, the kernel will run on single and multiprocessor
502	  machines, but will use only one CPU of a multiprocessor machine. If
503	  you say Y here, the kernel will run on single-processor machines.
504	  On a single-processor machine, the kernel will run faster if you say
505	  N here.
506
507	  If you don't know what to do here, say N.
508
509config NR_CPUS
510	int "Maximum number of CPUs (2-8192)" if SMP
511	range 2 8192 if SMP
512	default "1" if !SMP
513	default "32" if PPC64
514	default "4"
515
516config NOT_COHERENT_CACHE
517	bool
518	depends on 4xx || PPC_8xx || PPC_MPC512x || \
519		GAMECUBE_COMMON || AMIGAONE
520	select ARCH_HAS_DMA_PREP_COHERENT
521	select ARCH_HAS_SYNC_DMA_FOR_DEVICE
522	select ARCH_HAS_SYNC_DMA_FOR_CPU
523	select DMA_DIRECT_REMAP
524	default n if PPC_47x
525	default y
526
527config CHECK_CACHE_COHERENCY
528	bool
529
530config PPC_DOORBELL
531	bool
532
533endmenu
534
535config VDSO32
536	def_bool y
537	depends on PPC32 || COMPAT
538	help
539	  This symbol controls whether we build the 32-bit VDSO. We obviously
540	  want to do that if we're building a 32-bit kernel. If we're building
541	  a 64-bit kernel then we only want a 32-bit VDSO if we're also enabling
542	  COMPAT.
543
544choice
545	prompt "Endianness selection"
546	default CPU_BIG_ENDIAN
547	help
548	  This option selects whether a big endian or little endian kernel will
549	  be built.
550
551config CPU_BIG_ENDIAN
552	bool "Build big endian kernel"
553	help
554	  Build a big endian kernel.
555
556	  If unsure, select this option.
557
558config CPU_LITTLE_ENDIAN
559	bool "Build little endian kernel"
560	depends on PPC_BOOK3S_64
561	select PPC64_BOOT_WRAPPER
562	help
563	  Build a little endian kernel.
564
565	  Note that if cross compiling a little endian kernel,
566	  CROSS_COMPILE must point to a toolchain capable of targeting
567	  little endian powerpc.
568
569endchoice
570
571config PPC64_ELF_ABI_V1
572	def_bool PPC64 && CPU_BIG_ENDIAN
573
574config PPC64_ELF_ABI_V2
575	def_bool PPC64 && CPU_LITTLE_ENDIAN
576
577config PPC64_BOOT_WRAPPER
578	def_bool n
579	depends on CPU_LITTLE_ENDIAN
580