1if ARCH_MXC 2 3source "arch/arm/plat-mxc/devices/Kconfig" 4 5menu "Freescale MXC Implementations" 6 7choice 8 prompt "Freescale CPU family:" 9 default ARCH_MX3 10 11config ARCH_MX1 12 bool "MX1-based" 13 select SOC_IMX1 14 help 15 This enables support for systems based on the Freescale i.MX1 family 16 17config ARCH_MX2 18 bool "MX2-based" 19 help 20 This enables support for systems based on the Freescale i.MX2 family 21 22config ARCH_MX25 23 bool "MX25-based" 24 help 25 This enables support for systems based on the Freescale i.MX25 family 26 27config ARCH_MX3 28 bool "MX3-based" 29 select CPU_V6 30 help 31 This enables support for systems based on the Freescale i.MX3 family 32 33config ARCH_MXC91231 34 bool "MXC91231-based" 35 select CPU_V6 36 select MXC_AVIC 37 help 38 This enables support for systems based on the Freescale MXC91231 family 39 40config ARCH_MX5 41 bool "MX5-based" 42 select CPU_V7 43 select ARM_L1_CACHE_SHIFT_6 44 help 45 This enables support for systems based on the Freescale i.MX51 family 46 47endchoice 48 49source "arch/arm/mach-imx/Kconfig" 50source "arch/arm/mach-mx3/Kconfig" 51source "arch/arm/mach-mxc91231/Kconfig" 52source "arch/arm/mach-mx5/Kconfig" 53 54endmenu 55 56config MXC_IRQ_PRIOR 57 bool "Use IRQ priority" 58 help 59 Select this if you want to use prioritized IRQ handling. 60 This feature prevents higher priority ISR to be interrupted 61 by lower priority IRQ even IRQF_DISABLED flag is not set. 62 This may be useful in embedded applications, where are strong 63 requirements for timing. 64 Say N here, unless you have a specialized requirement. 65 66config MXC_TZIC 67 bool 68 69config MXC_AVIC 70 bool 71 72config MXC_PWM 73 tristate "Enable PWM driver" 74 select HAVE_PWM 75 help 76 Enable support for the i.MX PWM controller(s). 77 78config MXC_DEBUG_BOARD 79 bool "Enable MXC debug board(for 3-stack)" 80 help 81 The debug board is an integral part of the MXC 3-stack(PDK) 82 platforms, it can be attached or removed from the peripheral 83 board. On debug board, several debug devices(ethernet, UART, 84 buttons, LEDs and JTAG) are implemented. Between the MCU and 85 these devices, a CPLD is added as a bridge which performs 86 data/address de-multiplexing and decode, signal level shift, 87 interrupt control and various board functions. 88 89config HAVE_EPIT 90 bool 91 92config MXC_USE_EPIT 93 bool "Use EPIT instead of GPT" 94 depends on HAVE_EPIT 95 help 96 Use EPIT as the system timer on systems that have it. Normally you 97 don't have a reason to do so as the EPIT has the same features and 98 uses the same clocks as the GPT. Anyway, on some systems the GPT 99 may be in use for other purposes. 100 101config MXC_ULPI 102 bool 103 104config ARCH_HAS_RNGA 105 bool 106 107config IMX_HAVE_IOMUX_V1 108 bool 109 110config ARCH_MXC_IOMUX_V3 111 bool 112 113config ARCH_MXC_AUDMUX_V1 114 bool 115 116config ARCH_MXC_AUDMUX_V2 117 bool 118 119config IRAM_ALLOC 120 bool 121 select GENERIC_ALLOCATOR 122 123endif 124