1config FRV
2	bool
3	default y
4	select HAVE_IDE
5	select HAVE_ARCH_TRACEHOOK
6	select HAVE_IRQ_WORK
7	select HAVE_PERF_EVENTS
8	select HAVE_GENERIC_HARDIRQS
9	select GENERIC_IRQ_SHOW
10	select ARCH_HAVE_NMI_SAFE_CMPXCHG
11	select GENERIC_CPU_DEVICES
12
13config ZONE_DMA
14	bool
15	default y
16
17config RWSEM_GENERIC_SPINLOCK
18	bool
19	default y
20
21config RWSEM_XCHGADD_ALGORITHM
22	bool
23
24config GENERIC_HWEIGHT
25	bool
26	default y
27
28config GENERIC_CALIBRATE_DELAY
29	bool
30	default n
31
32config TIME_LOW_RES
33	bool
34	default y
35
36config QUICKLIST
37	bool
38	default y
39
40config ARCH_HAS_ILOG2_U32
41	bool
42	default y
43
44config ARCH_HAS_ILOG2_U64
45	bool
46	default y
47
48config HZ
49	int
50	default 1000
51
52source "init/Kconfig"
53
54source "kernel/Kconfig.freezer"
55
56
57menu "Fujitsu FR-V system setup"
58
59config MMU
60	bool "MMU support"
61	help
62	  This options switches on and off support for the FR-V MMU
63	  (effectively switching between vmlinux and uClinux). Not all FR-V
64	  CPUs support this. Currently only the FR451 has a sufficiently
65	  featured MMU.
66
67config FRV_OUTOFLINE_ATOMIC_OPS
68	bool "Out-of-line the FRV atomic operations"
69	default n
70	help
71	  Setting this option causes the FR-V atomic operations to be mostly
72	  implemented out-of-line.
73
74	  See Documentation/frv/atomic-ops.txt for more information.
75
76config HIGHMEM
77	bool "High memory support"
78	depends on MMU
79	default y
80	help
81	  If you wish to use more than 256MB of memory with your MMU based
82	  system, you will need to select this option. The kernel can only see
83	  the memory between 0xC0000000 and 0xD0000000 directly... everything
84	  else must be kmapped.
85
86	  The arch is, however, capable of supporting up to 3GB of SDRAM.
87
88config HIGHPTE
89	bool "Allocate page tables in highmem"
90	depends on HIGHMEM
91	default y
92	help
93	  The VM uses one page of memory for each page table.  For systems
94	  with a lot of RAM, this can be wasteful of precious low memory.
95	  Setting this option will put user-space page tables in high memory.
96
97source "mm/Kconfig"
98
99choice
100	prompt "uClinux kernel load address"
101	depends on !MMU
102	default UCPAGE_OFFSET_C0000000
103	help
104	  This option sets the base address for the uClinux kernel. The kernel
105	  will rearrange the SDRAM layout to start at this address, and move
106	  itself to start there. It must be greater than 0, and it must be
107	  sufficiently less than 0xE0000000 that the SDRAM does not intersect
108	  the I/O region.
109
110	  The base address must also be aligned such that the SDRAM controller
111	  can decode it. For instance, a 512MB SDRAM bank must be 512MB aligned.
112
113config UCPAGE_OFFSET_20000000
114       bool "0x20000000"
115
116config UCPAGE_OFFSET_40000000
117       bool "0x40000000"
118
119config UCPAGE_OFFSET_60000000
120       bool "0x60000000"
121
122config UCPAGE_OFFSET_80000000
123       bool "0x80000000"
124
125config UCPAGE_OFFSET_A0000000
126       bool "0xA0000000"
127
128config UCPAGE_OFFSET_C0000000
129       bool "0xC0000000 (Recommended)"
130
131endchoice
132
133config PAGE_OFFSET
134	hex
135	default 0x20000000 if UCPAGE_OFFSET_20000000
136	default 0x40000000 if UCPAGE_OFFSET_40000000
137	default 0x60000000 if UCPAGE_OFFSET_60000000
138	default 0x80000000 if UCPAGE_OFFSET_80000000
139	default 0xA0000000 if UCPAGE_OFFSET_A0000000
140	default 0xC0000000
141
142config PROTECT_KERNEL
143	bool "Protect core kernel against userspace"
144	depends on !MMU
145	default y
146	help
147	  Selecting this option causes the uClinux kernel to change the
148	  permittivity of DAMPR register covering the core kernel image to
149	  prevent userspace accessing the underlying memory directly.
150
151choice
152	prompt "CPU Caching mode"
153	default FRV_DEFL_CACHE_WBACK
154	help
155	  This option determines the default caching mode for the kernel.
156
157	  Write-Back caching mode involves the all reads and writes causing
158	  the affected cacheline to be read into the cache first before being
159	  operated upon. Memory is not then updated by a write until the cache
160	  is filled and a cacheline needs to be displaced from the cache to
161	  make room. Only at that point is it written back.
162
163	  Write-Behind caching is similar to Write-Back caching, except that a
164	  write won't fetch a cacheline into the cache if there isn't already
165	  one there; it will write directly to memory instead.
166
167	  Write-Through caching only fetches cachelines from memory on a
168	  read. Writes always get written directly to memory. If the affected
169	  cacheline is also in cache, it will be updated too.
170
171	  The final option is to turn of caching entirely.
172
173	  Note that not all CPUs support Write-Behind caching. If the CPU on
174	  which the kernel is running doesn't, it'll fall back to Write-Back
175	  caching.
176
177config FRV_DEFL_CACHE_WBACK
178	bool "Write-Back"
179
180config FRV_DEFL_CACHE_WBEHIND
181	bool "Write-Behind"
182
183config FRV_DEFL_CACHE_WTHRU
184	bool "Write-Through"
185
186config FRV_DEFL_CACHE_DISABLED
187	bool "Disabled"
188
189endchoice
190
191menu "CPU core support"
192
193config CPU_FR401
194	bool "Include FR401 core support"
195	depends on !MMU
196	default y
197	help
198	  This enables support for the FR401, FR401A and FR403 CPUs
199
200config CPU_FR405
201	bool "Include FR405 core support"
202	depends on !MMU
203	default y
204	help
205	  This enables support for the FR405 CPU
206
207config CPU_FR451
208	bool "Include FR451 core support"
209	default y
210	help
211	  This enables support for the FR451 CPU
212
213config CPU_FR451_COMPILE
214	bool "Specifically compile for FR451 core"
215	depends on CPU_FR451 && !CPU_FR401 && !CPU_FR405 && !CPU_FR551
216	default y
217	help
218	  This causes appropriate flags to be passed to the compiler to
219	  optimise for the FR451 CPU
220
221config CPU_FR551
222	bool "Include FR551 core support"
223	depends on !MMU
224	default y
225	help
226	  This enables support for the FR555 CPU
227
228config CPU_FR551_COMPILE
229	bool "Specifically compile for FR551 core"
230	depends on CPU_FR551 && !CPU_FR401 && !CPU_FR405 && !CPU_FR451
231	default y
232	help
233	  This causes appropriate flags to be passed to the compiler to
234	  optimise for the FR555 CPU
235
236config FRV_L1_CACHE_SHIFT
237	int
238	default "5" if CPU_FR401 || CPU_FR405 || CPU_FR451
239	default "6" if CPU_FR551
240
241endmenu
242
243choice
244	prompt "System support"
245	default MB93091_VDK
246
247config MB93091_VDK
248	bool "MB93091 CPU board with or without motherboard"
249
250config MB93093_PDK
251	bool "MB93093 PDK unit"
252
253endchoice
254
255if MB93091_VDK
256choice
257	prompt "Motherboard support"
258	default MB93090_MB00
259
260config MB93090_MB00
261	bool "Use the MB93090-MB00 motherboard"
262	help
263	  Select this option if the MB93091 CPU board is going to be used with
264	  a MB93090-MB00 VDK motherboard
265
266config MB93091_NO_MB
267	bool "Use standalone"
268	help
269	  Select this option if the MB93091 CPU board is going to be used
270	  without a motherboard
271
272endchoice
273endif
274
275config FUJITSU_MB93493
276	bool "MB93493 Multimedia chip"
277	help
278	  Select this option if the MB93493 multimedia chip is going to be
279	  used.
280
281choice
282	prompt "GP-Relative data support"
283	default GPREL_DATA_8
284	help
285	  This option controls what data, if any, should be placed in the GP
286	  relative data sections. Using this means that the compiler can
287	  generate accesses to the data using GR16-relative addressing which
288	  is faster than absolute instructions and saves space (2 instructions
289	  per access).
290
291	  However, the GPREL region is limited in size because the immediate
292	  value used in the load and store instructions is limited to a 12-bit
293	  signed number.
294
295	  So if the linker starts complaining that accesses to GPREL data are
296	  out of range, try changing this option from the default.
297
298	  Note that modules will always be compiled with this feature disabled
299	  as the module data will not be in range of the GP base address.
300
301config GPREL_DATA_8
302	bool "Put data objects of up to 8 bytes into GP-REL"
303
304config GPREL_DATA_4
305	bool "Put data objects of up to 4 bytes into GP-REL"
306
307config GPREL_DATA_NONE
308	bool "Don't use GP-REL"
309
310endchoice
311
312config FRV_ONCPU_SERIAL
313	bool "Use on-CPU serial ports"
314	select SERIAL_8250
315	default y
316
317config PCI
318	bool "Use PCI"
319	depends on MB93090_MB00
320	default y
321	select GENERIC_PCI_IOMAP
322	help
323	  Some FR-V systems (such as the MB93090-MB00 VDK) have PCI
324	  onboard. If you have one of these boards and you wish to use the PCI
325	  facilities, say Y here.
326
327config RESERVE_DMA_COHERENT
328	bool "Reserve DMA coherent memory"
329	depends on PCI && !MMU
330	default y
331	help
332	  Many PCI drivers require access to uncached memory for DMA device
333	  communications (such as is done with some Ethernet buffer rings). If
334	  a fully featured MMU is available, this can be done through page
335	  table settings, but if not, a region has to be set aside and marked
336	  with a special DAMPR register.
337
338	  Setting this option causes uClinux to set aside a portion of the
339	  available memory for use in this manner. The memory will then be
340	  unavailable for normal kernel use.
341
342source "drivers/pci/Kconfig"
343
344source "drivers/pcmcia/Kconfig"
345
346menu "Power management options"
347
348config ARCH_SUSPEND_POSSIBLE
349	def_bool y
350
351source kernel/power/Kconfig
352endmenu
353
354endmenu
355
356
357menu "Executable formats"
358
359source "fs/Kconfig.binfmt"
360
361endmenu
362
363source "net/Kconfig"
364
365source "drivers/Kconfig"
366
367source "fs/Kconfig"
368
369source "arch/frv/Kconfig.debug"
370
371source "security/Kconfig"
372
373source "crypto/Kconfig"
374
375source "lib/Kconfig"
376