1# SPDX-License-Identifier: MIT 2menu "Display Engine Configuration" 3 depends on DRM && DRM_AMDGPU 4 5config DRM_AMD_DC 6 bool "AMD DC - Enable new display engine" 7 default y 8 depends on BROKEN || !CC_IS_CLANG || X86_64 || SPARC64 || ARM64 9 select SND_HDA_COMPONENT if SND_HDA_CORE 10 select DRM_AMD_DC_DCN if (X86 || PPC_LONG_DOUBLE_128) 11 help 12 Choose this option if you want to use the new display engine 13 support for AMDGPU. This adds required support for Vega and 14 Raven ASICs. 15 16 calculate_bandwidth() is presently broken on all !(X86_64 || SPARC64 || ARM64) 17 architectures built with Clang (all released versions), whereby the stack 18 frame gets blown up to well over 5k. This would cause an immediate kernel 19 panic on most architectures. We'll revert this when the following bug report 20 has been resolved: https://github.com/llvm/llvm-project/issues/41896. 21 22config DRM_AMD_DC_DCN 23 def_bool n 24 help 25 Raven, Navi, and newer family support for display engine 26 27config DRM_AMD_DC_HDCP 28 bool "Enable HDCP support in DC" 29 depends on DRM_AMD_DC 30 select DRM_DISPLAY_HDCP_HELPER 31 help 32 Choose this option if you want to support HDCP authentication. 33 34config DRM_AMD_DC_SI 35 bool "AMD DC support for Southern Islands ASICs" 36 depends on DRM_AMDGPU_SI 37 depends on DRM_AMD_DC 38 help 39 Choose this option to enable new AMD DC support for SI asics 40 by default. This includes Tahiti, Pitcairn, Cape Verde, Oland. 41 Hainan is not supported by AMD DC and it has no physical DCE6. 42 43config DEBUG_KERNEL_DC 44 bool "Enable kgdb break in DC" 45 depends on DRM_AMD_DC 46 depends on KGDB 47 help 48 Choose this option if you want to hit kdgb_break in assert. 49 50config DRM_AMD_SECURE_DISPLAY 51 bool "Enable secure display support" 52 depends on DEBUG_FS 53 depends on DRM_AMD_DC_DCN 54 help 55 Choose this option if you want to 56 support secure display 57 58 This option enables the calculation 59 of crc of specific region via debugfs. 60 Cooperate with specific DMCU FW. 61 62 63endmenu 64