1menu "Platform support"
2
3source "arch/powerpc/platforms/powernv/Kconfig"
4source "arch/powerpc/platforms/pseries/Kconfig"
5source "arch/powerpc/platforms/chrp/Kconfig"
6source "arch/powerpc/platforms/512x/Kconfig"
7source "arch/powerpc/platforms/52xx/Kconfig"
8source "arch/powerpc/platforms/powermac/Kconfig"
9source "arch/powerpc/platforms/prep/Kconfig"
10source "arch/powerpc/platforms/maple/Kconfig"
11source "arch/powerpc/platforms/pasemi/Kconfig"
12source "arch/powerpc/platforms/ps3/Kconfig"
13source "arch/powerpc/platforms/cell/Kconfig"
14source "arch/powerpc/platforms/8xx/Kconfig"
15source "arch/powerpc/platforms/82xx/Kconfig"
16source "arch/powerpc/platforms/83xx/Kconfig"
17source "arch/powerpc/platforms/85xx/Kconfig"
18source "arch/powerpc/platforms/86xx/Kconfig"
19source "arch/powerpc/platforms/embedded6xx/Kconfig"
20source "arch/powerpc/platforms/44x/Kconfig"
21source "arch/powerpc/platforms/40x/Kconfig"
22source "arch/powerpc/platforms/amigaone/Kconfig"
23source "arch/powerpc/platforms/wsp/Kconfig"
24
25config KVM_GUEST
26	bool "KVM Guest support"
27	default n
28	---help---
29	  This option enables various optimizations for running under the KVM
30	  hypervisor. Overhead for the kernel when not running inside KVM should
31	  be minimal.
32
33	  In case of doubt, say Y
34
35config PPC_NATIVE
36	bool
37	depends on 6xx || PPC64
38	help
39	  Support for running natively on the hardware, i.e. without
40	  a hypervisor. This option is not user-selectable but should
41	  be selected by all platforms that need it.
42
43config PPC_OF_BOOT_TRAMPOLINE
44	bool "Support booting from Open Firmware or yaboot"
45	depends on 6xx || PPC64
46	default y
47	help
48	  Support from booting from Open Firmware or yaboot using an
49	  Open Firmware client interface. This enables the kernel to
50	  communicate with open firmware to retrieve system information
51	  such as the device tree.
52
53	  In case of doubt, say Y
54
55config UDBG_RTAS_CONSOLE
56	bool "RTAS based debug console"
57	depends on PPC_RTAS
58	default n
59
60config PPC_SMP_MUXED_IPI
61	bool
62	help
63	  Select this opton if your platform supports SMP and your
64	  interrupt controller provides less than 4 interrupts to each
65	  cpu.	This will enable the generic code to multiplex the 4
66	  messages on to one ipi.
67
68config PPC_UDBG_BEAT
69	bool "BEAT based debug console"
70	depends on PPC_CELLEB
71	default n
72
73config IPIC
74	bool
75	default n
76
77config MPIC
78	bool
79	default n
80
81config PPC_EPAPR_HV_PIC
82	bool
83	default n
84
85config MPIC_WEIRD
86	bool
87	default n
88
89config MPIC_MSGR
90	bool "MPIC message register support"
91	depends on MPIC
92	default n
93	help
94	  Enables support for the MPIC message registers.  These
95	  registers are used for inter-processor communication.
96
97config PPC_I8259
98	bool
99	default n
100
101config U3_DART
102	bool
103	depends on PPC64
104	default n
105
106config PPC_RTAS
107	bool
108	default n
109
110config RTAS_ERROR_LOGGING
111	bool
112	depends on PPC_RTAS
113	default n
114
115config PPC_RTAS_DAEMON
116	bool
117	depends on PPC_RTAS
118	default n
119
120config RTAS_PROC
121	bool "Proc interface to RTAS"
122	depends on PPC_RTAS
123	default y
124
125config RTAS_FLASH
126	tristate "Firmware flash interface"
127	depends on PPC64 && RTAS_PROC
128
129config MMIO_NVRAM
130	bool
131	default n
132
133config MPIC_U3_HT_IRQS
134	bool
135	default n
136
137config MPIC_BROKEN_REGREAD
138	bool
139	depends on MPIC
140	help
141	  This option enables a MPIC driver workaround for some chips
142	  that have a bug that causes some interrupt source information
143	  to not read back properly. It is safe to use on other chips as
144	  well, but enabling it uses about 8KB of memory to keep copies
145	  of the register contents in software.
146
147config IBMVIO
148	depends on PPC_PSERIES
149	bool
150	default y
151
152config IBMEBUS
153	depends on PPC_PSERIES
154	bool "Support for GX bus based adapters"
155	help
156	  Bus device driver for GX bus based adapters.
157
158config PPC_MPC106
159	bool
160	default n
161
162config PPC_970_NAP
163	bool
164	default n
165
166config PPC_P7_NAP
167	bool
168	default n
169
170config PPC_INDIRECT_IO
171	bool
172	select GENERIC_IOMAP
173
174config PPC_INDIRECT_PIO
175	bool
176	select PPC_INDIRECT_IO
177
178config PPC_INDIRECT_MMIO
179	bool
180	select PPC_INDIRECT_IO
181
182config PPC_IO_WORKAROUNDS
183	bool
184
185source "drivers/cpufreq/Kconfig"
186
187menu "CPU Frequency drivers"
188	depends on CPU_FREQ
189
190config CPU_FREQ_PMAC
191	bool "Support for Apple PowerBooks"
192	depends on ADB_PMU && PPC32
193	select CPU_FREQ_TABLE
194	help
195	  This adds support for frequency switching on Apple PowerBooks,
196	  this currently includes some models of iBook & Titanium
197	  PowerBook.
198
199config CPU_FREQ_PMAC64
200	bool "Support for some Apple G5s"
201	depends on PPC_PMAC && PPC64
202	select CPU_FREQ_TABLE
203	help
204	  This adds support for frequency switching on Apple iMac G5,
205	  and some of the more recent desktop G5 machines as well.
206
207config PPC_PASEMI_CPUFREQ
208	bool "Support for PA Semi PWRficient"
209	depends on PPC_PASEMI
210	default y
211	select CPU_FREQ_TABLE
212	help
213	  This adds the support for frequency switching on PA Semi
214	  PWRficient processors.
215
216endmenu
217
218menu "CPUIdle driver"
219
220source "drivers/cpuidle/Kconfig"
221
222endmenu
223
224config PPC601_SYNC_FIX
225	bool "Workarounds for PPC601 bugs"
226	depends on 6xx && (PPC_PREP || PPC_PMAC)
227	help
228	  Some versions of the PPC601 (the first PowerPC chip) have bugs which
229	  mean that extra synchronization instructions are required near
230	  certain instructions, typically those that make major changes to the
231	  CPU state.  These extra instructions reduce performance slightly.
232	  If you say N here, these extra instructions will not be included,
233	  resulting in a kernel which will run faster but may not run at all
234	  on some systems with the PPC601 chip.
235
236	  If in doubt, say Y here.
237
238config TAU
239	bool "On-chip CPU temperature sensor support"
240	depends on 6xx
241	help
242	  G3 and G4 processors have an on-chip temperature sensor called the
243	  'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
244	  temperature within 2-4 degrees Celsius. This option shows the current
245	  on-die temperature in /proc/cpuinfo if the cpu supports it.
246
247	  Unfortunately, on some chip revisions, this sensor is very inaccurate
248	  and in many cases, does not work at all, so don't assume the cpu
249	  temp is actually what /proc/cpuinfo says it is.
250
251config TAU_INT
252	bool "Interrupt driven TAU driver (DANGEROUS)"
253	depends on TAU
254	---help---
255	  The TAU supports an interrupt driven mode which causes an interrupt
256	  whenever the temperature goes out of range. This is the fastest way
257	  to get notified the temp has exceeded a range. With this option off,
258	  a timer is used to re-check the temperature periodically.
259
260	  However, on some cpus it appears that the TAU interrupt hardware
261	  is buggy and can cause a situation which would lead unexplained hard
262	  lockups.
263
264	  Unless you are extending the TAU driver, or enjoy kernel/hardware
265	  debugging, leave this option off.
266
267config TAU_AVERAGE
268	bool "Average high and low temp"
269	depends on TAU
270	---help---
271	  The TAU hardware can compare the temperature to an upper and lower
272	  bound.  The default behavior is to show both the upper and lower
273	  bound in /proc/cpuinfo. If the range is large, the temperature is
274	  either changing a lot, or the TAU hardware is broken (likely on some
275	  G4's). If the range is small (around 4 degrees), the temperature is
276	  relatively stable.  If you say Y here, a single temperature value,
277	  halfway between the upper and lower bounds, will be reported in
278	  /proc/cpuinfo.
279
280	  If in doubt, say N here.
281
282config QUICC_ENGINE
283	bool "Freescale QUICC Engine (QE) Support"
284	depends on FSL_SOC && PPC32
285	select PPC_LIB_RHEAP
286	select CRC32
287	help
288	  The QUICC Engine (QE) is a new generation of communications
289	  coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
290	  Selecting this option means that you wish to build a kernel
291	  for a machine with a QE coprocessor.
292
293config QE_GPIO
294	bool "QE GPIO support"
295	depends on QUICC_ENGINE
296	select GENERIC_GPIO
297	select ARCH_REQUIRE_GPIOLIB
298	help
299	  Say Y here if you're going to use hardware that connects to the
300	  QE GPIOs.
301
302config CPM2
303	bool "Enable support for the CPM2 (Communications Processor Module)"
304	depends on (FSL_SOC_BOOKE && PPC32) || 8260
305	select CPM
306	select PPC_LIB_RHEAP
307	select PPC_PCI_CHOICE
308	select ARCH_REQUIRE_GPIOLIB
309	select GENERIC_GPIO
310	help
311	  The CPM2 (Communications Processor Module) is a coprocessor on
312	  embedded CPUs made by Freescale.  Selecting this option means that
313	  you wish to build a kernel for a machine with a CPM2 coprocessor
314	  on it (826x, 827x, 8560).
315
316config AXON_RAM
317	tristate "Axon DDR2 memory device driver"
318	depends on PPC_IBM_CELL_BLADE && BLOCK
319	default m
320	help
321	  It registers one block device per Axon's DDR2 memory bank found
322	  on a system. Block devices are called axonram?, their major and
323	  minor numbers are available in /proc/devices, /proc/partitions or
324	  in /sys/block/axonram?/dev.
325
326config FSL_ULI1575
327	bool
328	default n
329	select GENERIC_ISA_DMA
330	help
331	  Supports for the ULI1575 PCIe south bridge that exists on some
332	  Freescale reference boards. The boards all use the ULI in pretty
333	  much the same way.
334
335config CPM
336	bool
337	select PPC_CLOCK
338
339config OF_RTC
340	bool
341	help
342	  Uses information from the OF or flattened device tree to instantiate
343	  platform devices for direct mapped RTC chips like the DS1742 or DS1743.
344
345source "arch/powerpc/sysdev/bestcomm/Kconfig"
346
347config SIMPLE_GPIO
348	bool "Support for simple, memory-mapped GPIO controllers"
349	depends on PPC
350	select GENERIC_GPIO
351	select ARCH_REQUIRE_GPIOLIB
352	help
353	  Say Y here to support simple, memory-mapped GPIO controllers.
354	  These are usually BCSRs used to control board's switches, LEDs,
355	  chip-selects, Ethernet/USB PHY's power and various other small
356	  on-board peripherals.
357
358config MCU_MPC8349EMITX
359	bool "MPC8349E-mITX MCU driver"
360	depends on I2C=y && PPC_83xx
361	select GENERIC_GPIO
362	select ARCH_REQUIRE_GPIOLIB
363	help
364	  Say Y here to enable soft power-off functionality on the Freescale
365	  boards with the MPC8349E-mITX-compatible MCU chips. This driver will
366	  also register MCU GPIOs with the generic GPIO API, so you'll able
367	  to use MCU pins as GPIOs.
368
369config XILINX_PCI
370	bool "Xilinx PCI host bridge support"
371	depends on PCI && XILINX_VIRTEX
372
373endmenu
374