1config BF542
2	def_bool y
3	depends on BF542_std || BF542M
4config BF544
5	def_bool y
6	depends on BF544_std || BF544M
7config BF547
8	def_bool y
9	depends on BF547_std || BF547M
10config BF548
11	def_bool y
12	depends on BF548_std || BF548M
13config BF549
14	def_bool y
15	depends on BF549_std || BF549M
16
17config BF54xM
18	def_bool y
19	depends on (BF542M || BF544M || BF547M || BF548M || BF549M)
20
21config BF54x
22	def_bool y
23	depends on (BF542 || BF544 || BF547 || BF548 || BF549)
24
25if (BF54x)
26
27source "arch/blackfin/mach-bf548/boards/Kconfig"
28
29menu "BF548 Specific Configuration"
30
31config DEB_DMA_URGENT
32	bool "DMA has priority over core for ext. accesses"
33	depends on BF54x
34	default y
35	help
36	  Treat any DEB1, DEB2 and DEB3 request as Urgent
37
38config BF548_ATAPI_ALTERNATIVE_PORT
39	bool "BF548 ATAPI alternative port via GPIO"
40	help
41	  BF548 ATAPI data and address PINs can be routed through
42	  async address or GPIO port F and G. Select y to route it
43	  to GPIO.
44
45choice
46	prompt "UART2 DMA channel selection"
47	depends on SERIAL_BFIN_UART2
48	default UART2_DMA_RX_ON_DMA18
49	help
50		UART2 DMA channel selection
51		RX -> DMA18
52		TX -> DMA19
53		or
54		RX -> DMA13
55		TX -> DMA14
56
57config UART2_DMA_RX_ON_DMA18
58	bool "UART2 DMA RX -> DMA18 TX -> DMA19"
59	help
60		UART2 DMA channel assignment
61		RX -> DMA18
62		TX -> DMA19
63		use SPORT2 default DMA channel
64
65config UART2_DMA_RX_ON_DMA13
66	bool "UART2 DMA RX -> DMA13 TX -> DMA14"
67	help
68		UART2 DMA channel assignment
69		RX -> DMA13
70		TX -> DMA14
71		use EPPI1 EPPI2 default DMA channel
72endchoice
73
74choice
75	prompt "UART3 DMA channel selection"
76	depends on SERIAL_BFIN_UART3
77	default UART3_DMA_RX_ON_DMA20
78	help
79		UART3 DMA channel selection
80		RX -> DMA20
81		TX -> DMA21
82		or
83		RX -> DMA15
84		TX -> DMA16
85
86config UART3_DMA_RX_ON_DMA20
87	bool "UART3 DMA RX -> DMA20 TX -> DMA21"
88	help
89		UART3 DMA channel assignment
90		RX -> DMA20
91		TX -> DMA21
92		use SPORT3 default DMA channel
93
94config UART3_DMA_RX_ON_DMA15
95	bool "UART3 DMA RX -> DMA15 TX -> DMA16"
96	help
97		UART3 DMA channel assignment
98		RX -> DMA15
99		TX -> DMA16
100		use PIXC default DMA channel
101
102endchoice
103
104comment "Interrupt Priority Assignment"
105menu "Priority"
106
107config IRQ_PLL_WAKEUP
108	int "IRQ_PLL_WAKEUP"
109	default 7
110config IRQ_DMAC0_ERR
111	int "IRQ_DMAC0_ERR"
112	default 7
113config IRQ_EPPI0_ERR
114	int "IRQ_EPPI0_ERR"
115	default 7
116config IRQ_SPORT0_ERR
117	int "IRQ_SPORT0_ERR"
118	default 7
119config IRQ_SPORT1_ERR
120	int "IRQ_SPORT1_ERR"
121	default 7
122config IRQ_SPI0_ERR
123	int "IRQ_SPI0_ERR"
124	default 7
125config IRQ_UART0_ERR
126	int "IRQ_UART0_ERR"
127	default 7
128config IRQ_RTC
129	int "IRQ_RTC"
130	default 8
131config IRQ_EPPI0
132	int "IRQ_EPPI0"
133	default 8
134config IRQ_SPORT0_RX
135	int "IRQ_SPORT0_RX"
136	default 9
137config IRQ_SPORT0_TX
138	int "IRQ_SPORT0_TX"
139	default 9
140config IRQ_SPORT1_RX
141	int "IRQ_SPORT1_RX"
142	default 9
143config IRQ_SPORT1_TX
144	int "IRQ_SPORT1_TX"
145	default 9
146config IRQ_SPI0
147	int "IRQ_SPI0"
148	default 10
149config IRQ_UART0_RX
150	int "IRQ_UART0_RX"
151	default 10
152config IRQ_UART0_TX
153	int "IRQ_UART0_TX"
154	default 10
155config IRQ_TIMER8
156	int "IRQ_TIMER8"
157	default 11
158config IRQ_TIMER9
159	int "IRQ_TIMER9"
160	default 11
161config IRQ_TIMER10
162	int "IRQ_TIMER10"
163	default 11
164config IRQ_PINT0
165	int "IRQ_PINT0"
166	default 12
167config IRQ_PINT1
168	int "IRQ_PINT0"
169	default 12
170config IRQ_MDMAS0
171	int "IRQ_MDMAS0"
172	default 13
173config IRQ_MDMAS1
174	int "IRQ_DMDMAS1"
175	default 13
176config IRQ_WATCHDOG
177	int "IRQ_WATCHDOG"
178	default 13
179config IRQ_DMAC1_ERR
180	int "IRQ_DMAC1_ERR"
181	default 7
182config IRQ_SPORT2_ERR
183	int "IRQ_SPORT2_ERR"
184	default 7
185config IRQ_SPORT3_ERR
186	int "IRQ_SPORT3_ERR"
187	default 7
188config IRQ_MXVR_DATA
189	int "IRQ MXVR Data"
190	default 7
191config IRQ_SPI1_ERR
192	int "IRQ_SPI1_ERR"
193	default 7
194config IRQ_SPI2_ERR
195	int "IRQ_SPI2_ERR"
196	default 7
197config IRQ_UART1_ERR
198	int "IRQ_UART1_ERR"
199	default 7
200config IRQ_UART2_ERR
201	int "IRQ_UART2_ERR"
202	default 7
203config IRQ_CAN0_ERR
204	int "IRQ_CAN0_ERR"
205	default 7
206config IRQ_SPORT2_RX
207	int "IRQ_SPORT2_RX"
208	default 9
209config IRQ_SPORT2_TX
210	int "IRQ_SPORT2_TX"
211	default 9
212config IRQ_SPORT3_RX
213	int "IRQ_SPORT3_RX"
214	default 9
215config IRQ_SPORT3_TX
216	int "IRQ_SPORT3_TX"
217	default 9
218config IRQ_EPPI1
219	int "IRQ_EPPI1"
220	default 9
221config IRQ_EPPI2
222	int "IRQ_EPPI2"
223	default 9
224config IRQ_SPI1
225	int "IRQ_SPI1"
226	default 10
227config IRQ_SPI2
228	int "IRQ_SPI2"
229	default 10
230config IRQ_UART1_RX
231	int "IRQ_UART1_RX"
232	default 10
233config IRQ_UART1_TX
234	int "IRQ_UART1_TX"
235	default 10
236config IRQ_ATAPI_RX
237	int "IRQ_ATAPI_RX"
238	default 10
239config IRQ_ATAPI_TX
240	int "IRQ_ATAPI_TX"
241	default 10
242config IRQ_TWI0
243	int "IRQ_TWI0"
244	default 11
245config IRQ_TWI1
246	int "IRQ_TWI1"
247	default 11
248config IRQ_CAN0_RX
249	int "IRQ_CAN_RX"
250	default 11
251config IRQ_CAN0_TX
252	int "IRQ_CAN_TX"
253	default 11
254config IRQ_MDMAS2
255	int "IRQ_MDMAS2"
256	default 13
257config IRQ_MDMAS3
258	int "IRQ_DMMAS3"
259	default 13
260config IRQ_MXVR_ERR
261	int "IRQ_MXVR_ERR"
262	default 11
263config IRQ_MXVR_MSG
264	int "IRQ_MXVR_MSG"
265	default 11
266config IRQ_MXVR_PKT
267	int "IRQ_MXVR_PKT"
268	default 11
269config IRQ_EPPI1_ERR
270	int "IRQ_EPPI1_ERR"
271	default 7
272config IRQ_EPPI2_ERR
273	int "IRQ_EPPI2_ERR"
274	default 7
275config IRQ_UART3_ERR
276	int "IRQ_UART3_ERR"
277	default 7
278config IRQ_HOST_ERR
279	int "IRQ_HOST_ERR"
280	default 7
281config IRQ_PIXC_ERR
282	int "IRQ_PIXC_ERR"
283	default 7
284config IRQ_NFC_ERR
285	int "IRQ_NFC_ERR"
286	default 7
287config IRQ_ATAPI_ERR
288	int "IRQ_ATAPI_ERR"
289	default 7
290config IRQ_CAN1_ERR
291	int "IRQ_CAN1_ERR"
292	default 7
293config IRQ_HS_DMA_ERR
294	int "IRQ Handshake DMA Status"
295	default 7
296config IRQ_PIXC_IN0
297	int "IRQ PIXC IN0"
298	default 8
299config IRQ_PIXC_IN1
300	int "IRQ PIXC IN1"
301	default 8
302config IRQ_PIXC_OUT
303	int "IRQ PIXC OUT"
304	default 8
305config IRQ_SDH
306	int "IRQ SDH"
307	default 8
308config IRQ_CNT
309	int "IRQ CNT"
310	default 8
311config IRQ_KEY
312	int "IRQ KEY"
313	default 8
314config IRQ_CAN1_RX
315	int "IRQ CAN1 RX"
316	default 11
317config IRQ_CAN1_TX
318	int "IRQ_CAN1_TX"
319	default 11
320config IRQ_SDH_MASK0
321	int "IRQ_SDH_MASK0"
322	default 11
323config IRQ_SDH_MASK1
324	int "IRQ_SDH_MASK1"
325	default 11
326config IRQ_USB_INT0
327	int "IRQ USB INT0"
328	default 11
329config IRQ_USB_INT1
330	int "IRQ USB INT1"
331	default 11
332config IRQ_USB_INT2
333	int "IRQ USB INT2"
334	default 11
335config IRQ_USB_DMA
336	int "IRQ USB DMA"
337	default 11
338config IRQ_OTPSEC
339	int "IRQ OPTSEC"
340	default 11
341config IRQ_TIMER0
342	int "IRQ_TIMER0"
343	default 7 if TICKSOURCE_GPTMR0
344	default 8
345config IRQ_TIMER1
346	int "IRQ_TIMER1"
347	default 11
348config IRQ_TIMER2
349	int "IRQ_TIMER2"
350	default 11
351config IRQ_TIMER3
352	int "IRQ_TIMER3"
353	default 11
354config IRQ_TIMER4
355	int "IRQ_TIMER4"
356	default 11
357config IRQ_TIMER5
358	int "IRQ_TIMER5"
359	default 11
360config IRQ_TIMER6
361	int "IRQ_TIMER6"
362	default 11
363config IRQ_TIMER7
364	int "IRQ_TIMER7"
365	default 11
366config IRQ_PINT2
367	int "IRQ_PIN2"
368	default 11
369config IRQ_PINT3
370	int "IRQ_PIN3"
371	default 11
372
373	help
374	  Enter the priority numbers between 7-13 ONLY.  Others are Reserved.
375	  This applies to all the above.  It is not recommended to assign the
376	  highest priority number 7 to UART or any other device.
377
378endmenu
379
380comment "Pin Interrupt to Port Assignment"
381menu "Assignment"
382
383config PINTx_REASSIGN
384	bool "Reprogram PINT Assignment"
385	default y
386	help
387	  The interrupt assignment registers controls the pin-to-interrupt
388	  assignment in a byte-wide manner. Each option allows you to select
389	  a set of pins (High/Low Byte) of an specific Port being mapped
390	  to one of the four PIN Interrupts IRQ_PINTx.
391
392	  You shouldn't change any of these unless you know exactly what you're doing.
393	  Please consult the Blackfin BF54x Processor Hardware Reference Manual.
394
395config PINT0_ASSIGN
396	hex "PINT0_ASSIGN"
397	depends on PINTx_REASSIGN
398	default 0x00000101
399config PINT1_ASSIGN
400	hex "PINT1_ASSIGN"
401	depends on PINTx_REASSIGN
402	default 0x01010000
403config PINT2_ASSIGN
404	hex "PINT2_ASSIGN"
405	depends on PINTx_REASSIGN
406	default 0x07000101
407config PINT3_ASSIGN
408	hex "PINT3_ASSIGN"
409	depends on PINTx_REASSIGN
410	default 0x02020303
411
412endmenu
413
414endmenu
415
416endif
417