1# 2# DMA engine configuration 3# 4 5menuconfig DMADEVICES 6 bool "DMA Engine support" 7 depends on HAS_DMA 8 help 9 DMA engines can do asynchronous data transfers without 10 involving the host CPU. Currently, this framework can be 11 used to offload memory copies in the network stack and 12 RAID operations in the MD driver. This menu only presents 13 DMA Device drivers supported by the configured arch, it may 14 be empty in some cases. 15 16config DMADEVICES_DEBUG 17 bool "DMA Engine debugging" 18 depends on DMADEVICES != n 19 help 20 This is an option for use by developers; most people should 21 say N here. This enables DMA engine core and driver debugging. 22 23config DMADEVICES_VDEBUG 24 bool "DMA Engine verbose debugging" 25 depends on DMADEVICES_DEBUG != n 26 help 27 This is an option for use by developers; most people should 28 say N here. This enables deeper (more verbose) debugging of 29 the DMA engine core and drivers. 30 31 32if DMADEVICES 33 34comment "DMA Devices" 35 36config INTEL_MID_DMAC 37 tristate "Intel MID DMA support for Peripheral DMA controllers" 38 depends on PCI && X86 39 select DMA_ENGINE 40 default n 41 help 42 Enable support for the Intel(R) MID DMA engine present 43 in Intel MID chipsets. 44 45 Say Y here if you have such a chipset. 46 47 If unsure, say N. 48 49config ASYNC_TX_ENABLE_CHANNEL_SWITCH 50 bool 51 52config AMBA_PL08X 53 bool "ARM PrimeCell PL080 or PL081 support" 54 depends on ARM_AMBA && EXPERIMENTAL 55 select DMA_ENGINE 56 help 57 Platform has a PL08x DMAC device 58 which can provide DMA engine support 59 60config INTEL_IOATDMA 61 tristate "Intel I/OAT DMA support" 62 depends on PCI && X86 63 select DMA_ENGINE 64 select DCA 65 select ASYNC_TX_DISABLE_PQ_VAL_DMA 66 select ASYNC_TX_DISABLE_XOR_VAL_DMA 67 help 68 Enable support for the Intel(R) I/OAT DMA engine present 69 in recent Intel Xeon chipsets. 70 71 Say Y here if you have such a chipset. 72 73 If unsure, say N. 74 75config INTEL_IOP_ADMA 76 tristate "Intel IOP ADMA support" 77 depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX 78 select DMA_ENGINE 79 select ASYNC_TX_ENABLE_CHANNEL_SWITCH 80 help 81 Enable support for the Intel(R) IOP Series RAID engines. 82 83config DW_DMAC 84 tristate "Synopsys DesignWare AHB DMA support" 85 depends on HAVE_CLK 86 select DMA_ENGINE 87 default y if CPU_AT32AP7000 88 help 89 Support the Synopsys DesignWare AHB DMA controller. This 90 can be integrated in chips such as the Atmel AT32ap7000. 91 92config AT_HDMAC 93 tristate "Atmel AHB DMA support" 94 depends on ARCH_AT91 95 select DMA_ENGINE 96 help 97 Support the Atmel AHB DMA controller. 98 99config FSL_DMA 100 tristate "Freescale Elo and Elo Plus DMA support" 101 depends on FSL_SOC 102 select DMA_ENGINE 103 select ASYNC_TX_ENABLE_CHANNEL_SWITCH 104 ---help--- 105 Enable support for the Freescale Elo and Elo Plus DMA controllers. 106 The Elo is the DMA controller on some 82xx and 83xx parts, and the 107 Elo Plus is the DMA controller on 85xx and 86xx parts. 108 109config MPC512X_DMA 110 tristate "Freescale MPC512x built-in DMA engine support" 111 depends on PPC_MPC512x || PPC_MPC831x 112 select DMA_ENGINE 113 ---help--- 114 Enable support for the Freescale MPC512x built-in DMA engine. 115 116config MV_XOR 117 bool "Marvell XOR engine support" 118 depends on PLAT_ORION 119 select DMA_ENGINE 120 select ASYNC_TX_ENABLE_CHANNEL_SWITCH 121 ---help--- 122 Enable support for the Marvell XOR engine. 123 124config MX3_IPU 125 bool "MX3x Image Processing Unit support" 126 depends on ARCH_MXC 127 select DMA_ENGINE 128 default y 129 help 130 If you plan to use the Image Processing unit in the i.MX3x, say 131 Y here. If unsure, select Y. 132 133config MX3_IPU_IRQS 134 int "Number of dynamically mapped interrupts for IPU" 135 depends on MX3_IPU 136 range 2 137 137 default 4 138 help 139 Out of 137 interrupt sources on i.MX31 IPU only very few are used. 140 To avoid bloating the irq_desc[] array we allocate a sufficient 141 number of IRQ slots and map them dynamically to specific sources. 142 143config TXX9_DMAC 144 tristate "Toshiba TXx9 SoC DMA support" 145 depends on MACH_TX49XX || MACH_TX39XX 146 select DMA_ENGINE 147 help 148 Support the TXx9 SoC internal DMA controller. This can be 149 integrated in chips such as the Toshiba TX4927/38/39. 150 151config SH_DMAE 152 tristate "Renesas SuperH DMAC support" 153 depends on (SUPERH && SH_DMA) || (ARM && ARCH_SHMOBILE) 154 depends on !SH_DMA_API 155 select DMA_ENGINE 156 help 157 Enable support for the Renesas SuperH DMA controllers. 158 159config COH901318 160 bool "ST-Ericsson COH901318 DMA support" 161 select DMA_ENGINE 162 depends on ARCH_U300 163 help 164 Enable support for ST-Ericsson COH 901 318 DMA. 165 166config STE_DMA40 167 bool "ST-Ericsson DMA40 support" 168 depends on ARCH_U8500 169 select DMA_ENGINE 170 help 171 Support for ST-Ericsson DMA40 controller 172 173config AMCC_PPC440SPE_ADMA 174 tristate "AMCC PPC440SPe ADMA support" 175 depends on 440SPe || 440SP 176 select DMA_ENGINE 177 select ARCH_HAS_ASYNC_TX_FIND_CHANNEL 178 select ASYNC_TX_ENABLE_CHANNEL_SWITCH 179 help 180 Enable support for the AMCC PPC440SPe RAID engines. 181 182config TIMB_DMA 183 tristate "Timberdale FPGA DMA support" 184 depends on MFD_TIMBERDALE || HAS_IOMEM 185 select DMA_ENGINE 186 help 187 Enable support for the Timberdale FPGA DMA engine. 188 189config SIRF_DMA 190 tristate "CSR SiRFprimaII DMA support" 191 depends on ARCH_PRIMA2 192 select DMA_ENGINE 193 help 194 Enable support for the CSR SiRFprimaII DMA engine. 195 196config ARCH_HAS_ASYNC_TX_FIND_CHANNEL 197 bool 198 199config PL330_DMA 200 tristate "DMA API Driver for PL330" 201 select DMA_ENGINE 202 depends on ARM_AMBA 203 help 204 Select if your platform has one or more PL330 DMACs. 205 You need to provide platform specific settings via 206 platform_data for a dma-pl330 device. 207 208config PCH_DMA 209 tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA" 210 depends on PCI && X86 211 select DMA_ENGINE 212 help 213 Enable support for Intel EG20T PCH DMA engine. 214 215 This driver also can be used for LAPIS Semiconductor IOH(Input/ 216 Output Hub), ML7213, ML7223 and ML7831. 217 ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is 218 for MP(Media Phone) use and ML7831 IOH is for general purpose use. 219 ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series. 220 ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH. 221 222config IMX_SDMA 223 tristate "i.MX SDMA support" 224 depends on ARCH_MXC 225 select DMA_ENGINE 226 help 227 Support the i.MX SDMA engine. This engine is integrated into 228 Freescale i.MX25/31/35/51/53 chips. 229 230config IMX_DMA 231 tristate "i.MX DMA support" 232 depends on ARCH_MXC 233 select DMA_ENGINE 234 help 235 Support the i.MX DMA engine. This engine is integrated into 236 Freescale i.MX1/21/27 chips. 237 238config MXS_DMA 239 bool "MXS DMA support" 240 depends on SOC_IMX23 || SOC_IMX28 241 select DMA_ENGINE 242 help 243 Support the MXS DMA engine. This engine including APBH-DMA 244 and APBX-DMA is integrated into Freescale i.MX23/28 chips. 245 246config EP93XX_DMA 247 bool "Cirrus Logic EP93xx DMA support" 248 depends on ARCH_EP93XX 249 select DMA_ENGINE 250 help 251 Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller. 252 253config DMA_SA11X0 254 tristate "SA-11x0 DMA support" 255 depends on ARCH_SA1100 256 select DMA_ENGINE 257 help 258 Support the DMA engine found on Intel StrongARM SA-1100 and 259 SA-1110 SoCs. This DMA engine can only be used with on-chip 260 devices. 261 262config DMA_ENGINE 263 bool 264 265comment "DMA Clients" 266 depends on DMA_ENGINE 267 268config NET_DMA 269 bool "Network: TCP receive copy offload" 270 depends on DMA_ENGINE && NET 271 default (INTEL_IOATDMA || FSL_DMA) 272 depends on BROKEN 273 help 274 This enables the use of DMA engines in the network stack to 275 offload receive copy-to-user operations, freeing CPU cycles. 276 277 Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise 278 say N. 279 280config ASYNC_TX_DMA 281 bool "Async_tx: Offload support for the async_tx api" 282 depends on DMA_ENGINE 283 help 284 This allows the async_tx api to take advantage of offload engines for 285 memcpy, memset, xor, and raid6 p+q operations. If your platform has 286 a dma engine that can perform raid operations and you have enabled 287 MD_RAID456 say Y. 288 289 If unsure, say N. 290 291config DMATEST 292 tristate "DMA Test client" 293 depends on DMA_ENGINE 294 help 295 Simple DMA test client. Say N unless you're debugging a 296 DMA Device driver. 297 298endif 299