1 /* 2 ********************************************************************** 3 * hwaccess.h 4 * Copyright 1999, 2000 Creative Labs, Inc. 5 * 6 ********************************************************************** 7 * 8 * Date Author Summary of changes 9 * ---- ------ ------------------ 10 * October 20, 1999 Bertrand Lee base code release 11 * 12 ********************************************************************** 13 * 14 * This program is free software; you can redistribute it and/or 15 * modify it under the terms of the GNU General Public License as 16 * published by the Free Software Foundation; either version 2 of 17 * the License, or (at your option) any later version. 18 * 19 * This program is distributed in the hope that it will be useful, 20 * but WITHOUT ANY WARRANTY; without even the implied warranty of 21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 22 * GNU General Public License for more details. 23 * 24 * You should have received a copy of the GNU General Public 25 * License along with this program; if not, write to the Free 26 * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, 27 * USA. 28 * 29 ********************************************************************** 30 */ 31 32 #ifndef _HWACCESS_H 33 #define _HWACCESS_H 34 35 #include <linux/fs.h> 36 #include <linux/sound.h> 37 #include <linux/soundcard.h> 38 #include <linux/ac97_codec.h> 39 #include <linux/pci.h> 40 #include <linux/slab.h> 41 #include <linux/sched.h> 42 #include <asm/io.h> 43 44 #include "efxmgr.h" 45 #include "passthrough.h" 46 #include "midi.h" 47 48 #define EMUPAGESIZE 4096 /* don't change */ 49 #define NUM_G 64 /* use all channels */ 50 #define NUM_FXSENDS 4 /* don't change */ 51 /* setting this to other than a power of two may break some applications */ 52 #define MAXBUFSIZE 65536 53 #define MAXPAGES 8192 54 #define BUFMAXPAGES (MAXBUFSIZE / PAGE_SIZE) 55 56 #define FLAGS_AVAILABLE 0x0001 57 #define FLAGS_READY 0x0002 58 59 struct memhandle 60 { 61 dma_addr_t dma_handle; 62 void *addr; 63 u32 size; 64 }; 65 66 #define DEBUG_LEVEL 2 67 68 #ifdef EMU10K1_DEBUG 69 # define DPD(level,x,y...) do {if(level <= DEBUG_LEVEL) printk( KERN_NOTICE "emu10k1: %s: %d: " x , __FILE__ , __LINE__ , y );} while(0) 70 # define DPF(level,x) do {if(level <= DEBUG_LEVEL) printk( KERN_NOTICE "emu10k1: %s: %d: " x , __FILE__ , __LINE__ );} while(0) 71 #else 72 # define DPD(level,x,y...) do { } while (0) /* not debugging: nothing */ 73 # define DPF(level,x) do { } while (0) 74 #endif /* EMU10K1_DEBUG */ 75 76 #define ERROR() DPF(1,"error\n") 77 78 /* DATA STRUCTURES */ 79 80 struct emu10k1_waveout 81 { 82 u16 send_routing[3]; 83 84 u8 send_a[3]; 85 u8 send_b[3]; 86 u8 send_c[3]; 87 u8 send_d[3]; 88 }; 89 90 struct emu10k1_wavein 91 { 92 struct wiinst *ac97; 93 struct wiinst *mic; 94 struct wiinst *fx; 95 96 u8 recsrc; 97 u32 fxwc; 98 }; 99 100 #define CMD_READ 1 101 #define CMD_WRITE 2 102 103 struct mixer_private_ioctl { 104 u32 cmd; 105 u32 val[90]; 106 }; 107 108 /* bogus ioctls numbers to escape from OSS mixer limitations */ 109 #define CMD_WRITEFN0 _IOW('D', 0, struct mixer_private_ioctl) 110 #define CMD_READFN0 _IOR('D', 1, struct mixer_private_ioctl) 111 #define CMD_WRITEPTR _IOW('D', 2, struct mixer_private_ioctl) 112 #define CMD_READPTR _IOR('D', 3, struct mixer_private_ioctl) 113 #define CMD_SETRECSRC _IOW('D', 4, struct mixer_private_ioctl) 114 #define CMD_GETRECSRC _IOR('D', 5, struct mixer_private_ioctl) 115 #define CMD_GETVOICEPARAM _IOR('D', 6, struct mixer_private_ioctl) 116 #define CMD_SETVOICEPARAM _IOW('D', 7, struct mixer_private_ioctl) 117 #define CMD_GETPATCH _IOR('D', 8, struct mixer_private_ioctl) 118 #define CMD_GETGPR _IOR('D', 9, struct mixer_private_ioctl) 119 #define CMD_GETCTLGPR _IOR('D', 10, struct mixer_private_ioctl) 120 #define CMD_SETPATCH _IOW('D', 11, struct mixer_private_ioctl) 121 #define CMD_SETGPR _IOW('D', 12, struct mixer_private_ioctl) 122 #define CMD_SETCTLGPR _IOW('D', 13, struct mixer_private_ioctl) 123 #define CMD_SETGPOUT _IOW('D', 14, struct mixer_private_ioctl) 124 #define CMD_GETGPR2OSS _IOR('D', 15, struct mixer_private_ioctl) 125 #define CMD_SETGPR2OSS _IOW('D', 16, struct mixer_private_ioctl) 126 #define CMD_SETMCH_FX _IOW('D', 17, struct mixer_private_ioctl) 127 #define CMD_SETPASSTHROUGH _IOW('D', 18, struct mixer_private_ioctl) 128 #define CMD_PRIVATE3_VERSION _IOW('D', 19, struct mixer_private_ioctl) 129 #define CMD_AC97_BOOST _IOW('D', 20, struct mixer_private_ioctl) 130 131 //up this number when breaking compatibility 132 #define PRIVATE3_VERSION 1 133 134 struct emu10k1_card 135 { 136 struct list_head list; 137 138 struct memhandle virtualpagetable; 139 struct memhandle tankmem; 140 struct memhandle silentpage; 141 142 spinlock_t lock; 143 144 u8 voicetable[NUM_G]; 145 u16 emupagetable[MAXPAGES]; 146 147 struct list_head timers; 148 u16 timer_delay; 149 spinlock_t timer_lock; 150 151 struct pci_dev *pci_dev; 152 unsigned long iobase; 153 unsigned long length; 154 unsigned short model; 155 unsigned int irq; 156 157 int audio_dev; 158 int audio_dev1; 159 int midi_dev; 160 #ifdef EMU10K1_SEQUENCER 161 int seq_dev; 162 struct emu10k1_mididevice *seq_mididev; 163 #endif 164 165 struct ac97_codec *ac97; 166 int ac97_supported_mixers; 167 int ac97_stereo_mixers; 168 169 /* Number of first fx voice for multichannel output */ 170 u8 mchannel_fx; 171 struct emu10k1_waveout waveout; 172 struct emu10k1_wavein wavein; 173 struct emu10k1_mpuout *mpuout; 174 struct emu10k1_mpuin *mpuin; 175 176 struct semaphore open_sem; 177 mode_t open_mode; 178 wait_queue_head_t open_wait; 179 180 u32 mpuacqcount; // Mpu acquire count 181 u32 has_toslink; // TOSLink detection 182 183 u8 chiprev; /* Chip revision */ 184 185 u8 is_aps; 186 187 struct patch_manager mgr; 188 struct pt_data pt; 189 }; 190 191 int emu10k1_addxmgr_alloc(u32, struct emu10k1_card *); 192 void emu10k1_addxmgr_free(struct emu10k1_card *, int); 193 194 int emu10k1_find_control_gpr(struct patch_manager *, const char *, const char *); 195 void emu10k1_set_control_gpr(struct emu10k1_card *, int , s32, int ); 196 197 void emu10k1_set_volume_gpr(struct emu10k1_card *, int, s32, int); 198 199 200 #define VOL_6BIT 0x40 201 #define VOL_5BIT 0x20 202 #define VOL_4BIT 0x10 203 204 #define TIMEOUT 16384 205 206 u32 srToPitch(u32); 207 u8 sumVolumeToAttenuation(u32); 208 209 extern struct list_head emu10k1_devs; 210 211 /* Hardware Abstraction Layer access functions */ 212 213 void emu10k1_writefn0(struct emu10k1_card *, u32, u32); 214 u32 emu10k1_readfn0(struct emu10k1_card *, u32); 215 216 void emu10k1_timer_set(struct emu10k1_card *, u16); 217 218 void sblive_writeptr(struct emu10k1_card *, u32, u32, u32); 219 void sblive_writeptr_tag(struct emu10k1_card *, u32, ...); 220 #define TAGLIST_END 0 221 222 u32 sblive_readptr(struct emu10k1_card *, u32 , u32 ); 223 224 void emu10k1_irq_enable(struct emu10k1_card *, u32); 225 void emu10k1_irq_disable(struct emu10k1_card *, u32); 226 void emu10k1_set_stop_on_loop(struct emu10k1_card *, u32); 227 void emu10k1_clear_stop_on_loop(struct emu10k1_card *, u32); 228 229 /* AC97 Codec register access function */ 230 u16 emu10k1_ac97_read(struct ac97_codec *, u8); 231 void emu10k1_ac97_write(struct ac97_codec *, u8, u16); 232 233 /* MPU access function*/ 234 int emu10k1_mpu_write_data(struct emu10k1_card *, u8); 235 int emu10k1_mpu_read_data(struct emu10k1_card *, u8 *); 236 int emu10k1_mpu_reset(struct emu10k1_card *); 237 int emu10k1_mpu_acquire(struct emu10k1_card *); 238 int emu10k1_mpu_release(struct emu10k1_card *); 239 240 #endif /* _HWACCESS_H */ 241