1 /* 2 * linux/drivers/acorn/net/ether1.h 3 * 4 * Copyright (C) 1996 Russell King 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 * 10 * Network driver for Acorn Ether1 cards. 11 */ 12 13 #ifndef _LINUX_ether1_H 14 #define _LINUX_ether1_H 15 16 #ifdef __ETHER1_C 17 /* use 0 for production, 1 for verification, >2 for debug */ 18 #ifndef NET_DEBUG 19 #define NET_DEBUG 0 20 #endif 21 22 /* Page register */ 23 #define REG_PAGE (dev->base_addr + 0x00) 24 25 /* Control register */ 26 #define REG_CONTROL (dev->base_addr + 0x01) 27 #define CTRL_RST 0x01 28 #define CTRL_LOOPBACK 0x02 29 #define CTRL_CA 0x04 30 #define CTRL_ACK 0x08 31 32 #define ETHER1_RAM (dev->base_addr + 0x800) 33 34 /* HW address */ 35 #define IDPROM_ADDRESS (dev->base_addr + 0x09) 36 37 struct ether1_priv { 38 struct net_device_stats stats; 39 unsigned int tx_link; 40 unsigned int tx_head; 41 volatile unsigned int tx_tail; 42 volatile unsigned int rx_head; 43 volatile unsigned int rx_tail; 44 unsigned char bus_type; 45 unsigned char resetting; 46 unsigned char initialising : 1; 47 unsigned char restart : 1; 48 }; 49 50 #define I82586_NULL (-1) 51 52 typedef struct { /* tdr */ 53 unsigned short tdr_status; 54 unsigned short tdr_command; 55 unsigned short tdr_link; 56 unsigned short tdr_result; 57 #define TDR_TIME (0x7ff) 58 #define TDR_SHORT (1 << 12) 59 #define TDR_OPEN (1 << 13) 60 #define TDR_XCVRPROB (1 << 14) 61 #define TDR_LNKOK (1 << 15) 62 } tdr_t; 63 64 typedef struct { /* transmit */ 65 unsigned short tx_status; 66 unsigned short tx_command; 67 unsigned short tx_link; 68 unsigned short tx_tbdoffset; 69 } tx_t; 70 71 typedef struct { /* tbd */ 72 unsigned short tbd_opts; 73 #define TBD_CNT (0x3fff) 74 #define TBD_EOL (1 << 15) 75 unsigned short tbd_link; 76 unsigned short tbd_bufl; 77 unsigned short tbd_bufh; 78 } tbd_t; 79 80 typedef struct { /* rfd */ 81 unsigned short rfd_status; 82 #define RFD_NOEOF (1 << 6) 83 #define RFD_FRAMESHORT (1 << 7) 84 #define RFD_DMAOVRN (1 << 8) 85 #define RFD_NORESOURCES (1 << 9) 86 #define RFD_ALIGNERROR (1 << 10) 87 #define RFD_CRCERROR (1 << 11) 88 #define RFD_OK (1 << 13) 89 #define RFD_FDCONSUMED (1 << 14) 90 #define RFD_COMPLETE (1 << 15) 91 unsigned short rfd_command; 92 #define RFD_CMDSUSPEND (1 << 14) 93 #define RFD_CMDEL (1 << 15) 94 unsigned short rfd_link; 95 unsigned short rfd_rbdoffset; 96 unsigned char rfd_dest[6]; 97 unsigned char rfd_src[6]; 98 unsigned short rfd_len; 99 } rfd_t; 100 101 typedef struct { /* rbd */ 102 unsigned short rbd_status; 103 #define RBD_ACNT (0x3fff) 104 #define RBD_ACNTVALID (1 << 14) 105 #define RBD_EOF (1 << 15) 106 unsigned short rbd_link; 107 unsigned short rbd_bufl; 108 unsigned short rbd_bufh; 109 unsigned short rbd_len; 110 } rbd_t; 111 112 typedef struct { /* nop */ 113 unsigned short nop_status; 114 unsigned short nop_command; 115 unsigned short nop_link; 116 } nop_t; 117 118 typedef struct { /* set multicast */ 119 unsigned short mc_status; 120 unsigned short mc_command; 121 unsigned short mc_link; 122 unsigned short mc_cnt; 123 unsigned char mc_addrs[1][6]; 124 } mc_t; 125 126 typedef struct { /* set address */ 127 unsigned short sa_status; 128 unsigned short sa_command; 129 unsigned short sa_link; 130 unsigned char sa_addr[6]; 131 } sa_t; 132 133 typedef struct { /* config command */ 134 unsigned short cfg_status; 135 unsigned short cfg_command; 136 unsigned short cfg_link; 137 unsigned char cfg_bytecnt; /* size foll data: 4 - 12 */ 138 unsigned char cfg_fifolim; /* FIFO threshold */ 139 unsigned char cfg_byte8; 140 #define CFG8_SRDY (1 << 6) 141 #define CFG8_SAVEBADF (1 << 7) 142 unsigned char cfg_byte9; 143 #define CFG9_ADDRLEN(x) (x) 144 #define CFG9_ADDRLENBUF (1 << 3) 145 #define CFG9_PREAMB2 (0 << 4) 146 #define CFG9_PREAMB4 (1 << 4) 147 #define CFG9_PREAMB8 (2 << 4) 148 #define CFG9_PREAMB16 (3 << 4) 149 #define CFG9_ILOOPBACK (1 << 6) 150 #define CFG9_ELOOPBACK (1 << 7) 151 unsigned char cfg_byte10; 152 #define CFG10_LINPRI(x) (x) 153 #define CFG10_ACR(x) (x << 4) 154 #define CFG10_BOFMET (1 << 7) 155 unsigned char cfg_ifs; 156 unsigned char cfg_slotl; 157 unsigned char cfg_byte13; 158 #define CFG13_SLOTH(x) (x) 159 #define CFG13_RETRY(x) (x << 4) 160 unsigned char cfg_byte14; 161 #define CFG14_PROMISC (1 << 0) 162 #define CFG14_DISBRD (1 << 1) 163 #define CFG14_MANCH (1 << 2) 164 #define CFG14_TNCRS (1 << 3) 165 #define CFG14_NOCRC (1 << 4) 166 #define CFG14_CRC16 (1 << 5) 167 #define CFG14_BTSTF (1 << 6) 168 #define CFG14_FLGPAD (1 << 7) 169 unsigned char cfg_byte15; 170 #define CFG15_CSTF(x) (x) 171 #define CFG15_ICSS (1 << 3) 172 #define CFG15_CDTF(x) (x << 4) 173 #define CFG15_ICDS (1 << 7) 174 unsigned short cfg_minfrmlen; 175 } cfg_t; 176 177 typedef struct { /* scb */ 178 unsigned short scb_status; /* status of 82586 */ 179 #define SCB_STRXMASK (7 << 4) /* Receive unit status */ 180 #define SCB_STRXIDLE (0 << 4) /* Idle */ 181 #define SCB_STRXSUSP (1 << 4) /* Suspended */ 182 #define SCB_STRXNRES (2 << 4) /* No resources */ 183 #define SCB_STRXRDY (4 << 4) /* Ready */ 184 #define SCB_STCUMASK (7 << 8) /* Command unit status */ 185 #define SCB_STCUIDLE (0 << 8) /* Idle */ 186 #define SCB_STCUSUSP (1 << 8) /* Suspended */ 187 #define SCB_STCUACTV (2 << 8) /* Active */ 188 #define SCB_STRNR (1 << 12) /* Receive unit not ready */ 189 #define SCB_STCNA (1 << 13) /* Command unit not ready */ 190 #define SCB_STFR (1 << 14) /* Frame received */ 191 #define SCB_STCX (1 << 15) /* Command completed */ 192 unsigned short scb_command; /* Next command */ 193 #define SCB_CMDRXSTART (1 << 4) /* Start (at rfa_offset) */ 194 #define SCB_CMDRXRESUME (2 << 4) /* Resume reception */ 195 #define SCB_CMDRXSUSPEND (3 << 4) /* Suspend reception */ 196 #define SCB_CMDRXABORT (4 << 4) /* Abort reception */ 197 #define SCB_CMDCUCSTART (1 << 8) /* Start (at cbl_offset) */ 198 #define SCB_CMDCUCRESUME (2 << 8) /* Resume execution */ 199 #define SCB_CMDCUCSUSPEND (3 << 8) /* Suspend execution */ 200 #define SCB_CMDCUCABORT (4 << 8) /* Abort execution */ 201 #define SCB_CMDACKRNR (1 << 12) /* Ack RU not ready */ 202 #define SCB_CMDACKCNA (1 << 13) /* Ack CU not ready */ 203 #define SCB_CMDACKFR (1 << 14) /* Ack Frame received */ 204 #define SCB_CMDACKCX (1 << 15) /* Ack Command complete */ 205 unsigned short scb_cbl_offset; /* Offset of first command unit */ 206 unsigned short scb_rfa_offset; /* Offset of first receive frame area */ 207 unsigned short scb_crc_errors; /* Properly aligned frame with CRC error*/ 208 unsigned short scb_aln_errors; /* Misaligned frames */ 209 unsigned short scb_rsc_errors; /* Frames lost due to no space */ 210 unsigned short scb_ovn_errors; /* Frames lost due to slow bus */ 211 } scb_t; 212 213 typedef struct { /* iscp */ 214 unsigned short iscp_busy; /* set by CPU before CA */ 215 unsigned short iscp_offset; /* offset of SCB */ 216 unsigned short iscp_basel; /* base of SCB */ 217 unsigned short iscp_baseh; 218 } iscp_t; 219 220 /* this address must be 0xfff6 */ 221 typedef struct { /* scp */ 222 unsigned short scp_sysbus; /* bus size */ 223 #define SCP_SY_16BBUS 0x00 224 #define SCP_SY_8BBUS 0x01 225 unsigned short scp_junk[2]; /* junk */ 226 unsigned short scp_iscpl; /* lower 16 bits of iscp */ 227 unsigned short scp_iscph; /* upper 16 bits of iscp */ 228 } scp_t; 229 230 /* commands */ 231 #define CMD_NOP 0 232 #define CMD_SETADDRESS 1 233 #define CMD_CONFIG 2 234 #define CMD_SETMULTICAST 3 235 #define CMD_TX 4 236 #define CMD_TDR 5 237 #define CMD_DUMP 6 238 #define CMD_DIAGNOSE 7 239 240 #define CMD_MASK 7 241 242 #define CMD_INTR (1 << 13) 243 #define CMD_SUSP (1 << 14) 244 #define CMD_EOL (1 << 15) 245 246 #define STAT_COLLISIONS (15) 247 #define STAT_COLLEXCESSIVE (1 << 5) 248 #define STAT_COLLAFTERTX (1 << 6) 249 #define STAT_TXDEFERRED (1 << 7) 250 #define STAT_TXSLOWDMA (1 << 8) 251 #define STAT_TXLOSTCTS (1 << 9) 252 #define STAT_NOCARRIER (1 << 10) 253 #define STAT_FAIL (1 << 11) 254 #define STAT_ABORTED (1 << 12) 255 #define STAT_OK (1 << 13) 256 #define STAT_BUSY (1 << 14) 257 #define STAT_COMPLETE (1 << 15) 258 #endif 259 #endif 260 261 /* 262 * Ether1 card definitions: 263 * 264 * FAST accesses: 265 * +0 Page register 266 * 16 pages 267 * +4 Control 268 * '1' = reset 269 * '2' = loopback 270 * '4' = CA 271 * '8' = int ack 272 * 273 * RAM at address + 0x2000 274 * Pod. Prod id = 3 275 * Words after ID block [base + 8 words] 276 * +0 pcb issue (0x0c and 0xf3 invalid) 277 * +1 - +6 eth hw address 278 */ 279